A Counter is a device which stores (and sometimes displays) the number of
times a particular event or process has occurred, often in relationship to a clock
signal. Counters are used in digital electronics for counting purpose, they can
count specific event happening in the circuit. For example, in UP counter a
counter increases count for every rising edge of clock. Not only counting, a
counter can follow the certain sequence based on our design like any random
sequence 0,1,3,2… .They can also be designed with the help of flip flops. They
are used as frequency dividers where the frequency of given pulse waveform is
divided. Counters are sequential circuit that count the number of pulses can be
either in binary code or BCD form. The main properties of a counter are timing ,
sequencing , and counting. Counter works in two modes
1. Up counter
2. Down counter
Counter Classification
Counters are broadly divided into two categories
1. Asynchronous counter
2. Synchronous counter
1. Asynchronous Counter
In asynchronous counter we don’t use universal clock, only first flip flop is
driven by main clock and the clock input of rest of the following flip flop is driven
by output of previous flip flops. We can understand it by following diagram-
It is evident from timing diagram that Q0 is changing as soon as the rising edge
of clock pulse is encountered, Q1 is changing when rising edge of Q0 is
encountered(because Q0 is like clock pulse for second flip flop) and so on. In
this way ripples are generated through Q0,Q1,Q2,Q3 hence it is also
called RIPPLE counter. A ripple counter is a cascaded arrangement of flip
flops where the output of one flip flop drives the clock input of the following flip
flop
2. Synchronous Counter
Unlike the asynchronous counter, synchronous counter has one global clock
which drives each flip flop so output changes in parallel. The one advantage of
synchronous counter over asynchronous counter is, it can operate on higher
frequency than asynchronous counter as it does not have cumulative delay
because of same clock is given to each flip flop.
Synchronous counter circuit
Timing diagram synchronous counter
From circuit diagram we see that Q0 bit gives response to each falling edge of
clock while Q1 is dependent on Q0, Q2 is dependent on Q1 and Q0 , Q3 is
dependent on Q2,Q1 and Q0.