Communication Interface: What is Communication?

1. Think of a message
2. Encode the message – convert to it a physical form
3. Transmit – send the message across a distance
4. Decode the message – the other person turns the message to an abstract form (data)
5. Understand the message
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1. Universal asynchronous receiver-transmitter (UART)
• Serial communication with PCs
• GPS modules
• Bluetooth modules

2. Serial Peripheral Interface (SPI)

• Analog-to-Digital Converters (ADCs), Digital-to-Analog Converters (DACs)
• Display modules
• Sensors and actuators

3. and Inter Integrated Circuit (I2C)

• Multiple sensor integration systems

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What is Communication?

For human communication, we

• Encode messages through sound, text, body movement, etc.
• Transmit messages over a medium (ex. lecture, Discord, phone call, smell)
• Decode messages through language processing,

How do computers communicate?

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Recall: SPI

Controller Peripheral

One form of computer communication!

• Encode messages through voltages
• 0 V symbolizes a logical 0
• 3.3 V symbolizes a logical 1
• Transmit messages over the PICO wire
• Decode messages through shared understanding of the meaning of voltage
• Shared clock helps accurately read data line
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New Communication Protocol: UART
Controller Peripheral

What are some differences you can see

between SPI and UART?

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 Universal Asynchronous
Receiver/Transmitter (UART)

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 Physical Layer

Link Layer Application Layer

• Serial • Interpreting the actual
• 8-bit data message
• Both agree on time duration for each bit • Slidepot -> LCD
• No shared clock

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 Physical Layer

TxD/PA8 RxD/PA22
• 0 is 0V
RxD/PA22 TxD/PA8 • 1 is 3.3V

Gnd Gnd How is this

different from

Link Layer SPI to ST7735?

❑Universal Asynchronous Receiver Transmitter

❖Serial: one bit at a time
❖8-bit data
❖Both agree on time duration for each bit (500us)
 Universal Asynchronous
Receiver/Transmitter (UART)
❑UART (Serial Port) Interface

❏ Frame
500us

❖1 start bit=0
❖8 data bits
❖1 stop bit=1 Bit time = 500us
❑ Idle
Baud rate = 2000 bps
❖ High, 3.3V
 Universal Asynchronous
Receiver/Transmitter (UART)
❑UART (Serial Port) Interface

500us

❖Bit time is the duration of each bit, 500us

❖Baud rate is total number of bits per unit time
o Baudrate = 1 / bit-time = 2000bps
❖Bandwidth is data per unit time
o Bandwidth = (data-bits / frame-bits) * Baudrate =
1600bps or 200 bytes/sec
What is serial?

A B
Serial means 1 bit is sent at a time. Full duplex
In this class, least significant bit is sent first Half duplex
Simplex
Couple ways to do this:
• Simplex – One way communication (ex. keyboards)
• Full-duplex – Two way communication at the same time
• Half-duplex – Two way communication but one at a time
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Universal Asynchronous Receiver / Transmitter (UART)
No shared clock
Since we don’t have a shared clock, we have to do more work to make
sure the signal isn’t corrupted by noise
• Baud rate – total number of bits sent per second
• Must be agreed upon beforehand (why you set a speed in serial console)
• Frame – smallest unit of serial transmission
• Data is sent least significant bits first
• Bandwidth – amount of data transmitted per second
Data Bits

[Link] 13
Universal Asynchronous Receiver / Transmitter (UART)
Data Bits

Synchronization Bits

• Start Bit is always 0. Stop Bit is always 1

• Helps the receiver know when the frame starts and ends

• Parity bit is optional and helps for error correction.

• We will not be using it in this class
[Link] 14
How to Transmit? How to Receive?

To transmit: To receive:
• UART creates data packet • Sample line at baud rate
• Sends out data packet at set • Interpret frame correctly
baud rate • Remove sync bits and read data

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What’s FIFO?

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Recall: Stack
Stacks are like a stack of cafeteria trays
• The tray on the top will come out first
• That tray was put in last

Thus, we can think of stacks as a LIFO data-

structure: Last In, First Out

Similarly, FIFO stands for First In, First Out

A queue!
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FIFO buffers (Queues)

Rather than push and pop, we’ll

talk about Put and Get
• Put adds data to the back of the
line
• Get removes data from the front
of the line

We call this queue a “buffer”

• Evens out (temporary!) mismatch
between producer and consumer
• If gets too long, have problems
(ex. go to other grocery line)
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• Synchronous Serial Interface (SSI)
• Serial Peripheral Interface (SPI)

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 Input/Output Synchronization

❑Processor-Peripheral Timing Mismatch

❖Peripherals, e.g., displays, sensors, switches, generally operate MUCH
slower than processor instruction times
o Processor ~ MHz
o Peripheral ~ kHz or Hz

❖MANY instructions can be executed while peripheral processes

information
Synchronous Serial Interface (SSI)
Serial Peripheral Interface (SPI)
TM4C123
SSI0_TX PA5
SSI0_RX PA4 ST7735
SSI0 SSI0_FS PA3
SSI0_SCK PA2

SSI1_TX PD3
SSI1_RX PD2
SSI1 SSI1_FS PD1 TLV5616/TLV5618
SSI1_SCK PD0

SSI2_TX PB7
SSI2_RX PB6
SSI2 SSI2_FS CC3100
PB5
SSI2_SCK PB4

SSI3_TX PD3
SSI3_RX PD2
SSI3 SSI3_FS PD1
SSI3_SCK PD0

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Synchronous Serial Interface (SSI)

When software writes to the data register, this 4 to16-bit register is

serially shifted 4 to16-bit positions by the SSIClk clock

LM3S SSI0Fss
TNF Fifo not full SSI PA3
TM4C I/O device
master SSI0Clk slave
8-element PA2
Write data
16-bit FIFO PA5 SSI0Tx
SSI0_DR_R PA4 SSI0Rx

Read data 8-element

16-bit FIFO Shift
register
RNE Fifo not empty TNF, SSI transmit
FIFO is not full

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Synchronous Serial Interface (SSI) Modes**

FS

SCK (CPOL=0, CPHA=0)

SCK (CPOL=0, CPHA=1)

SCK (CPOL=1, CPHA=0)

SCK (CPOL=1, CPHA=1)

MOSI D7 D6 D5 D4 D3 D2 D1 D0

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Synchronous Serial Interface (SSI)
• Control features for the SSI module
• Baud rate control register, used to select the transmission rate
• Data size 4 to 16 bits
• Mode bits in the control register to select
• master versus slave
• Freescale mode with clock polarity and clock phase
• TI synchronous serial mode
• Microwire mode

• Interrupt arm bit

• Ability to make the outputs open drain (open collector)

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Synchronous Serial Interface (SSI)

• Common status bits for the SPI module

• BSY, SSI is currently transmitting and/or receiving a frame,
• or the transmit FIFO is not empty

• RFF, SSI receive FIFO is full

• RNE, SSI receive FIFO is not empty

• TNF, SSI transmit FIFO is not full

• TFE, SSI transmit FIFO is empty

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 Typical SSI Transmission Line Model
SCLK Tpd = 2.1ns SCLK**

With a VF=0.6, and a Speed

cable length of 0.378m, POCI Tpd = 2.1ns POCI** Path
the propagation delay =
2*0.378m/(0.6*3*108m/s) PICO Tpd = 2.1ns PICO**
= 4.2ns
FS Tpd = 2.1ns FS**

Controller Peripheral
SPI Device SPI Device
tSCK_prop

SCLK

SCLK**

FS

MOSI/PICO HI-Z
D7 D0 HI-Z

tFS_prop

FS**

HI-Z
MISO/POCI D7 D0 HI-Z

tMISO_su

New terminology: PICO (Peripheral In, Controller Out) and POCI (Peripheral Out, Controller In).
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Lab on TFT Display

• 128 x 160 pixel LCD screen

• 18 bits per pixel
• On-board RAM buffer for images

• Uses SPI protocol to communicate

• 8 wire communication
• We provide ST7735.c to help you, but in
Lab 6, you write it yourself

• Also has micro-SD card for extra

storage (2 more wires)
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What is SPI?
SPI is “Serial Peripheral Interface” Controller Peripheral
Generally 4 wires (in addition to
power and ground)

1. Serial Clock
2. PICO – peripheral in, controller
out
3. POCI – peripheral out,
controller in
4. Chip Select – in negative logic

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A Note on Terminology
You may see the words “MISO” / “MOSI” to refer to PICO / POCI
This stands for “master in slave out” and “master out slave in”

IEEE no longer recommends using master/slave terminology

• [Link]
• Alternatives include “primary / secondary”, “leader / follower”, etc.

Personal experience: an undergrad I was working with asked me to

change the language in one of my papers. We chose “server / client”

This is part of ongoing discussions about the language we use in

engineering! (ex. male/female connectors)

[Link]
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Parsing the ST7735’s pins
D/C high means Data
D/C low means Command

// pin 10 Backlight +3.3 V

// pin 9 MISO unconnected
// pin 8 SCK PB9 (SPI1 SClk)
// pin 7 MOSI PB8 (SPI1 PICO)
// pin 6 TFT_CS PB6 (SPI1 CS0)
// pin 5 CARD_CS unconnected
// pin 4 D/C PA13 (GPIO)
// pin 3 RESET PB15(GPIO)
// pin 2 VCC +3.3 V
// pin 1 Gnd ground

D/C High for Data , Low for Command

Note: if your ST7735 display doesn’t look exactly like this,

see the comments in ST7735.c to find how to connect it to the MSPM0G3507.
 SPI Shift registers

POCI not used for ST7735R because we only output to LCD.

However, if we use the LCD and SDC on the ST7735R POCI will be needed
SPI Timing

SPI is fast and reliable because of the shared clock

Inter-Integrated Circuit (I2C) Protocol

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