Digital Logic:

Boolean algebra. Combinational and sequential circuits. Minimization. Number

representations and computer arithmetic (fixed and floating point).
S No.
Question Question Marks

1 Simplify the Boolean expression: (A+B)(A′+C) and implement it using minimum

number of logic gates. 2

2 If F(A,B,C) = Σ(1,3,5,6), express F in canonical POS form.

2

3 Differentiate between latch and flip-flop in terms of triggering.

2

4 Explain the difference between synchronous and asynchronous counters with an

example. 2

5 Explain the importance of don’t-care conditions in K-map simplification

2

6 Explain why overflow occurs in signed binary addition. Give an example.

2

7 Compare fixed-point and floating-point representations in terms of range and

precision. 2

8 Show the difference between prime

implicants and essential prime implicants in logic minimization. 2

9 Why are multiplexers called “data selectors”? Give a 4-to-1 MUX example.
2

10 Interpret the logic behind consensus theorem AB+A′C+BC=AB+A′C

2

11 Show why A+A′B=A+B using Boolean laws.

2

12 Distinguish between canonical SOP and minimal SOP expressions with an

example. 2

13 A computer uses 8-bit signed magnitude representation. Find the range of

representable decimal numbers and explain why +0 and -0 are different.
2

14 Perform subtraction using 2’s complement: 1011012−110112.

2

15 Represent (−25)10 in 8-bit 2’s complement form

2

16 Reduce the Boolean function F(A,B,C)=AB+A′C+BC

2
17 A ring counter with 5 flip-flops is initialized to 10000. Write the next four states.
2

18 A JK flip-flop is operated with J=1,K=0. If the present state is Q=0, determine the
next three states for successive clock pulses.
2

19 Using Boolean algebra, prove that (A+B)(A′+C)+B′C=AC+B′C

2

20
A logic circuit outputs Y=(A⊕B)⋅(C+D′). For input combination
A=1,B=0,C=0,D=1, 2
determine the output.

21 Find the minterm expansion of f(P, Q, R) = PQ + QR' + PR'.

2

22 What is the Boolean expression for the output f of the combinational logic circuit of
NOR gates given below?

23 What is the Boolean expression for the output f of the combinational logic circuit of
NOR gates given below?
Explain your answer.
A) Cyclic Redundancy Code
B) Weighted Code 2
C) Self-Complementing Code
D) Algebraic Code

24 If half adders and full adders are implemented using gates, then for the addition of two
17 bit numbers (using minimum gates), how many half adders and full adders will be
required? 2

25 Find the minimum number of multiplexers required to realize the following function,f
= A'B'C + A'B'C' Assume that inputs are available only in
true form and Boolean constant 1 and 0 are available.
2

26 When two numbers are added in excess- 3 code and the sum is less than 9, then in order
to get the correct answer it is necessary to
A) subtract 0011 from the sum
 B) add 0011 to the sum
C) subtract 0110 from the sum 2
D) add 0110 to the sum Explain your answer.

27 The BCD adder to add two decimal digits needs minimum of

A) 6 full adders and 2 half adders
B) 5 full adders and 3 half adders
2
C) 4 full adders and 3 half adders
D) 5 full adders and 2 half adders

Explain your answer.

28

If at some instance prior to the occurrence of the clock edge, P, Q and R have a value 0,
1 and 0 respectively, what shall be the value of PQR after the clock
edge?

29

In the sequential circuit shown above, if the initial value of the output Q1Q0 is 00,what
are the next four values of Q1Q0?

30 Consider the sequential circuit shown in the figure, where both flip-flops used are
positive edge-triggered D flip-flops.

2
 The number of states in the state transition diagram of this circuit that
have a transition back to the same state on some value of "in" is .

31 Write the functional difference between SR flip-flop and JK flip-flop.

2

S No. Question Marks

Question

1 For the Boolean function F(A,B,C,D)=A′B+C′D, find the

complement F′ and implement it using only NAND gates.
5

2
Implement F(A,B,C)=A⊕B⊕C using
only 2-input NAND gates and state the number of gates required. 5

3 Which Boolean function the truth table represents?

4 A synchronous 3-bit up-counter is

designed using T flip-flops. Determine the excitation inputs T2,T1,T0. 5

5 Which one of the following expressions does NOT represent exclusive NOR of x and y? Explain.
A) xy+x'y'
B) x⊕y'
5
C) x'⊕y
D) x'⊕y'

6 Given F(A,B,C,D)=Σ(0,2,5,7,8,10,13,15):
(i) Minimize using Boolean algebra theorems (not K-map).
(ii) Implement using NAND gates only 5

7 Minimize the Boolean function using K- map and realize the simplified function with
minimum NAND gates:
5
F(A,B,C,D)=Σ(1,3,7,9,11,15)+d(0,2,5,8).

8 Represent −19.62510 in IEEE-754 single precision format. Show step-by-step

conversion (sign bit, exponent, mantissa) 5

9 Find the function of each circuit considering the inputs to be X and Y.

 5

10 A multiplexer combines four 100-Kbps channels using a time slot of 2 bits. What
is the bit rate? 5

11 How many 3-to-8 line decoders with an enable input are needed to construct a 6- to-
64 line decoder without using any other logic gates? Explain your answer.
5
A) 7 B) 8 C) 9 D) 10

12 To build a modulus -12 ring counter, what is the minimum number of flipflops
required? Explain your answer. 5

13 Define ripple counter, synchronous

counter, asynchronous counter, parallel counter with proper diagram. 5

14 Find the number of 1's in the binary

representation of (3*4096 + 15*256 + 5*16 + 3) 5

15 Find the range of integers that can be represented by an n bit 2’s complement.
1’s complement, and sign and magnitude number systems.
5

16

17 Find the hexadecimal equivalent of the octal number 2357.

5

18 Convert the octal number 0.4051 into its equivalent decimal number.
5

19 Let M = 11111010 and N = 00001010 be

two 8 bit two’s complement number. Find their product in two’s complement. 5

20 Let m=(313)4 and n=(322)4. Find the base 4 expansion of m+n.

5

S Question Marks
No. Question

1 How is a 7-segment display decoder different from a normal binary-to-decimal

decoder? Explain with 10
proper functionality.
2 (a) Minimize the Boolean function using algebraic method:
F(A,B,C,D)=(A+B)(A′+C)(B+C′)(C+D′)
(b) Implement using only NAND gates.
 (c) Compare gate count with direct SOP implementation. 10

3 Design a 4-bit binary to Gray code converter.

(a) Derive Boolean expressions for each output bit.
10
(b) Simplify using K-map.
(c) Implement using XOR gates.
4 A university requires a digital system to generate grade output from 2-bit input (00 =
Fail, 01 = Pass, 10
= Good, 11 = Excellent).
10
(a) Design truth table.
(b) Implement using 2-to-4 decoder.
(c) Show implementation using 4-to-1 MUX.
5 Design a combinational circuit to detect multiples of 5 for a 4-bit input (0000–1111).
(a) Prepare truth table.
(b) Minimize using K-map. 10
(c) Implement using NAND gates only

6 A traffic light controller operates with three states: Red → Green → Yellow → Red.
(a) Design the state diagram.
(b) Assign binary codes.
10
(c) Implement with flip-flops and derive excitation equations.
7 Perform floating point addition:
X=1.101×24,Y=1.011×22
(a) Normalize both numbers.
10
(b) Align exponents.
(c) Perform addition.
(d) Normalize result in IEEE 754 single precision.
8 Given function: F(W,X,Y,Z)=Σ(0,1,2,5,7,8,9,10,14)+d(3,11,15)
(a) Minimize using K-map.
(b) Draw simplified circuit using NAND gates. 10
(c) Compare number of literals before and after.

9 (a) How many 2-input multiplexers are required to construct a 210 input
multiplexer? Explain.
(b) Find the function of the following circuit.

10

10 Find the function of the following circuit.

10
 Match the terms in List - I with the options given in
List - II :
List - I List - II
(a) Decoder (i)1 line to 2n lines
(b) Multiplexer (ii)n lines to 2n lines (c)De multiplexer (iii)2n lines
to 1 line
(iv)2n lines to 2n - 1 lines
11 Design a synchronous counter to go through the following states:
1, 4, 2, 3, 1, 4, 2, 3, 1, 4,........... 10

12 (a) In a three stage counter, using RS flip flops what will be the value of the counter
after giving 9 pulses to its input? Assume that the value of counter before giving any
pulses is 1. Explain your answer.
10
(b) In an RS flip-flop, if the S line (Set line) is set high
(1) and the R line (Reset line) is set low (0), what is the state of the flip-flop? Explain.
13 Design a 3-bit ring counter with its state table and discuss its working principle..
10

14 Design a binary to gray code converter and discuss its working principle..
10

15 Design a Serial-In Serial-Out Shift Register and discuss its working principle.
10