NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
Course Name: EMBEDDED SYSTEM DESIGN WITH ARM
Assignment- Week 1
TYPE OF QUESTION: MCQ/MSQ/SA
Number of questions: 10 Total mark: 10 x 1 = 10
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QUESTION 1:
Which of the following is/are not a constraint in embedded system design?
a. Limited memory capacity.
b. Low energy consumption.
c. Small form factor.
d. Cost efficient.
e. None of these.
Correct Answer: e
Detailed Solution: If we are making an embedded system then that system should not take too
much memory and should be power efficient. Also it should be small and cost efficient.
Thus option (e) is a correct option.
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QUESTION 2:
Which of the following statements is/are true about an embedded system?
a. It is a microcontroller-based system.
b. It is designed to perform specific functions.
c. It is designed for general-purpose applications.
d. None of these.
Correct Answer: a, b
Detailed Solution: Microprocessors used inside desktop or laptop is designed for general-
purpose applications, embedded system is designed using microcontroller to perform specific
functions.
Thus options (a) and (b) are true.
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NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
QUESTION 3:
What is meant by Non-Recurring Engineering (NRE) cost?
a. The amount of (battery) power consumed by the system.
b. One-time initial cost of designing a system.
c. The cost of manufacturing each copy of the system.
d. None of these
Correct Answer: b
Detailed Solution: NRE is a common design metric used to handle design challenges. NRE is
the one-time initial cost of designing the system.
Thus option (b) is correct.
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QUESTION 4:
Which of the following statement(s) is/are false?
a. Power consumption and performance can be simultaneously improved.
b. NRE cost and performance can be simultaneously improved.
c. Improving performance increases the power consumption.
d. None of these.
Correct Answer: a, b
Detailed Solution: To get output faster we need higher frequency that leads to high power
consumption. NRE cost is fixed cost for design or machine purchase that will increase if we
move toward any new design.
Thus options (a) and (b) are false statements.
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QUESTION 5:
Consider the typical triangle-shaped revenue model. Suppose that a product enters the market
at time 0, maximum sale of “X” units occur at time W, and the product life is 2W. However the
launch of the product gets delayed by a time D. For W = 50 and D=5, percentage revenue loss
due to the delayed launch of the product will be ________ %.
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
Correct Answer: Range 14.3 to 14.7
Detailed Solution:
Given Base (W) = 50 and Delay = 5.
Percentage revenue loss = D (3W-D)/2W2 * 100.
= 5 (150-5)/5000 * 100
= 14.5
Thus 14.5 is the correct answer.
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QUESTION 6:
For a product being manufactured, the NRE cost is 1000$, and the unit cost of the product is
10$. If we manufacture 250 units of the product, the total cost will be _______ $.
Correct Answer: 3500
Detailed Solution: NRE cost means a fixed cost used for design/machine purchase etc. Thus
total cost for 250 products will be
(NRE Cost + Number of Units * Unit Cost) = (1000 + 250*10) = 3500$
Thus 3500 is the correct answer.
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QUESTION 7:
In an embedded system there is a processor, a memory M1 that stores instructions and a
memory M2 that stores data. The processor architecture is:
a. Von-Neumann architecture.
b. Harvard architecture.
Correct Answer: b
Detailed Solution: Harvard architecture has separate data and instruction memories.
Thus option (b) is correct.
____________________________________________________________________________
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
QUESTION 8:
Which of the following statement(s) is/are false?
a. In a CISC based system an instruction typically takes multiple clock cycles for
execution.
b. CISC based system does not support variable length instruction.
c. RISC based system supports variable length instruction.
d. RISC based system typically executes one instruction per clock cycle.
Correct Answer: b, c
Detailed Solution: In RISC based system the size of instruction is fixed and each instruction
take one cycle for execution. In contrast to RISC, CISC based system supports variable length
instruction and execution of a single instruction may take several clock cycles. CISC architecture
are typically used in PCs and laptops. RISC architecture are used in microcontrollers which are
used to build embedded systems.
Thus options (b) and (c) are false options.
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QUESTION 9:
Consider a 6-state pipeline with stage delays of 35, 40, 28, 42, 30 and 38 nanoseconds
respectively (including the latch delay). It is required to process 5000 data items in the pipeline.
The minimum time required to process the data items will be ________ microseconds?
Correct Answer: 209.0 to 211.0
Detailed Solution:
Total time = [no. of stage – 1 + no of data item] x [max stage delay]
= [6 – 1 + 5000] * [42] = 210,210 nanoseconds = 210.21 microseconds.
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QUESTION 10:
Consider a 6-state pipeline with stage delays of 35, 40, 28, 42, 30 and 38 nanoseconds
respectively. If the latch delay in each stage is 5 nanoseconds, the maximum clock frequency
with which the pipeline can operate will be __________ MHz.
Correct Answer: 21.0 to 21.5
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
Detailed Solution: The maximum clock frequency with which the pipeline can operate
(f) = 1 / max stage delay.
Max stage delay = 42 + 5 (latch delay in each stage) nanoseconds = 47 nanosecond
= 1/ (47 x 10-9) Hz = 21276595.744 Hz = 21.27 MHz
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