LECTURE-4 8051
Microcontroller
Memory
Organization
8051 Microcontroller Architecture and Pin Diagram
PIN Diagram
A
Architecture
ROM: Code memory/program memory
Int. ROM Only Ext. ROM
Only (discarding internal
ROM)
Int. ROM
+
Ext. ROM
4 KB
Only Ext. ROM (discarding internal ROM…..why?)
Original 8051used only ROM (one-time programmable)
Int
ROM
Ext.
ROM
Software/Firmware
Update
Latest 8051 EPROM: Reprogrammable
ROM: Code memory/program memory
Only Int. ROM
0000 H
Int. ROM
0000 H 4 KB
0FFF H +
4KB Ext. ROM
1000 H
0FFF H
4 KB ??
Address bus is 16 bit 60 KB FFFF H
2^16=2^6 x2^10= 64x 1024= 64 x 1KB= 64 KB
ROM: Code memory/program memory
Only Ext. ROM
(discarding internal ROM)
Only Int. ROM
Int. ROM 0000 H
0000 H
0000 H
4 KB
0FFF H +
4KB
Ext. ROM
1000 H
0FFF H
64 KB
4 KB
??
Address bus is 16 bit
2^16=2^6 x2^10= 64x 1024= 64 x 60 KB FFFF H
FFFF H
1KB= 64 KB
ROM: Code memory/program memory
Only Ext. ROM
(discarding internal ROM)
Only Int. ROM
Int. ROM 0000 H
0000 H
0000 H
4 KB
0FFF H +
4KB
Ext. ROM
1000 H
0FFF H
64 KB
4 KB
??
1125H address
means which one 60 KB FFFF H
FFFF H
should I access
ROM: Code memory/program memory
Only Ext. ROM
(discarding internal ROM)
Only Int. ROM
Int. ROM 0000 H
0000 H
0000 H
4 KB
0FFF H +
4KB
Ext. ROM
1000 H
0FFF H
64 KB
4 KB
??
0125H address
means which one 60 KB FFFF H
FFFF H
should I access
EA =1 Int. ROM EA =0 Ext. ROM
In simple
FFFF H
60 KB
0FFF H
=1 Int. ROM
4 KB EA =0 Ext. ROM
0000 H
RAM: Data memory Ext. RAM (64 KB)
00 H
8051 can access both separately
Unlike ROM
7F H
Int. RAM (128 Bytes)
8-bit address 16-bit address
How to identify internal or external
If the address is 25H
Internal RAM (8-bit)
If the address is 0025H
Ext RAM (16-bit)
RAM
80 Bytes
16 Bytes Total 128 bytes
(128 – 8 bit memory
locations
32 Bytes
Internal structure of RAM
80 Bytes
16 Bytes Default bank is : Bank 0
32 Bytes
•How to access register banks
By selection of banks
R0-R7
OR
By address each register
address
All 32 can be accessed
80 Bytes
16 Bytes
32 Bytes
16 bytes =( 16x8 bits= 128 1-bit memory locations
Now we have 00-7F byte and bit address??
Confusion in the address??
Bit Addressing Instructions: Usually, instructions like
SETB, CLR, JB, JNB, and MOV (in bit mode) are designed to
operate on individual bits.
Byte Addressing Instructions: Instructions like MOV,
ADD, SUB, ANL, and ORL are generally used for byte (or
word) operations.
How and where Bit address area useful
Storing bit wise information: ex sensors data
ex: Attendance
Sending bit wise information: LEDs with pattern
used for data storage
80 Bytes and stack operations.
16 Bytes
It does not have any special functions or
features. Scratch pad RAM is used by the
ALU, while fetching, decoding and
executing the instructions during operation
32 Bytes of the microcontroller.
Stack
operations
• The stack is a section of memory
(usually within RAM) that operates
on aLast-In, First-Out
(LIFO) principle.
• It is used for temporarily storing
data, such as return addresses,
local variables, and the state of
registers, especially during
function calls, interrupts, and
when performing complex
calculations.
Stack operations
last-in, first-out" (LIFO) manner
Ex: Browser Navigation (Back and Forward Buttons)
SMS and e-mail service
Browser History
STACK POINTER
The stack pointer (SP) is a special-purpose register that holds the address
of the top of the stack.
It essentially "points" to the current location in memory where the next value
will be pushed or where the next value will be popped.
8 Bit Register Stack Pointer SP: Holds Address Of Top Of The Stack
SP Under Control Of Programmer
Push And Pop Instructions Similar To 8086 Processor
By Default, 07H Is The SP Value
Why default value of SP is 07H
Stock needs more space and also 8051
some space for storage of data
Stack: Push, Pop
Why default value of SP is 07H
but it can be manually set to a
different memory location as needed.
MOV SP, #30H ; Initialize the stack pointer to 30H (stack starts from 31H)
PUSH ACC ; Push the contents of the accumulator onto the stack
POP ACC ; Pop the top of the stack back into the accumulator
MOV SP, #30H: Sets the stack pointer to 30H, so the first item pushed will be
stored at 31H.
PUSH ACC: The stack pointer increments to 31H, and the contents of the
accumulator are stored at that address.
POP ACC: The value stored at 31H is retrieved and placed back into the
accumulator, and the stack pointer is decremented back to 30H
Special function registers (SFR): 80 H to FF H
SFR:Not part of RAM
SFR: Not part of RAM
Special function registers (SFR): 21
The SFRs are used to control and configure the internal hardware of
the 8051 microcontroller.
Each SFR is associated with a specific function, such as controlling the
I/O ports, timers, serial interface, and more.
Some of these registers are bit addressable
Some of them are byte addressable
By Default any register is byte addressable
16 Registers
16 Registers
Special function registers (SFR): ALP
They use their address for programming
MOV 90H, #0FFH ; Set all bits of Port 1 high (90H is the address of P1)
MOV 89H, #01H ; Set Timer 0 in Mode 1 (89H is the address of TMOD)
SETB 88H.4 ; Start Timer 0 by setting TR0 bit in TCON (88H is the address of TCON, TR0 is bit 4)
MOV A, A0H ; Move the value from Port 2 (A0H is the address of P2) to the accumulator
OR
MOV TMOD, #20H ; Timer 1 in Mode 2 (8-bit auto-reload) for baud rate generation Assembler converts to
MOV TH1, #0FDH ; Load TH1 to set baud rate (9600 baud if SMOD = 0) machine language with
MOV SCON, #50H ; Set serial mode 1 (8-bit UART) and enable reception addresses
If SFR addressed by their address, are they any conflict with other address ??
FFFF H
16-bit adresss for ROM
Where as SFR is 8-bit address
60 KB
No conflict with ROM
0FFF H
=1 Int. ROM
4 KB EA =0 Ext. ROM
If SFR addressed by their address, are they any conflict with other address ??
FF H
Free 8-bit address for RAM but 128 bytes
need 00-7F address
80 H
7F H
80-FF addresses are free
SFR is 8-bit address (80-FF)
00 H
Int. RAM (128 Bytes) No conflict with RAM
Bit-addressable nature of SFRs and how??
Byte operation with P1 address
MOV P1, #0FFH ; Set all bits of Port 1 (P1) to 1
MOV 80, #0FFH ; Set all bits of Port 1 (P1) to 1
Bit operation with P1 address
Both addresses
SETB P1.0 ; Set bit 0 of Port 1 (P1.0) to 1 are 80
SETB 80 ; Set bit 0 of Port 1 (P1.0) to 1
Are these Bit-address of SFRs conflict with any
other addresses (bit addressable are of RAM)??
This bit addressable area
of RAM : 00-7F
We can use 80-FF for SFR
bit addressing
No conflict
Special function registers (SFR):
Lets see other registers
Port Registers (P0, P1, P2, P3) - Addresses: 80H, 90H, A0H, B0H
Purpose: These registers control the
I/O ports of the 8051 microcontroller.
Each port register corresponds to one
of the four 8-bit I/O ports (P0, P1, P2,
P3).
Bit-Addressable: Yes.
MOV P1, #0FFH ; Set all bits of Port 1 to high
CLR P3.2 ; Clear bit 2 of Port 3
Timer/Counter Control Registers (TCON, TMOD) - Addresses: 88H, 89H
Purpose: TCON controls the operation of the timers and external interrupts.
Bit-Addressable: Yes.
TMOD (Timer Mode) - Address: 89HPurpose: TMOD configures the mode of
operation for Timer 0 and Timer 1.
Bit-Addressable: No.
Serial Control Registers (SCON, SBUF) - Addresses: 98H, 99H
SCON (Serial Control) - Address: 98H
Purpose: SCON controls the serial port operation, including setting the
mode and enabling reception.
•Bit-Addressable: Yes.
MOV SCON, #50H ; Set serial mode to 8-bit UART, enable reception
SBUF (Serial Buffer) - Address: 99H
Purpose: SBUF is used for serial data transmission and
reception. Data written to SBUF is transmitted, and received data
is stored in SBUF.
Bit-Addressable: No.
MOV SBUF, A ; Write the value in the accumulator to SBUF to transmit it
MOV A, SBUF ; Move the received character from SBUF to the accumulator
Interrupt Enable (IE) - Address: A8H
Purpose: The IE register is used to enable or disable interrupts
globally and individually.
Bit-Addressable: Yes.
SETB EA ; Enable all interrupts globally
SETB ET0 ; Enable Timer 0 interrupt
Interrupt Priority (IP) - Address:B8H
Purpose: The IP register is used to set the priority level of each
interrupt.
Bit-Addressable: Yes.