ICT 3127 - EMBEDDED SYSTEM DESIGN

ARM Cortex-M Peripheral Programming and

Interfacing
30-Hour Detailed Lecture Notes
Timer/counter programming, GPIO and I/O programming, LED, LCD, keyboard, stepper motor, ADC,
PWM, UART, NVIC, external hardware interrupts and I/O interrupts.

ARM Cortex-M class processor architecture illustration

Source: Arm Cortex-M processor family reference image

Scope and platform

The notes are written for ARM Cortex-M teaching and use LPC176x-style register examples because
the syllabus cites NXP UM10360. STM32F401 examples from the uploaded IIT Kharagpur course are
used for practical understanding. Generic diagrams are used where hardware concepts are common
across Cortex-M microcontrollers.

Primary classroom sources: the uploaded IIT Kharagpur Embedded System Design with ARM course,
the uploaded Embedded System Lecture Notes, ARM Cortex-M/CMSIS documentation, and NXP
LPC176x/5x user-manual concepts.
ICT 3127 - ARM Cortex-M Peripheral Lecture Notes | 1
How to use these notes for a long lecture
Block Teaching method Expected outcome
Begin with physical meaning Students can explain what the
Concept
and block diagram. peripheral does.
Show the sequence: clock -> pin
Students understand register-
Register flow function -> configuration ->
level programming.
enable -> status/interrupt.
Explain one short C code Students connect theory with
Code walk-through
skeleton line by line. firmware.
Solve at least one
Numerical timer/ADC/PWM/UART Students become exam-ready.
calculation.
Combine input, processing and Students learn system-level
Design problem
output. thinking.

30-hour lecture distribution

Hours Topic
1-3 Memory-mapped I/O and GPIO foundation
4-6 LED and switch interfacing
7-9 LCD interfacing
10-12 Keyboard/keypad interfacing
13-15 Stepper motor interfacing
16-18 Timer/counter programming
19-21 PWM
22-24 ADC
25-27 UART
28-30 NVIC, external and I/O interrupts + integration

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Module 1: Memory-Mapped I/O and GPIO Foundation
Lecture allocation
3 hours. Teaching focus: Build the common register-programming pattern used by every peripheral.

In ARM Cortex-M microcontrollers, peripheral registers are assigned normal memory addresses. The
CPU accesses GPIO, timer, ADC and UART registers through load/store operations. This is called
memory-mapped I/O. The important idea is simple: a peripheral register behaves like a special memory
location connected to hardware.

Cortex-M system integration showing bus connection to memory and peripherals

Source: Cortex-M integration reference image

1.1 Common peripheral programming sequence

1. Enable the peripheral clock.
2. Select the required pin function or alternate function.
3. Configure direction, mode, speed, pull-up/pull-down or electrical behavior.
4. Program the peripheral parameters.

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5. Enable the peripheral.
6. Read status flags or enable an interrupt.
7. Clear the status/interrupt flag after servicing the event.
Teaching warning
Students often memorize register names without understanding the signal path. Always draw: CPU ->
bus -> peripheral register -> physical pin/device.

1.2 LPC176x-style GPIO register table

Register Meaning Teaching use
Choose GPIO or peripheral
PINSELx Pin function select
alternate function.
FIODIR Fast GPIO direction 1 = output, 0 = input.
Writing 1 makes selected output
FIOSET Set output bits
bits HIGH.
Writing 1 makes selected output
FIOCLR Clear output bits
bits LOW.
Read inputs or write complete
FIOPIN Read/write pin value
port value.
PINMODEx Pull-up/pull-down mode Controls input biasing.

1.3 Bit masking

A port register controls many pins. Bit masking changes only the required pin without disturbing other
pins.
#define LED_PIN (1u << 22)
LPC_GPIO0->FIODIR |= LED_PIN; // make P0.22 output
LPC_GPIO0->FIOSET = LED_PIN; // set P0.22
LPC_GPIO0->FIOCLR = LED_PIN; // clear P0.22
Set a bit: REG |= (1 << n) | Clear a bit: REG &= ~(1 << n) | Test a bit: REG & (1 << n)

1.4 Classroom exercises

8. Write a mask for pin 7.
9. Write a mask for pins 3, 5 and 9 together.
10. Explain why FIOSET and FIOCLR are safer than rewriting the complete FIOPIN register.

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Module 2: LED and Switch Interfacing
Lecture allocation
3 hours. Teaching focus: Teach output, input, pull-up/pull-down and polling before advanced
peripherals.

GPIO-to-LED connection with current-limiting resistor

An LED is the simplest output device. A switch is the simplest input device. Together they teach GPIO
direction, logic levels, current protection and bit masking.

2.1 LED current calculation

R = (VGPIO - VF) / IF

Example: VGPIO = 3.3 V, LED forward voltage = 2.0 V and required current = 8 mA. R = 1.3/0.008 = 162.5
ohm. Choose a standard 180 ohm or 220 ohm resistor for safety.

2.2 Active-high and active-low connections

Connection LED ON condition Typical reason
LED is connected from GPIO
Active-high GPIO = 1
through resistor to ground.
LED is connected to supply and
Active-low GPIO = 0
MCU pin sinks current.

2.3 Switch input and debounce

Mechanical contacts bounce. One physical press can create several rapid transitions. A software delay
of about 10-30 ms or a timer-based debounce state machine is commonly used.
if ((LPC_GPIO2->FIOPIN & SWITCH_PIN) == 0) {
delay_ms(20);
if ((LPC_GPIO2->FIOPIN & SWITCH_PIN) == 0) {
LPC_GPIO0->FIOPIN ^= LED_PIN;
while ((LPC_GPIO2->FIOPIN & SWITCH_PIN) == 0) { }
}

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}

2.4 Solved numericals

11. 3.3 V GPIO, VF = 2.1 V, R = 330 ohm: current = (3.3-2.1)/330 = 3.64 mA.
12. 5 V GPIO, VF = 2 V, desired current 10 mA: R = 300 ohm; choose 330 ohm.
13. A switch bounces for 12 ms. A 20 ms debounce delay is sufficient because it exceeds the bounce
interval.

2.5 University questions

14. Draw and explain LED interfacing with ARM Cortex-M.
15. Differentiate active-high and active-low LED circuits.
16. Explain pull-up resistor and switch debouncing.
17. Write register-level logic for switch-controlled LED.

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Module 3: 16x2 LCD Interfacing
Lecture allocation
3 hours. Teaching focus: Explain command/data control, 4-bit transfer, initialization and timing.

Example 16x2 LCD connection diagram

Source: Web reference image used for teaching LCD connection layout

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 Redrawn 16x2 LCD pin and 4-bit interfacing concept

3.1 Important LCD pins

Pin Function Typical connection
VSS Ground 0V
VDD Supply Usually 5 V module supply
V0 Contrast Potentiometer wiper
RS Register select 0 = command, 1 = data
Usually tied LOW for write-only
RW Read/write
use
E Enable Pulse to latch command/data
D4-D7 Data lines Used in 4-bit mode
LED backlight supply through
A/K Backlight
correct connection

3.2 Standard initialization sequence

18. Wait after power-up.
19. Send 0x28 for 4-bit, 2-line mode.
20. Send 0x0C to switch display ON and cursor OFF.
21. Send 0x06 for automatic cursor increment.
22. Send 0x01 to clear display.
23. Send 0x80 to select the first-line starting address.

3.3 Sending a byte in 4-bit mode

The high nibble is placed on D4-D7 and latched with an E pulse. Then the low nibble is placed on D4-D7
and latched with a second E pulse.
void lcd_write4(uint8_t nibble) {
GPIO_LCD = (GPIO_LCD & ~LCD_DATA_MASK) | ((nibble & 0x0F) << LCD_SHIFT);
LCD_E_HIGH();
short_delay();
LCD_E_LOW();
}

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void lcd_write_byte(uint8_t value, int rs) {
LCD_RS(rs);
lcd_write4(value >> 4);
lcd_write4(value & 0x0F);
}

3.4 Timing numerical

If one data write requires 40 microseconds, 16 characters require 16 x 40 = 640 microseconds. If a clear-
display command takes 1.64 ms, writing 16 characters after clearing requires about 2.28 ms total.

3.5 Common faults

 No contrast because V0 is not adjusted.
 Wrong nibble order in 4-bit mode.
 Enable pulse too short.
 No delay after clear/home commands.
 Data pins configured as inputs instead of outputs.

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Module 4: Matrix Keyboard / Keypad Interfacing
Lecture allocation
3 hours. Teaching focus: Teach scanning, row-column mapping, debounce and ghost-key limitations.

4x4 keypad scanning method

4.1 Why matrix arrangement?

Sixteen independent switches would need sixteen GPIO pins. A 4x4 matrix requires only eight pins:
four rows and four columns.

4.2 Scanning algorithm

24. Configure rows as outputs and columns as inputs with pull-ups.
25. Drive one row LOW and keep all other rows HIGH.
26. Read the four columns.
27. A LOW column identifies a pressed key in the active row.
28. Repeat for every row.
29. Apply debounce and wait for release before accepting the next key.

4.3 Key map table

Row/Column C0 C1 C2 C3
R0 1 2 3 A
R1 4 5 6 B
R2 7 8 9 C
R3 * 0 # D

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4.4 Numerical and timing
If each row is activated for 500 microseconds, one complete 4-row scan takes 2 ms. The keypad is
therefore checked 500 times per second. With 20 ms debounce, about ten scans occur during the
debounce period.

4.5 Code skeleton

char keypad_scan(void) {
for (int row = 0; row < 4; row++) {
drive_all_rows_high();
drive_row_low(row);
delay_us(10);
int col = read_columns();
if (col >= 0) {
delay_ms(20);
if (read_columns() == col) return keymap[row][col];
}
}
return '\0';
}
Advanced note
Without isolation diodes, pressing several keys can create ghost keys. This is important in keyboards
requiring multi-key detection.

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Module 5: Stepper Motor Interfacing
Lecture allocation
3 hours. Teaching focus: Explain driver requirement, sequences, direction, speed and angular
position.

Four-phase stepper motor and half-step sequence

A GPIO pin cannot directly drive a motor winding. The motor needs more current and creates inductive
voltage transients. A ULN2003, L293D or MOSFET driver stage protects the MCU and supplies winding
current.

5.1 Drive modes

Mode Coils energized Advantage Limitation
Wave drive One coil Low power Lower torque
Full-step Two coils Higher torque Normal step angle
Alternates one and two Double angular
Half-step More sequence states
coils resolution

5.2 Core formulas

Steps per revolution = 360 degrees / step angle

Required steps = desired angle / step angle

Speed (rpm) = step frequency x 60 / steps per revolution

5.3 Solved examples

30. For 1.8 degree step angle: 360/1.8 = 200 steps/revolution.
31. For 90 degree rotation: 90/1.8 = 50 steps.
32. For 400 steps/s and 200 steps/rev: speed = 400 x 60 / 200 = 120 rpm.

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33. A 7.5 degree motor requires 48 steps/rev. At 96 pulses/s, speed is 120 rpm.

5.4 Program logic

const uint8_t half_step[8] = {0x09,0x08,0x0C,0x04,0x06,0x02,0x03,0x01};
for (int i=0; i<required_steps; i++) {
MOTOR_PORT = half_step[i & 7];
delay_ms(step_delay_ms);
}
// reverse direction: traverse sequence in reverse order

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Module 6: Timer / Counter Programming
Lecture allocation
3 hours. Teaching focus: Teach prescaler, counter, match/compare, capture and interrupts.

Timer/counter functional blocks

6.1 Timer registers - LPC176x style

Register Role
T0TCR Timer control: enable/reset
T0TC Current timer count
T0PR Prescaler value
T0PC Prescale counter
T0MR0-T0MR3 Match values
T0MCR Action on match: interrupt/reset/stop
T0IR Interrupt flags
T0CCR Capture edge and interrupt control
T0CRx Captured timer values

6.2 Delay equations

Timer tick frequency = PCLK / (PR + 1)

Match delay = (MR + 1) / timer tick frequency

Example: PCLK = 25 MHz and PR = 24. Timer tick = 1 MHz, so each TC increment is 1 microsecond. For
10 ms, use 10,000 ticks; MR0 = 9999 if counting from zero.

6.3 Periodic interrupt example

LPC_SC->PCONP |= (1u << 1); // Timer0 clock
LPC_TIM0->TCR = 2; // reset
LPC_TIM0->PR = 24; // 1 us tick for 25 MHz PCLK
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LPC_TIM0->MR0 = 999; // 1 ms
LPC_TIM0->MCR = 3; // interrupt + reset on MR0
NVIC_EnableIRQ(TIMER0_IRQn);
LPC_TIM0->TCR = 1; // start

void TIMER0_IRQHandler(void) {
LPC_TIM0->IR = 1; // clear MR0 flag
system_ms++;
}

6.4 Counter and capture examples

 Counter mode: count external pulses from a wheel encoder or flow sensor.
 Capture mode: store TC when an edge arrives, then calculate period between two captures.
 Input frequency = timer tick frequency / difference between consecutive capture counts.
Numerical: timer tick = 1 MHz. Two rising edges are captured at 120000 and 145000. Difference = 25000
ticks = 25 ms. Signal frequency = 1/0.025 = 40 Hz.

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Module 7: PWM Generation
Lecture allocation
3 hours. Teaching focus: Connect timer counting with waveform frequency, duty cycle, LED
brightness and motor speed.

PWM period, ON time and duty cycle

7.1 Basic relations

PWM frequency = timer clock / [(prescaler + 1) x (period count + 1)]

Duty cycle (%) = compare count / period count x 100

Approximate average voltage = duty ratio x supply voltage

In LPC176x PWM1, MR0 commonly defines the period and MR1-MR6 define channel duty values. The
latch-enable register transfers new match values safely into active PWM operation.

7.2 Worked numerical

Timer clock = 25 MHz. Choose prescaler so PWM counter clock remains 25 MHz. For 1 kHz PWM,
period count = 25,000. For 60% duty cycle, compare count = 0.60 x 25,000 = 15,000.

7.3 PWM programming flow

34. Enable PWM peripheral clock.
35. Select PWM output pin function.
36. Set prescaler.
37. Set period match register.
38. Set duty-cycle match register.
39. Configure match reset action.
40. Latch the match values.
41. Enable PWM channel and counter.
PWM1MR0 = 25000; // period

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PWM1MR1 = 15000; // 60% duty
PWM1MCR = (1<<1); // reset on MR0
PWM1LER = (1<<0) | (1<<1);
PWM1PCR = (1<<9); // enable PWM1 output
PWM1TCR = (1<<0) | (1<<3);

7.4 More numericals

42. T = 2 ms, Ton = 0.5 ms: duty = 25%, frequency = 500 Hz.
43. 3.3 V PWM at 75%: average voltage approximately 2.475 V.
44. 20 kHz PWM: period = 50 microseconds.

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Module 8: Analog-to-Digital Conversion
Lecture allocation
3 hours. Teaching focus: Teach sampling, resolution, reference voltage, code conversion and sensor
scaling.

ADC sampling, quantization and digital output concept

8.1 Essential terms

Term Meaning
Number of bits and smallest detectable voltage
Resolution
step.
Maximum scale used to map analog input to
Reference voltage
digital code.
Taking input measurements at discrete time
Sampling
instants.
Rounding the sampled voltage to the nearest
Quantization
digital level.
Conversion time Time required to produce a valid digital result.
One analog input connected through the ADC
Channel
multiplexer.

8.2 ADC equations

Levels = 2^N

LSB step approximately Vref / 2^N

ADC code approximately (Vin / Vref) x (2^N - 1)

Vin approximately ADC code x Vref / (2^N - 1)

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8.3 Solved numericals
45. 10-bit ADC, Vref 3.3 V: LSB = 3.3/1024 = 3.222 mV.
46. 10-bit ADC, Vin 1.65 V: code approximately 512.
47. 12-bit ADC, Vref 4.096 V: LSB = 1 mV.
48. 12-bit ADC, code 3000 and Vref 3.3 V: Vin = 3000 x 3.3/4095 = 2.418 V.

8.4 LPC176x-style ADC flow

49. Enable ADC power/clock.
50. Select analog pin function and disable digital pull mode if required.
51. Choose ADC channel in AD0CR.
52. Set ADC clock divider.
53. Start conversion.
54. Wait for DONE or use ADC interrupt.
55. Read result from AD0GDR or channel result register.
LPC_SC->PCONP |= (1u << 12); // ADC power
LPC_PINCON->PINSEL1 |= (1u << 14); // example analog pin function
LPC_ADC->ADCR = (1u << 0) | (4u << 8) | (1u << 21);
LPC_ADC->ADCR |= (1u << 24); // start now
while (!(LPC_ADC->ADGDR & (1u << 31))) { }
uint16_t adc = (LPC_ADC->ADGDR >> 4) & 0xFFF;
Sampling rule
For a band-limited signal, sampling frequency must be at least twice the highest signal frequency. In
practical systems, a higher margin and anti-aliasing filter are used.

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Module 9: UART Serial Communication
Lecture allocation
3 hours. Teaching focus: Teach frame format, baud rate, transmit/receive registers and serial
terminal debugging.

8N1 UART frame format

9.1 UART frame terminology

Notation Meaning
8N1 8 data bits, no parity, 1 stop bit
8E1 8 data bits, even parity, 1 stop bit
7O2 7 data bits, odd parity, 2 stop bits

9.2 Timing relations

Bit time = 1 / baud rate

Frame time = bits per frame / baud rate

Characters per second = baud rate / bits per frame

At 9600 baud using 8N1, one character contains 10 bits. Frame time = 10/9600 = 1.0417 ms and
maximum character rate is about 960 characters/s.

9.3 LPC176x UART0 register flow

Register Purpose
Word length, stop bits, parity and divisor-latch
U0LCR
access.
U0DLL/U0DLM Baud-rate divisor.
U0FDR Fractional divider for accurate baud rate.
U0FCR FIFO control.
U0THR Transmit holding register.
U0RBR Receive buffer register.
U0LSR Line status: transmit empty, receive ready,
ICT 3127 - ARM Cortex-M Peripheral Lecture Notes | 20
 Register Purpose
errors.
U0IER Interrupt enable register.

void uart0_putc(char c) {
while ((LPC_UART0->LSR & (1u<<5)) == 0) { }
LPC_UART0->THR = c;
}
char uart0_getc(void) {
while ((LPC_UART0->LSR & 1u) == 0) { }
return LPC_UART0->RBR;
}

9.4 Numericals
56. 115200 baud bit time = 8.68 microseconds.
57. 100 characters at 9600 baud, 8N1: 1000 bits/9600 = 104.17 ms.
58. 19200 baud, 8E1: frame has 11 bits; frame time = 572.9 microseconds.
Practical teaching
UART is the easiest way to show live ADC readings and debugging messages. Students should see one
sensor value printed to a serial terminal.

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Module 10: NVIC, External Hardware Interrupts and I/O Interrupts
Lecture allocation
3 hours. Teaching focus: Explain vector table, priority, nesting, automatic context save and ISR
discipline.

NVIC event-to-ISR flow

External push-button interrupt concept

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 Cortex-M processor block including NVIC

Source: Arm Cortex-M processor architecture reference image

10.1 Why NVIC is important

 Direct vectoring to the correct ISR.
 Programmable interrupt enable and priority.
 Nested interrupt support: higher-urgency interrupt can preempt a lower-urgency ISR.
 Automatic stacking of R0-R3, R12, LR, PC and xPSR on exception entry.
 Tail-chaining reduces overhead when one ISR follows another.

10.2 Vector table idea

Entry Meaning
0 Initial Main Stack Pointer value
1 Reset_Handler address
2 NMI_Handler
3 HardFault_Handler
11 SVC_Handler
14 PendSV_Handler
15 SysTick_Handler
16 + n External peripheral IRQn handler

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External interrupts begin at exception number 16. The vector table provides a handler address for
every exception. The VTOR register can relocate the table on many Cortex-M processors.

10.3 Priority and nesting

Critical rule
In Cortex-M priority numbering, a smaller numerical value represents higher urgency. Priority 1 can
preempt priority 4, not the opposite.

Example: UART priority = 5, Timer priority = 2. If Timer becomes pending while the UART ISR is
executing, Timer may preempt UART because 2 has higher urgency.

10.4 External interrupt configuration flow

59. Configure GPIO pin as input.
60. Select pull-up/pull-down.
61. Route GPIO line to external interrupt controller.
62. Select rising, falling or both-edge trigger.
63. Clear any old pending flag.
64. Set NVIC priority.
65. Enable the IRQ in NVIC.
66. Write ISR and clear the peripheral/EXTI flag inside it.
void EINT3_IRQHandler(void) {
if (GPIO_INT_STATUS & BUTTON_PIN) {
GPIO_INT_CLEAR = BUTTON_PIN;
button_event = 1; // defer heavy work to main loop
}
}

10.5 Polling versus interrupt

Feature Polling Interrupt
CPU behavior Checks status repeatedly Runs normal code until event
Fast hardware-triggered
Response Depends on polling interval
response
High for rare/asynchronous
CPU efficiency Poor for rare events
events
Requires ISR and concurrency
Complexity Simple
care
Very fast continuous checks or Buttons, UART RX, timer, ADC
Best use
simple loops completion, faults

10.6 Interrupt numerical

An interrupt occurs 500 times/s and each ISR takes 20 microseconds. CPU time used = 500 x 20
microseconds = 10 ms/s = 1% CPU utilization.
If exception entry takes 12 cycles at 72 MHz, entry time = 12/72 MHz = 166.7 ns.

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10.7 ISR discipline
 Keep ISR short.
 Clear the interrupt source.
 Avoid long delays and blocking loops.
 Avoid heavy printf operations inside ISR.
 Use volatile for variables shared between ISR and main code.
 Protect shared multi-byte data when atomic access is not guaranteed.

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Module 11: Integrated ARM Cortex-M Mini-Systems
Lecture allocation
0 hours. Teaching focus: Use the previous blocks to teach real system design and revision.

11.1 Mini-system A: ADC-controlled PWM with UART monitoring

Signal flow: potentiometer -> ADC -> scaling -> PWM duty cycle -> LED brightness or motor speed; ADC
count and duty cycle are sent through UART.
67. Initialize ADC, PWM and UART.
68. Read ADC value.
69. Map ADC range 0-(2^N-1) to PWM compare range 0-period.
70. Update PWM match register.
71. Print ADC and duty values through UART.
72. Optionally trigger ADC at a fixed timer rate.
adc = adc_read();
pwm_compare = (adc * PWM_PERIOD) / 4095;
pwm_set(pwm_compare);
uart_printf("ADC=%u Duty=%u%%\r\n", adc,
(pwm_compare * 100) / PWM_PERIOD);

11.2 Mini-system B: interrupt-driven keypad/LCD controller

Timer interrupt provides a 1 ms system tick. The main loop scans keypad every 5 ms, debounces keys
and updates LCD. UART is used for debugging. A long-running delay is avoided.

11.3 Mini-system C: stepper positioning system

A keypad enters the required angle. The program converts angle to steps, uses a timer to generate step
intervals, drives the motor through ULN2003, and displays progress on the LCD.

Required steps = entered angle x steps per revolution / 360

12. Quick Formula Sheet

Topic Formula
LED resistor R = (VGPIO - VF) / IF
Timer tick tick period = (PR + 1) / PCLK
Timer match delay delay = (MR + 1) x tick period
Stepper steps steps = angle / step angle
Stepper speed rpm = step frequency x 60 / steps per revolution
PWM duty D = Ton / T x 100%
PWM frequency f = 1/T
ADC LSB Vref / 2^N
ADC code Vin/Vref x (2^N - 1)
UART bit time 1/baud
UART frame time frame bits/baud
ISR CPU load event rate x ISR execution time

ICT 3127 - ARM Cortex-M Peripheral Lecture Notes | 26

13. University Question Bank
2-mark questions
73. Define memory-mapped I/O.
74. What is the use of FIODIR?
75. Why is a resistor used with an LED?
76. State the function of RS and E pins in LCD.
77. What is keypad debouncing?
78. Why does a stepper motor require a driver?
79. Define timer prescaler.
80. Define PWM duty cycle.
81. What is ADC resolution?
82. What does 8N1 mean in UART?
83. Expand NVIC.
84. What is an ISR?

5-mark questions
85. Explain active-high and active-low LED circuits.
86. Explain 4-bit LCD data transfer.
87. Describe the 4x4 keypad scanning algorithm.
88. Compare wave, full-step and half-step motor drive.
89. Explain match and capture functions of a timer.
90. Derive PWM duty-cycle and frequency relations.
91. Explain ADC quantization and reference voltage.
92. Draw UART frame format.
93. Differentiate polling and interrupt-driven I/O.
94. Explain vector table and NVIC priority.

10-mark questions
95. Design and explain an ARM Cortex-M system that reads an analog sensor, controls motor/LED
power using PWM and reports values through UART.
96. Explain complete timer/counter architecture with prescaler, match, capture and interrupt
programming.
97. Draw and explain LCD and keypad interfacing, including initialization, scanning and debounce.
98. Explain Cortex-M interrupt handling from external event to ISR return, including vector table,
priority, nesting and automatic stacking.

ICT 3127 - ARM Cortex-M Peripheral Lecture Notes | 27

14. Mixed Solved Numericals
Topic Problem Solution
PCLK = 48 MHz, PR = 47, MR0 = Tick = 1 us; delay = 10,000 us =
Timer
9999. 10 ms.
Period count = 24,000,000/2000
Timer clock = 24 MHz, target = 2
PWM = 12,000. For 35% duty, compare
kHz, no prescaler.
= 4200.
Vin = 2048 x 3.3 / 4095 =
ADC 12-bit, Vref = 3.3 V, code = 2048.
approximately 1.65 V.
Total bits = 500. Time =
UART 57,600 baud, 8N1, 50 characters.
500/57600 = 8.68 ms.
0.9 degree motor, required
Stepper Steps = 135/0.9 = 150.
angle 135 degrees.
CPU load = 2000 x 8 us = 16 ms/s
ISR load 2 kHz interrupt, ISR = 8 us.
= 1.6%.

15. Assignments
Assignment 1: GPIO, LED, switch and LCD
99. Draw memory-mapped GPIO programming flow.
100. Calculate LED resistor for two given LEDs.
101. Write register-level LED blinking logic.
102. Explain switch debounce.
103. Write LCD initialization and display sequence.

Assignment 2: Keypad, stepper, timer and PWM

104. Write 4x4 keypad scanning algorithm.
105. Calculate steps for three requested angles.
106. Design a 1 ms timer tick.
107. Design a 5 kHz PWM waveform with 70% duty cycle.
108. Explain how timer interrupt can generate stepper motor speed.

Assignment 3: ADC, UART and NVIC

109. Calculate ADC codes for five sensor voltages.
110. Calculate UART transmission time for a 200-character message.
111. Explain NVIC priority with three interrupts.
112. Design an external interrupt button circuit and ISR.
113. Design an integrated ADC-PWM-UART system.

ICT 3127 - ARM Cortex-M Peripheral Lecture Notes | 28

16. References and Figure Sources
 Uploaded IIT Kharagpur course: Embedded System Design with ARM - used for STM32F401,
PWM/interrupt, ADC, I/O, LCD and UART lecture support.
 Uploaded Embedded System Lecture Notes - used for LED, LCD, stepper motor, UART, timer, ADC
and interrupt teaching background.
 NXP UM10360 LPC176x/5x User Manual - register-level reference for LPC176x GPIO, timers, PWM,
ADC, UART and interrupts.
 Arm Cortex-M and CMSIS NVIC documentation - vector table, interrupt priority and NVIC behavior.
 Web-sourced processor/LCD illustrations are labeled below the relevant figures; original redrawn
diagrams were created specifically for these notes.

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