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The document provides an overview of operational amplifiers (op-amps), detailing their structure, functions, and characteristics. It explains various configurations such as inverting and non-inverting amplifiers, integrators, and differentiators, along with key parameters like common mode rejection ratio and input/output impedance. Additionally, it includes practical examples and calculations related to op-amp circuits.
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\ Operational ead Appi
Tnrinreduction, to Operational Amplifier + -
Reeser ea
An operational amplifier is a high gain
electnonia voltage amplifier with cao inputs and a
single outpet. operational amplifiers (Op-amp) aere asec,
to primarily. perform mathematical operations sach a
addition subtraction , integration and differentiation .
+V
Tnverding Input >
Outpect
Neon Trveting »—__| 4 er
trpat
“Vv
above ghowg the Cecut symbol of oPp-amp. d+
terminals , the inverting input and dhe
and one cutput terminal. Most oP-amp,
ply Voltages 1 ORe Positive and the
in the +igme.@
Figine above shows the equivalent Circuit of OPp-amp.
Zhe output Voltage v, % given by
Nee AL No.
Say @,~2)
Ay = open toop Nothage gain
Va = difference between the vollage at tnped steuminls
zherefore op-amp amplifies the difference bebacen
she inpzt voltage, he Zin i# the input impedance
amp. Zhe Za 4 # the output impedance of_©
achieved bg aing a differential amplifin. Zhe fanction
of the differential, aonplifien ds to amplify the difference
betaeen the input signals, This stage Provides most of- the
Voltage gain meatined..
2- Gain Stage {- he overall, gain neayrinement of the
op-amp is veg high. xhe input stage alone cannot
Provide Buch a high gain. Hhe main function ofp the gain
stage ty +o provide the additional gain nayuined. Zhe
goin stage Practicallg Contain @ chain of Cacaded
ampli tio.
3. Ondpaet Stage! athe basic requirement of- this viage %
dees oxbpack | and high cement Sourcing capability
ety dhe neojturements and &% wat
Hac input signal mode,
ard Common mode.
Cither one signal
input grounded
c applied, to the@ f
$r the single ended diffmential mode, one
inpuk is grounded and a signal Voltage 46 applied to
ake other input 3 shean in the figure below:
i Ya Op eX
asl,
. ® es ee) Ny
Gn the Cue @hen she signal Voltage is applicd +o she
inverting input > in figne G), an inverted amplified
signal voltage appese at the oatput. gn cee, when the
dignal Voltage is applied +o the non inverting inpad as
ain tigore G@), & Ton inverted amplified signal Voltage
outpet.
applied +o the inputs
prerence belucen the tno
appees at the cautped.OP ges
i wo signal volinge
gn Common mode, the
off same Pphese, frequency and magnisude ae applied
to dhe dao inputs as shoan in dhe fignre below.
Vin
-—() Yo
+
I= %.
@ken eajral input signals ane applied to bodtk inputs , thee
cdend 4to cancel reoulting ina Zero output voltage. his
action is Called common mode rejection.
Op- amp Parametow *_
ore eee
1. Common Mode Rejection Ratio 7- Unwanted Signals on
noise appeering aith same polarity on both ine op
inpet ore Common mode signals and me Cancelled by
: (appear on the output. &he
to xsject comme mode
Common Mode Rejection©
Prackical op-amps eachibit a Verg &meall
Common mode voltage 74m ard nck New thigh diff rental
mode vollage gain. dhe higher the differential Gain with
reapect to the common mode gain sthe beltn the
Performance of, the OP-amp in terms of comman made
nejeckion. Gr other aonds, higher the value of cmRR
the loan Bill be the value ef Common mode goin.
2. Moascimun Cael Voltage Saing %Ge-/ ees
Peametr indicate the maccimam Mimit: of the pea
oukpot Voltage. Lhe ideal limit iy tog » here +¥ oq
and -V.. 22 the De supply Voltage of the op-amp. An
3. Znpatie @ 5 z
of the tao ee ahus the inet cements are the
‘bee cuoents. Zhe dnpat biag Cument i the De Ceonent
supplied by the inpass of the amplifio. to propedy
operate the inpat stage. che input bias cument &
‘defined @ the average of the tao base cwrendy.
ely Shee
BxAs
5. inpet Empedance :- Zhe inpet impedance in the
dijfyerenstal mode if the total resistance belween the
oe she Ton inventing inpids os shoan beloa-
ntial mode ® obtained by
ifperential input Voltage%
7 _Output Impedance '- Zhe outpet impedance 4s she
resistance Viewed Rom the outpt terminal of} the
op-amp 23 Shean below
8 Slew Rake i- Zhe maximum rate of change ofp the
outpee vollage in response to a sdep arp volinge &
called the lea rate of the op-amp.i. ; nO)
Cheractoristics of am ideal op-amp
An ideal op-amp exchibits the fotloacng
chonacseris bics
1. Infinite Voltage gain
2. Infinite input impedance
3. Zero output impedance
: 4. Zero input off-set Voltage
S Zewo input offset cemment
6. Infinite CMRR
7. Tnpinite Slea nate
8. Infinite Bondaidth.
Concep+ of v.ahis Concept is called a3 Vintual ground
OP- amp a3 an invert Qo i fi
ee aaa eae. Splice
An trvertung amplifier & a Cincut ahase
Cup bb amplified and inverted auth ropect to the
input. Figene below shoas the Cincuit diagram of an,
dnverding amplifier. 2
ReHence tpt F
Substituting Ya =OV @@ have
= Vo
Zhe tom
i) 4s called the gain of she tnyerbing amplijor
Zhe negative sign indicate that the output is inverted
@idh nepect cto the inpuk= ®
(Since Vg is grounded , Vg =OV- Lhes ae have,
| Va =O
| Since the op-amp hag infinite input impedance, it
‘docs not draco any Cooment. Hence I, =O
HenceST ee :
ope ag an integrator |{ -
i leseals eaten ede
An integrator is a Circuit, in which the
oakped Voltage 43 propor tional to the integral of tke
inpuk Volkage, Figzre beloay shoay the cecuit diagram of
the integrator tsing op- amp
Bg the conazpt of Vintual ground, ae have
Ya-Ve = 2°
Since Vg tg grounded, Vg = OV. Xhw awe have
IOnNy,
€ input impedance, it cogon 5 ate 7) Vin CHD
dt Ric
$rte grating en both sides aon t +t
FE
ee ta f%ac® dt
Rico 1a
poe Sas yeas ate.
A diffeentiaton is a Cincait, in ahich
athe oukpat voltage te proportional to dhe time
deuivakive ef the inpat voltage. Figme shows the
diagram ofp a dijferventiater wing op-amp.©
gince the OP- amp has infinite input impedance, 1
dog not dra ang Cwment , Hence I, =9
= =
Hence te RE
cd fMin)-Yyy = Nan%o
dt
Subs titaking Vz =0 ae have,
o Ye = ~ Ree ck CH)
Op- am a3 O Non inverti ampi}i Sa
OF SE eae aa pee cih ee
Figure below shoay the Circuit diagram
ef a non inverking amplifier.
aszs
Since Vg is maintained of 2 Nolbage Vin ae have
Since the op-amp hes infinite tnpat impedance , it
does mot drag ong Cwrent- . Hence I, = 0.
Hence
EG =
Try Zp,
Ve =,
ERA Nae
ae R,
Bip NA + My Ya (Ee
Re
),
gain of the Ton inverting@
- 03 : Vo Le. cod
peo eee
A Voltage froliower ug a Cincauit in
@hich ondput” Voltage is 5°. 3 8ame as the input voltage.
Figure below shoes the cacuit of Voltage follower.
he Nede 8 is mMainteined at a Potential Vin- So
SS — it
By the Concept of Virtual ground we haveOp-amp ay a Companator *_
A Comperator is a cCincait which Smpare |
@ signal volitge applied at one inped> of the op-amp
With @ knoan nefrevence Voltage at other inpat,
Vin
Veg
Fagere shows the cCincut dj mam Of an inVertin:
“7 ¢
ComPanator adith the reference Voltage Vrog applied
E the Toninverting input. Zhe inpeck signal © applied
vertin 7 inpedt-.
e input Voltnge V,, és greater than
Vney , the output voltage is at
tM © Yee).
ve fporms me shoan belowYaar
When Viez ib set to Zao, athe comparator % called
Zero crossing detetkn. Zhe input and oxtpat anwe}onme
ane shoam below.@ :
Important oyxes-tions
1, Whak i9 an op-amp? with a neat diagram explain the
intomeal block diagram of a op- amp.
2. Explain the dypes of input mode of an op-amp
3. With nefprence db an op-amp, explain the folloaing
G) common Mode Rejeckion Ratio
Gi) Trpet offset Voltage
Gai) Slea nate.
nef erence dp an cp-amp, explain she belleaing
i Cement (i) Tnpek ampedance
GY) Mescimum Velinge saving
diagram derive the @cpresion.
an Anverting ©P- amp.
gram. derive the ccpression
Ron daverting oP-aonp
Bhoa) that an op-amp@
8. With a neat Corcuit diagram, ecplain hoa an
P= anp cad be ted an dndegrten?
4. Explain how an op-amp can be med as a Voltage
Pellosess
10. With a neat cincait diagram, Scplain hoa an ©P-amp
"Gould be med ag a diffyorend:i ator?
uy
Explain op-amp ay Voboge Cmpanaten.: Op- ame -
7 Op- Tet
a’. A common base transistor amplifier has an input resistance of 20 9 and output resistance of 100 kA. The
collector load is 1 kQ. If a signal of 500 mV Is applied between emitter and base, find the voltage
\C amplification, Assume a,c to be nearly one.
Solution:
Fig.1 shows the conditions of the problem. Here the output resistance is very high as compared to input
resistance, since the input junction (base to emitter) of the transistor is forward biased while the output
junction (base to collector) is reverse biased.
poonen
ee ig o
Le T
500mV ©) Rin= 200 | OOK R= kA Vong
Signal _
R,
Input cument, fp = =25mA. Since ois nearly 1, output curent, fe = Ie =
25mA.
Output voltage, Vig = IcRe = 25 mA X1kQ = 25V
Vig n25 Valery
signal 500 mV
3 Voltage amplification. A,
\.2/1f'a common base connettion, IE = mA, C= 0.95mA. Calculate the value of 1B
Using the relation. Ip = IptIc
1 = 1g+095
i 1-0.95 = 0.05 mA
Q3. Ina common base connection, current amplification factor is 0.9. If the emitter current is 1mA, determine
the value of base current.
Solution :
Here, @ = 0.9.
I,
ow a- fe
a Ie = Glg = 0.9X1 = 0.9mA
Also Tg = IptIo
Base current, Ig = Ig-I¢ = 1-0.9 = O.1mA
ff a common base connection, IC = 0.95 mA and IB = 0.05 mA. Find the value of a.
Solution :
Weknow Ip = Ip+Ic = 0.05+0.95 = 1
I
“erent amplification factor, & = 7° = 38 0.95
E
6. In a common base connection, the emitter current is 1mA. If the emitter circuit is open, the collector
current is 50 [/A. Find the total collector current. Given that a= 0.92.
Solution :Here, [p = 1mA.a = 0.92. Icyq = 50 pA
Total collector current, fe = Otlg+Icyo = 0.92 1+50x 10%
= 0.92+0.05 = 0.97 mA
Q6. Ina common base connection, a = 0.95. The voltage drop across 2 k@ resistance,which is connected in
the collector is 2V. Find the base current.
Settition :
Ip Io
Veg Veg re
Fig. 2 shows the required common base connection.
The voltage drop across RC (= 2 kQ) is 2V.
S Ic = 2V2kQ = 1mA
Now a =IAg
Using the relation. Ip =
I,
0.05 mA
pe base circuit shown in Fig. 3, determine Ic and Ves. Assume the transistor to be of silicon.
4 I
le Ie.
Ro=12ka
Vec=18V
Fig. 3
Solution :
Since the transistor is of silicon, Vg = 0.7V.
Applying Kirchhoff’s voltage law to the emitter-side loop,we get,plying Kirchhoff's voltage law to the collector-side loop, we have,
Ve c
Veg = Voe~!eRe
= 18 V-4.87 mA x 1.2kQ = 12.169
Q8, Find the value of 6 if (i) & = 0.9 (ii) a = 0.98 (iii) a = 0.99.
Solution =
3 I Re k Ven
()a=09
1-a
Gi) a= 0.98
=49
= 99
= 0.99
B -a .
YQ0Lalculate I; in a transistor for which B = 50 and Ip= 20 pA.
Solution :
Here B = 50, I, = 20nA = 0.02mA
1
Now =
ow B 7
Ip = Bly = 50x0.02 = 1mA
Using the relation, Ip = [+I = 0.02+1 = 1.02mA
40. Find the rating of the transistor shown in Fig. 4. Hence determine the value of
Ic using both o and B rating of the transistor.
1
Ic
p=49
12mA
Fig.4
Solution :
Fig. 8.20 shows the conditions of the problem,
ciety Paes B40 y'9g
1+B 1+49
The value of Jc can be found by using either oL or B rating as
under:
Ie = Gf, = 0.98 (12 mA) = 11.76 mA
Also Ic = Bly = 49 (240 WA) = 11.76 mAistor, B = 45 and voltage drop across 1kQ which is connected in the
1 volt. Find the base current for common emitter connection.
Fig. 5
Fig. 5 shows the required common emitter connection. The voltage drop across RC (= 1 kQ) is 1 volt.
iv
To = Tpq = ima
If
on 2ee:
Now tse
Ip = = 0,022 mA
B45
QA transistor is connected in common emitter (CE) configuration in which collector supply is 8 V and the
voltage drop across resistance Rc connected in the collector circuit is 0.5 V. The value of Rc= 800 0. If a= 0.96,
determine : (i) collector-emitter voltage (ii) base current,
Solution :
Fig. 6 shows the required common emitter connection with various values.
Collector-emitter voltage,
@ Vee = Yoc- 0.5 = 8-0.5 = 7.5V
di)The voltage drop across Rc (= 800 Q) is 0.5V.
‘c= ae = 2 mA = 0.625 mA
Nose B a 0.96
Base curent, Jy = 36 = SSP
Q13. An n-p-n transistor at room temperature has its emitter disconnected. A voltage of 5 V is applied
between collector and base. With collector positive, a current of 0.2 HA flows. When the base is disconnected
and the same voltage is applied between collector and emitter, the current is found to be 20 WA. Find a, leand
Jy when collector current is 1. mA.
Solution :
E c
F
|
t if
o SV (ii) 5V
Fig.7
OPEN
When the emitter circuit is open as shown in Fig.7 (i), the collector-base junction is reverse biased. A
small leakage current Icyo flows due to minority carriers.
Tego = 0.2 uA given
When base is open [See Fig. 8.23 (i)], a small leakege current [ego flows due to minority carriers.
eo .-. given
Jeno
We know Icgq = mca
‘
20 =
oe 1-a
x a = 09
Now Tapas ea
Here Ig = mA = 1000 pA; & = 0.99; logo = 0.2 nA
1000 = 0.99xI,+0.2
or iP ae 1010 pA
and Ip = Ip—tc = 1010-1000 = 10 pA
Q14. The collector leakage current in a transistor is 300 HA in CE arrangement. If now
the transistor is connected in CB arrangement, what will be the leakage current? Given that B = 120.
Solution :
Tego = 300 pA0.992
= 1 =e
B= 20: a=55
12041
lie
‘cao
Teo = T=a
Tego = (1 &) Tego = (1 ~ 0.992) x 300 = 24 BA
Note that leakage current in CE arrangement (i.e. Icgq) is much more than in CB arrangement
Now.
Gillen.)
, (ie Jeno)
\ 015-Fora certain transistor, In=20 1A; 1e=2 mA and B= 80. Caleulate Teno.
\Sélution :
To = Bla* lero
or 2 = 80* 002 +Icr9
= 2-80 «0.02=0.4mA
; BeeesOe
Now alot = 0988
7 Tego = (1-9) Iceo = (1 - 0.988) « 0.4 = 0.0048 mA
\ Q1eAUsing diagrams, explain the correctness of the relation Tcro = (B+ 1)lcno-
Solution :
‘The leakage current ICBO is the current that flows through the base-collector junction when
emitter is open as shown is Fig. 8.
EMITTER
OPEN
Fig. 8
When the transistor is in CE arrangement, the base current (ie. Icyo) is multiplied by B in the collector as
shown in Fig, 9.
I cad
(B+1) ego.
Fig9
Tceo = Icao* Bleso = (B* 1) Icao
au. Determine Vcp in the transistor circuit shown in Fig. 10 (i). The transistor is of silicon and has B=
150.ution :
ReZ100Q
Ry
Vee WW]
fe wo
| Vgp=5V
Zl i
@ (CO)
Fig 10
Fig. 10 (i) shows the transistor circuit while Fig. 10 (ii) shows the various currents and voltages along
with polarities.
Applying Kirchhoff's voltage law to base-emitter loop, we have,
Vip Ty Ry Voe= 0
or Ig = SS aera
iss Te = Bly =(150)(430 WA) = 64.5 mA.
Now Vee = Vec-IeRe
10V — (64.5 mA) (100) = 10V - 6.45V =3.55V,
= Veg* Vag
Veg = Vee~Vag = 3-.55-0.7 = 2.85V
18. In a transistor, 8 #A, Ip = 30 mA and f = 440, Determine the a rating of the transistor. Then
‘determine the value of Ic using both the a rating and B rating of the transistor.
Solution :
papa Beeass0 S'g
o= B+1 44041 oa
Io =
Io =
(9. A transistor has the following ratings : Ic (may = 500 mA and Bmax = 300.
Determine the maximum allowable value of Ip for the device.
Solution :
1, 500 mA
(max)
|, = sq = ADO LOMAS
fb mat) = Br S00 a
For this transistor. if the base current is allowed to exceed 1.67 mA, the collector current will exceed its
maximum rating of 500 mA and the transistor will probably be destroyed.