Dr.R.S.

Rampriya,
SCORE, VIT.

06-08-2025 ISWE401L ES & IoT 1

Module 2 – Designing
an Embedded System
Using 8 Bit
Microcontroller -
8051

06-08-2025 ISWE401L ES & IoT 2

Factors To Be Considered In Selecting
Controller

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Feature Set
• Does the MCU support required interfaces (Serial, Parallel, I2C,
SPI)?
• Are timers, counters, and I/O ports sufficient?
• Is there built-in ADC/DAC support for signal processing?
• Does it meet the required performance?
• Example: An STM32F103 MCU is ideal for sensor-based systems
with built-in ADC and multiple serial interfaces.

06-08-2025 ISWE401L ES & IoT 4

Speed of Operation
• Performance is measured in MIPS (Million Instructions Per
Second).
• Depends on:
• Clock speed (e.g., 16 MHz, 72 MHz)
• Cycles per instruction
• Crucial for real-time or high-speed tasks.
• Example: ESP32 offers up to 240 MHz clock speed—ideal for Wi-
Fi-based real-time applications.

06-08-2025 ISWE401L ES & IoT 5

Code Memory Space
• Sufficient Flash memory needed for application code (especially
with C/C++ projects).
• Avoid running out of space for firmware updates or extended
features.
• Example: ATmega328P in Arduino Uno has 32 KB Flash—
suitable for basic control apps but not large-scale image
processing.

06-08-2025 ISWE401L ES & IoT 6

Data Memory Space
• Refers to RAM (on-chip) for storing variables, buffers, and data
structures.
• Larger data-intensive applications like image buffers or data logs
require more RAM.
• Example: Raspberry Pi Pico (RP2040) has 264 KB SRAM, better
than ATmega328P’s 2 KB.

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Development Support
• Check for:
• IDE support (e.g., Arduino IDE, STM32CubeIDE)
• Sample codes, dev kits, and technical support
• Third-party ecosystem
• Example: TI LaunchPad series provides strong toolchain
support with Code Composer Studio and extensive libraries.

06-08-2025 ISWE401L ES & IoT 8

Availability
• Availability ensures smooth prototyping and mass production.
• Check Lead time from suppliers and manufacturer continuity.
• Example: MCUs like ATmega328P remain widely available due to
Arduino’s popularity.

06-08-2025 ISWE401L ES & IoT 9

Power Consumption
• Low power = longer battery life, smaller and cheaper power
supply
• Check for sleep modes, low-power modes, and operating
voltage
• Example: MSP430 from TI is designed for ultra-low power—ideal
for wearable and remote IoT sensors.

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Cost
• Cost must align with target market and production volume.
• Balance features and price.
• Example: ESP8266 provides Wi-Fi + GPIOs at a very low price &
great for low-cost IoT projects.

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Summary
Factor Key Question Example MCU
Feature Set Are peripherals adequate? STM32F103
Speed Is the clock/MIPS sufficient? ESP32
Code Memory Enough Flash for firmware? ATmega328P
Data Memory Enough RAM for variables? RP2040
Development Support Are tools and docs available? TI LaunchPad
Availability Is the MCU easy to source? ATmega328P
Power Consumption Does it support low-power modes? MSP430
Cost Is the MCU cost-effective for your market? ESP8266

 Choose a controller by matching application needs with technical features.

 Perform comparative analysis of options before finalizing.
 Always keep scalability, support, and cost in mind.

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 Designing with 8051

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Why 8051?
• Highly versatile and cost-effective microcontroller.
• Designed for real-time industrial control with fast bit-level
manipulation using a Boolean processor.
• Supports 6 interrupts: 2 External, 2 Timer, 2 Serial.
• Has 32 I/O lines (4 × 8-bit ports), 2 × 16-bit Timers/Counters and
Full Duplex Serial Interface (UART)
• Widely supported by 20+ vendors with 100+ enhanced variants:
• Support for CAN, USB, SPI, TCP/IP, LCD, ADC/DAC, extended I/O.
• AT89C51 (Atmel) available for < $1/unit.
• Ideal for large-scale production in embedded and IoT devices.

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8051 Architecture

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8051
 8051 is a microcontroller. This means it has an internal processor,
internal memory and an I/O section.
 The architecture of 8051 is thus divided into three main sections:
• The CPU
• Internal Memory
• I/O components.

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CPU
 8051 has an 8 bit CPU.
 It contains the following units:
Component Function
ALU Performs arithmetic and logic operations
Accumulator (A) Stores data and results of operations
B Register Used for multiplication and division
Program Counter (PC) Tracks the next instruction address
DPTR (DPL + DPH) Accesses external memory/code
PSW Holds status flags and bank select bits
Instruction Register Holds and decodes current instruction
Temporary Register Holds intermediate ALU results

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ALU
❖ Performs 8-bit arithmetic and logic operations.
❖ Example:
• ADD A, R0 ; Adds contents of A register and R0 register and
stores the result in A register.
• ANL A, R0 ; Logically ANDs contents of A register and R0
register and stores the result in A register.
• CPL P0.0 ; Complements the value of P0.0 pin. A-
Accumulator

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A Register
 It is an 8-bit register.
 In most arithmetic and logic operations, A register hold the first
operand and also gets the result of the operation.
 Moreover, it is the only register to be used for data transfers to
and from external memory.
 Example:
• ADD A, R1 ; Adds contents of A register and R1 register and
stores the result in A register.
• MOVX A, @DPTR ; A gets the data from External RAM
location pointed by DPTR

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Cont…
Assembly Code:
• MOV A, 10 // Load 10 into Accumulator
• ADD A, 5 // Add 5 to A using ALU
What Happens:
• MOV A, 10: Accumulator (A) holds 10.
• ADD A, 5: ALU performs the addition: 10 + 5 = 15 & Accumulator (A)
stores the result (15).
ALU is the unit that performs calculations.
Accumulator (A) is the register that stores inputs/results of those
calculations.
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B Register This puts decimal 5
into register A, but
written as 05H to
 It is an 8-bit register. follow hex format.
 It is dedicated for Multiplication and Division.
 Example: Multiplication Using B Register
• MOV A, #05H ; Load 5 into Accumulator
• MOV B, #03H ; Load 3 into B register
• MUL AB ; Multiply A * B → Result = 15
 After Execution:
• A = 0FH (15 decimal) → lower 8 bits of result
• B = 00H → upper 8 bits (only used if result > 8 bits)
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Cont…
Example: Division Using B Register
• MOV A, #0AH ; A = 10
• MOV B, #03H ; B = 3
• DIV AB ;A/B
After Execution:
• A = 03H → Quotient
• B = 01H → Remainder

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Program Counter
 Points to the address of next instruction to be executed from ROM
 It is 16 bit register means the 8051 can access program address from
0000H to FFFFH. i.e., 0 to 65,535 bytes (64 KB; 1 KB=1024 bytes).
 A total of 64KB of code.
 Initially PC has 0000H
 ORG instruction is used to initialize the PC
▪ ORG 0000H means PC initialize by 0000H
 PC is incremented after each instruction.

06-08-2025 ISWE401L ES & IoT 23

Cont…
 16-bit Program Counter (PC):
• A 16-bit register can store values from 0000H to FFFFH in hexadecimal.
• In decimal, that means values from 0 to 65,535 bytes (64 KB; 1
KB=1024 bytes).
 "64KB of Code":
• This means the 8051 microcontroller can fetch and execute instructions
stored in 64KB of program memory.
• All instructions must reside at addresses between 0000H and FFFFH.
 Ex: If your code is stored at address 2000H, the PC will go to that address
and fetch the instruction there. Since the PC is 16-bit, it can directly access
any location within 64KB of memory.

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DPTR (Data Pointer)
 DPTR is a 16-bit register used to store addresses of external or
internal memory locations.
 DPTR is divided into two 8-bit registers DPH (DP higher byte)
and DPL (DP lower byte).
 Example:
• MOVX A, @DPTR ; A gets the data from External RAM location
pointed by DPTR // MOVX access external data memory
• MOVC A, @A+DPTR ; A gets the data from ROM location pointed
by A + DPTR //MOVC access lookup tables in code memory

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DPTR Examples
 Example 1: Setting DPTR Using DPH and DPL Separately
• MOV DPH, #12H ; High byte (upper 8 bits)
• MOV DPL, #34H ; Low byte (lower 8 bits) ; Now DPTR = 1234H
• MOVX A, @DPTR ; Read from external RAM at address 1234H
 Explanation: DPH = 12H → 0001 0010, DPL = 34H → 0011 0100, So, DPTR = 1234H
• MOVX A, @DPTR ; fetches data from external memory at address 1234H
 Example 2: Using DPTR as a Whole
• MOV DPTR, #1234H ; Load full 16-bit address into DPTR
• MOVX A, @DPTR ; Read data from external memory at 1234H
• Behind the scenes: The 8051 internally sets, DPH = 12H & DPL = 34H

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SP STACK POINTER
 It is an 8-bit register.
 It contains address of the top of stack.
 The Stack is present in the Internal RAM.
 Internal RAM has 8-bit addresses from 00H……7FH. Hence
SP is an 8-bit register.
 It is affected during Push and Pop operations.
 During a Push, SP gets incremented.
 During a Pop, SP gets decremented.
Element Location Role
SP (register) Inside CPU (SFR) Holds the address in RAM for the current top of the stack
Stack Data In RAM The actual values pushed/popped are stored in internal RAM (00H–7FH)

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PSW PROGRAM STATUS WORD
 It is an 8-bit register.
 Also called Flag registers. These flags indicate status of the current result.
 They are changed by the ALU after every arithmetic or logic operation.
 The flags can also be changed by the programmer.
 Each bit can be individually set or reset by the programmer.
 The bits can be referred to by their bit numbers (PSW.4) or by their name
(RS1).
 Example:
• SETB PSW.3 ; Makes PSW.3 1
• CLR PSW.4 ; Makes PSW.4 0

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Cont…
 8 bit register means each bit can be set or reset independently

 Register Bank Ex.: MOV PSW, #10H ; Set RS1=0, RS0=1 → Select Register Bank 1
RS1 RS0 Register Bank
0 0 Bank 0 (R0–R7)
0 1 Bank 1
1 0 Bank 2
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1 1 Bank 3
PSW

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Cont…

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Cont…
• In the 8051 microcontroller, the overflow flag (OV) is a 1-bit
flag in the Program Status Word (PSW) register. It is used to
indicate when the result of a signed arithmetic operation
exceeds the range that can be represented in 8 bits (i.e., -128 to
+127 in 2’s complement format).
• Overflow Calculation in Binary (8-bit ADD):
• Formula:
• OV = Carry into bit 7 Carry out of bit 7
• Where, " " = XOR
• Bit 7 is the MSB (sign bit) in signed numbers.
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Cont…
• MOV A, #01111111B ; A = +127 (Max positive)
• ADD A, #00000001B ; Adding +1
• Binary addition:
01111111 (127)
+ 00000001 ( 1)
--------------
10000000 (-128)
• Carry into bit 7 = 1
• Carry out of bit 7 = 0
• OV = 1 0=1
• * OV = 1 → Over low occurred (Result is out of +127 range)

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Cont…

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Cont…

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8051 PIN DIAGRAM

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8051 PIN DIAGRAM

EA – External Access
ALE – Address Latch Enable
PSEN – Program Store Enable
In PORT 3,
RXD, TXD – Serial Port
INT0, INT1 – Interrupts
06-08-2025 ISWE401L ES & IoT T0, T1 – Timer Inputs
37
WR, RD – Control Inputs
XTAL1, XTAL2
• These are connected to the crystal oscillator.
• The typical operate in frequency is 12 MHz
• In Serial communication based applications, the operating
frequency is chosen to be 11.0592 MHz, in order to derive the
standard universal baud rates (9600).

06-08-2025 ISWE401L ES & IoT 38

Reset
• It is used to reset the 8051 microcontroller. On
reset PC becomes 0000H.
• This address is called the reset vector address.
• From here, 8051 executes the BIOS program
also called the Booting program or the monitor
program.
• It is used to set-up the system and make it
ready, to be used by the end-user.

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ALE
• It is used to enable the latching of the address. The
address and data buses are multiplexed.
• This is done to reduce the number of pins on the
8051 IC.
• Once out of the chip, address and data have to be
separated that is called demultiplexing.
• This is done by a latch with the help of ALE Signals.
ALE is “1” when the bus carries addresses and “0”
when the bus carries data.
• This informs the latch, when the bus is carrying
address so that the latch captures only address and
not the data.

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EA’
• It decides whether the first 4kb of program memory space
(0000H………0FFFH) will be assigned to internal ROM or
External ROM.
• If EA = 0, the External ROM begins from 0000H.
• In this case the Internal ROM is discarded. 8051 now uses
only External ROM.
• If EA = 1, the External ROM begins from 1000H.
• In this case the Internal ROM is used. It occupies the space
0000H………0FFFH.

PSEN
• Program Status Enable is the READ signal for External ROM.

VCC & GND

• These are power supply pins. 8051 works at +5V / 0V power supply.
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I/O PORTS

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I/O PORTS – Alternate Functions

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P0.0-P0.7
• These are 8 pins of Port 0.
• We can perform a byte operation (8-bit) on the whole port 0.
• We can also access every bit of port 0 individually by performing bit operations like set, clear,
complement etc.
• The bits are called as P0.0……P0.7.
• Additionally, Port 0 also has an alternate function.
• It carries the multiplexed address data lines.
• A0-A7 (the lower 8 bits of address) and D0-D7 (8 bits of data) are multiplexed into AD0-AD7.
• In any operation address and data are not issued simultaneously. First, address is given, then
data is transferred. Using a common bus for both, reduces the number of pins.
• To identify if the bus is carrying address or data, we look at the ALE signal.
• If ALE = 1, the bus carries address,
• If ALE = 0, the bus carries data.

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P1.0-P1.7
• These are 8 pins of Port 1.
• We can perform a byte operation (8-bit) on the whole port 1.
• We can also access every bit of port 1 individually by performing
bit operations set, clr, cpl, etc on P1.0….P1.7
• Port 1 also has NO alternate function

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P2.0-P2.7
• These are 8 pins of Port 2.
• We can perform a byte operation (8-bit) on the whole port 2.
• We can also access every bit of port 2 individually by performing
bit operations set, clr, cpl, etc on P2.0….P2.7
• Additionally, Port 2 also has an alternate function. It carries the
higher order address lines A8-A15.

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P3.0-P3.7
• These are 8 pins of Port 3.
• We can perform a byte operation (8-bit) on the whole port 3. We
can also access every bit of port 3 individually.
• The bits are called as P3.0……P3.7.
• The various pins of Port 3 have a lot of alternate functions.

06-08-2025 ISWE401L ES & IoT 47

Cont…
• P3.0 (RXD) and P3.1 (TXD):
• They are used to receive and transmit serial data.
• This forms the serial port of 8051.
• P3.2 (INT0) and P3.3 (INT1):
• They are external hardware interrupts of 8051.
• If they occur simultaneously, INTO is by default higher priority.
• P3.4 (T0) and P3.5 (T1):
• They are used timer clock inputs.
• They provide external clock inputs to Timer 0 and Timer 1.
• P3.6 (WR) and P3.7 (R D ):
• They are used as control signals for External RAM.
• 8051 can access 64 KB External RAM from 0000H to FFFFH.

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I/O PORTS – Alternate Functions

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8051– External Memory

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MEMORY ORGANIZATION
• The 8051 has two types of memory: Program Memory and Data
Memory.
• Program Memory (ROM) - Permanently save the program being
executed,
• Data Memory (RAM) - Temporarily storing data and intermediate
results created and used during the operation of the
microcontroller.
• Depending on the model in use at most a few Kb of ROM and 128
or 256 bytes of RAM is used.

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Types of Memory in 8051
• 8051 operates with 4 different memories:
• Internal ROM
• External ROM
• Internal RAM
• External RAM
• Being based on Harvard Model, 8051 stores programs and data in
separate memory spaces.
• Programs are stored in ROM, whereas data is stored in RAM.
• Microcontrollers are used in appliances like washing machines, remote
controllers, microwave oven, etc.

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EXAMPLES
• Here programs are generally permanent in nature and very rarely need
to be modified. Moreover, the programs must be retained even after the
device is completely switched off. Hence programs are stored in
permanent (nonvolatile) memory like ROM.
• Data on the other hand is continuously changed at runtime. For
example current temperature, cooking time etc. in an oven. Such data is
not permanent in nature and will certainly be modified in every usage
of the device. Hence Data is stored in writeable memory like RAM.
• However, sometimes there is permanent data, such as ASCII codes or 7-
segment display codes. Such data is stored in ROM, in the form of Look
up tables and is accessed using a dedicated addressing mode called
Indexed Addressing mode.

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ROM ORGANIZATION/PROGRAM MEMORY/ CODE MEMORY

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Cont…
• EA (External Access) pin decides whether internal ROM is used.
• Set EA = 0 to bypass internal ROM and fetch code only from external memory.
1. Only Internal ROM (EA’=1)
• Uses 4 KB internal ROM only (0000H – 0FFFH)
• Application: Small embedded systems like thermometers, calculators.
2. Internal + External ROM (EA’=1)
• First 4 KB from internal ROM (0000H – 0FFFH)
• Additional 60 KB from external ROM (1000H – FFFFH), Total = 64 KB (0000H –
FFFFH).
• Application: Moderate-size systems like data loggers, industrial timers.
• 3. Only External ROM (EA’=0)
• Entire 64 KB from external ROM (0000H – FFFFH)
• Application: Complex embedded systems requiring large codebase such as motor
control units, menu-driven user interfaces

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 • Storage for variables,

STRUCTURE OF
counters, buffers, and
stack overflow
• General data

INTERNAL RAM manipulation during

program execution.
• Can perform
both byte and bit
operations
• SETB 00H; Will
• 8051 has a 128 Bytes of internal RAM. store “1” on LSB
of location 20H.
These are 128 locations of 1 Byte each. • CLR 07H; Will
• The address range is 00H……..7FH. store “0” on MSB
of location 20H.
• This RAM is used for storing data.
• It is divided into three main parts:
 Register Banks,
 Bit addressable area and • Can be used as general
 A general purpose area. purpose registers makes
programming easier and
faster.
• Access data by either its
name or location. Ex:
MOV A, R0; MOV A, 00H.
• Used for fast and direct
register-level access
during instruction
06-08-2025 ISWE401L ES & IoT execution. 56
Register Banks
• The first 32 locations (Bytes) of the Internal RAM from 00H….1FH,
are used by the programmer as general purpose registers.
• Having so many general purpose registers makes programming
easier and faster.
• Hence the 32 registers are divided into 4 banks, each having 8
Registers R0…R7.
• The first 8 locations 00H….07H are registers R0….R7 of bank 0.
• Similarly, locations 08H…..0FH are registers R0……R7 of bank 1
and son.
• A register can be addressed using its name, or by its address.

06-08-2025 ISWE401L ES & IoT 57

Examples
• Location 00H can be accessed as R0, if Bank 0 is the active bank.
• MOV A, R0 ;”A” register gets data from register R0.
• It can also be accessed as Location 00H, irrespective of which bank
is the active bank.
• MOV A, 00H ;”A” register gets data from location OOH.
• The appropriate bank is selected by the RS1, RS0 bits of PSW.
• Since PSW is available to the programmer, any Bank can be
selected at runtime.
• Bank 0 is selected by default, on reset.
06-08-2025 ISWE401L ES & IoT 58
BIT ADRESSABLE AREA
• The next 16- bytes of RAM, from 20H….2FH, is available as Bit
Addressable Area.
• We can perform ordinary byte operations on these locations, as
well as bit operations.
• As each location has 8-bits, we have a total of 16 X 8 = 128
Addressable Bits.
• These bits can be addressed using their individual address
00H….7FH.
• SETB 00H; Will store as “1” on the LSB of location 20H.
• CLR 07H; Will store a “0” on the MSB of location 20H.

06-08-2025 ISWE401L ES & IoT 59

Cont…
• Normal “Byte” operations can also be performed at the addresses:
20H……2FH. MOV 20H, #00H; Will store a “0” on all 8-bits of location
20H.
• The entire internal RAM is of 128 bytes so the address range is
00H…7FH.
• The bit addressable area has 128 bits so its bit addresses are also
00H….7FH.
• This means every address 000H…7FH can have 2 meanings, it could be
a byte address or a bit address.
• This does not lead to any confusion, because the instruction in which
we use the address, will clearly indicate whether it is a bit or a byte
operations.
• SETB, CLR etc. are bit ops whereas ADD, SUB etc. are byte operations.
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GENERAL PURPOSE AREA
• The general-purpose area ranges from locations 30H…. 7FH.
• This is an 80-byte area which can be used for general data storage.

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SFR
• The Special Function Registers (SFRs) are memory-mapped
registers located in the upper 128 bytes of the internal RAM
(address range 0x80 to 0xFF) of the 8051 MCU.
• They are used to control and monitor the various internal
operations of the microcontroller.
• Assembler will substitute addresses for every 21 SFR during
opcode conversion.

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SFR (SPECIAL
FUNCTION
REGISTER)
• 8051 has 21, 8-bit Special
Function registers.

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 SFR Name Address Purpose
P0 0x80 Port 0
SP 0x81 Stack Pointer
DPL 0x82 Data Pointer Low Byte
DPH 0x83 Data Pointer High Byte
PCON 0x87 Power Control
TCON 0x88 Timer Control
TMOD 0x89 Timer Mode
Common SFRs TL0
TH0
0x8A
0x8C
Timer 0 Low Byte
Timer 0 High Byte
with Addresses P1
SCON
0x90
0x98
Port 1
Serial Control
SBUF 0x99 Serial Buffer (for Tx/Rx)
P2 0xA0 Port 2
IE 0xA8 Interrupt Enable
P3 0xB0 Port 3
IP 0xB8 Interrupt Priority
PSW 0xD0 Program Status Word
ACC 0xE0 Accumulator
06-08-2025 B
ISWE401L ES & IoT 0xF0 B Register 64
ADDRESSING MODES IN 8051
MICROCONTROLLER
What are Addressing Modes?
• Techniques to access data operands in instructions.
• Define how the CPU locates the data required for execution.
• Key to writing efficient assembly code.
Types of Addressing Modes in 8051
1. Immediate Addressing
2. Register Addressing
3. Direct Addressing
4. Register Indirect Addressing
5. Indexed Addressing
Immediate Addressing Mode
• Operand is specified immediately in the instruction.
• Normally the data must be preceded by a # sign.
• Used to transfer the data into any of the registers including DPTR.
• Example:
• MOV A, # 27 H: The data (constant) 27 is moved to the accumulator
register
• ADD R1, #45 H: Add the constant 45 to the contents of the accumulator
• MOV DPTR, # 8245H: Move the data 8245 into the data pointer register.
• MOV P1, #21H: Move the data 21 to PORT1
Register Addressing Mode
• Operand is in one of the registers R0–R7 (from current bank).
• Example:
• MOV A, R0: Move the contents of the register R0 to the accumulator
• ADD A, R6: Add the contents of R6 register to the accumulator
• MOV P1, R2: Move the contents of the R2 register into port 1
• MOV R5, R2: This is invalid .The data transfer between the
registers is not allowed.
Direct Addressing Mode
• Operand is directly in internal RAM or SFR.
• Access by address, not by register name.
• Example:
• MOV R1, 42H: Move the contents of RAM location 42 into R1 register
• MOV 49H, A: Move the contents of the accumulator into the RAM
location 49.
• ADD A, 56H: Add the contents of the RAM location 56 to the
accumulator
Register Indirect Addressing Mode
• The address of the operand is held in a register (R0 or R1 only).
• Example: MOV R0, #40H
• MOV A, @R0 ; Move data from address 40H into A
Indexed Addressing Mode
• Used to access lookup tables in program memory.
• Uses base register (DPTR) + offset (A).
• Example: MOV DPTR, #3000H
• MOVC A, @A+DPTR ; Read code memory at (A + DPTR) into A
Why Use Indexed Addressing?
• Store constant values like patterns, fonts, codes in ROM
• ROM is non-volatile and ideal for static data
• Useful for applications like 7-segment display patterns
• Enables accessing large lookup tables efficiently
ROM’s 7-Segment Lookup Table
Address Data (Hex) Digit
4000H 3FH 0
4001H 06H 1
4002H 5BH 2
4003H 4FH 3
4004H 66H 4
4005H 6DH 5
4006H 7DH 6
4007H 07H 7
4008H 7FH 8
4009H 6FH 9

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Lookup Table Example
• Example: Display digit '5' on 7-segment display
• Table stored in ROM starting at 4000H

• MOV DPTR, #4000H

• MOV A, #05H
• MOVC A, @A+DPTR ; Fetch from 4005H

• Result: A = 6DH → 7-segment code for digit 5

Comparison Table
• Immediate: MOV A, #45H – Fast & simple
• Register: MOV A, R1 – Efficient
• Direct: MOV A, 30H – Flexible
• Register Indirect: MOV A, @R0 – Good for loops
• Indexed: MOVC A, @A+DPTR – Used for ROM access
8051 Instruction Set
• The instruction set of the 8051 microcontroller is the complete
list of binary commands the processor understands.
• These commands tell the CPU what operation to perform like
moving data, performing arithmetic, or controlling program flow.

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Categories of 8051 Instruction Set
• 8051 instructions are broadly divided into five major groups:
Category Function
1. Data Transfer Move data between registers/memory
2. Arithmetic Perform arithmetic operations
3. Logical Perform bitwise and bytewise operations
4. Branching Change the flow of execution
5. Bit Manipulation Operate on individual bits

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Arithmetic Instructions
• Used for addition, subtraction, multiplication, division.
Instruction Definition Example
ADD A, src Add src to A ADD A, #1AH
ADDC A, src Add src + Carry to A ADDC A, R1
SUBB A, src Subtract with borrow SUBB A, #0FH
INC operand Increment operand INC DPTR
DEC operand Decrement operand DEC A
MUL AB Multiply A × B → A = low, B = high MUL AB
DIV AB Divide A ÷ B → A = quotient, B = remainder DIV AB
DA A Decimal adjust after BCD addition DA A

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Logical Instructions
• Used for bitwise operations, rotations, comparisons.
Instruction Definition Example
ANL A, src Logical AND between A and src ANL A, #0F0H
ORL A, src Logical OR between A and src ORL A, R3
XRL A, src Logical XOR between A and src XRL A, 40H
CLR A/C Clear accumulator or carry CLR C
CPL A/C Complement A or carry CPL A
RL A Rotate accumulator left RL A
RR A Rotate accumulator right RR A
RLC A Rotate A left through carry RLC A
RRC A Rotate A right through carry RRC A
SWAP A Swap nibbles in accumulator SWAP A

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Data Transfer Instructions
• These are used to move data between registers, internal/external
memory and SFRs.
Instruction Definition Example
MOV dest, src Move data from source to destination MOV A, R1 - Copy R1 to A
MOVC A, @A+DPTR Move from code memory (ROM lookup) MOVC A, @A+DPTR
MOVX A, @DPTR Move from external RAM to A MOVX A, @DPTR
MOVX @DPTR, A Move A to external RAM MOVX @DPTR, A
PUSH direct Push byte onto stack PUSH 30H
POP direct Pop byte from stack POP 30H
XCH A, Rn Exchange A with Rn XCH A, R2
XCHD A, @Ri Exchange lower nibble of A with memory XCHD A, @R0

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Branching Instructions
• Used for altering the sequence of instruction execution.
Instruction Definition Example
SJMP rel Short jump (±128 bytes) SJMP LOOP
LJMP addr16 Long jump to absolute 16-bit address LJMP 2000H
AJMP addr11 Absolute jump to 11-bit address AJMP 100H
JC rel Jump if carry set JC NEXT
JNC rel Jump if carry not set JNC RETRY
JZ rel Jump if A is zero JZ SKIP
JNZ rel Jump if A not zero JNZ AGAIN
CJNE A, src, rel Compare and jump if not equal CJNE A, #30H, LABEL
DJNZ Rn, rel Decrement and jump if not zero DJNZ R4, LOOP
CALL addr16 Call subroutine LCALL FUNC
ACALL addr11 Absolute call to subroutine ACALL FUNC
RET Return from subroutine RET
RETI
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Bit Manipulation Instructions
• Used for bit-level operations on registers, memory, and SFRs.
Instruction Definition Example
SETB bit Set bit to 1 SETB P1.0
CLR bit Clear bit to 0 CLR P3.7
CPL bit Complement bit CPL P2.1
MOV C, bit Copy bit to carry MOV C, P0.5
MOV bit, C Copy carry to bit MOV P1.6, C
ANL C, bit AND carry with bit ANL C, P1.2
ANL C, /bit AND carry with complement of bit ANL C, /P2.3
ORL C, bit OR carry with bit ORL C, P1.3
JBC bit, rel Jump if bit set and clear it JBC P1.4, NEXT
JB bit, rel Jump if bit is set JB P3.1, HIGH
JNB bit, rel Jump if bit is not set JNB P2.7, LOW
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Summary Table
Category Examples
Data Transfer MOV, MOVC, MOVX, XCH, PUSH, POP
Arithmetic ADD, SUBB, INC, DEC, MUL, DIV
Logical ANL, ORL, XRL, CLR, CPL, RL, RR
Branching SJMP, LJMP, JZ, CJNE, DJNZ, CALL
Bit Manipulation SETB, CLR, CPL, JBC, MOV C, bit

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 SAMPLE ASSEMBLY
LANGUAGE PROGRAMMING
(ALP)

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1. Write an ALP for adding 2 16 bit
numbers.
MOV DPTR, #2040H ; Load DPTR with 2040H (second operand)
MOV A, #22H ; Lower byte of first operand
ADDC A, DPL ; A = 22H + 40H (DPL), carry if any
MOV DPL, A ; Store result in DPL

MOV A, #42H ; Higher byte of first operand

ADDC A, DPH ; A = 42H + 20H (DPH) + carry
MOV DPH, A ; Store result in DPH

END

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2. Write an ALP for adding 2 8 bit
numbers
MOV A, #10H ; Load immediate value 10H (decimal 16) into accumulator A
MOV B, #10H ; Load immediate value 10H (decimal 16) into register B
ADD A, B ; Add contents of B to A → A = A + B = 16 + 16 = 32 (decimal)
END ; End of program

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3. Write an ALP for performing 16 BIT
BCD addition
MOV DPTR, #2040H ; Load 16-bit address 2040H into Data Pointer (DPTR)
MOV A, #22H ; Load A with lower BCD byte (e.g., 22 in BCD = decimal 22)
MOV B, #42H ; Load B with higher BCD byte (e.g., 42 in BCD = decimal 42)

ADDC A, DPL ; Add A + DPL (lower byte of DPTR) + Carry (from previous op, initially 0)
DA A ; Decimal Adjust A to correct BCD result
MOV DPL, A ; Store adjusted BCD result back into DPL

MOV A, B ; Load higher BCD byte from B into A

ADDC A, DPH ; Add A + DPH (higher byte of DPTR) + Carry from previous addition
DA A ; Decimal Adjust A again to get valid BCD result
MOV DPH, A ; Store adjusted higher byte back into DPH

END ; End of program

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4. Write an ALP for performing factorial
MOV DPTR, #1000H ; Load 16-bit address 1000H into Data Pointer (DPTR)
MOVX A, @DPTR ; Move external RAM value at address 1000H into accumulator A
MOV R1, A ; Copy the value in A into register R1
MOV A, #01H ; Load the value 1 into accumulator A (starting value for factorial)

LOOP: MOV B, R1 ; Copy the current R1 value into register B

MUL AB ; Multiply A × B → result: low byte in A, high byte in B
DJNZ R1, LOOP ; Decrement R1; if R1 ≠ 0, jump to label LOOP

MOVX @DPTR, A ; Store the final result from A back into external RAM at address 1000H
END ; End of program

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5. Write an ALP for finding the fibonacci
series
MOV DPTR,#1000H MOV A,B
MOV R0,#09H MOVX @DPTR,A
MOV A,#00H MOV A,#00H
MOV B,#01H
MOV B,#01H LOOP:ADD A,B
DEC R0 INC DPTR
DEC R0 MOVX @DPTR,A
MOVX @DPTR, A XCH A,B
DJNZ R0,LOOP
INC DPTR END

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Sample Program
MOV A, #25H ; Immediate (Data Transfer)
ADD A, #13H ; Arithmetic
JZ SKIP ; Branching
CPL A ; Logical
SKIP: MOV P1, A ; I/O Port Write (Data Transfer)

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