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Decoder

The document outlines an experiment conducted in a Digital Logic Design Laboratory focused on understanding decoders and their implementation using various logic gates. It details the objectives, apparatus used, theoretical background on 2 to 4 and 3 to 8 line decoders, and the solutions to specific problems related to decoder design. The discussion highlights the learning outcomes, including the design of larger decoders and the importance of the enable input.

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3 views6 pages

Decoder

The document outlines an experiment conducted in a Digital Logic Design Laboratory focused on understanding decoders and their implementation using various logic gates. It details the objectives, apparatus used, theoretical background on 2 to 4 and 3 to 8 line decoders, and the solutions to specific problems related to decoder design. The discussion highlights the learning outcomes, including the design of larger decoders and the importance of the enable input.

Uploaded by

fahimsarwar867
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

United International University

Department of CSE

Course Code : CSE 1326


Course Name : Digital Logic Design Laboratory

Experiment no. :4
Experiment name : Decoder and their implementation

Name : Sarwar Murshed

ID : 0112430410

Section : A

Date of Performance : 21/08/2025

Date of Submission : 27/8/2025


Objective:
The purpose of this lab is to explore how decoders work by building
different types using simple logic gates, more complex gates or
by connecting smaller decoders together (3 to 8 decoder from 2
to 4 decoder). This experiment also aims to give a deeper
understanding of decoders and how they function in digital
circuits.
Apparatus/Instruments used in the Lab:
1. 2 to 4 decoders
2. 3 to 8 decoders
3. Trainer board
4. Logisim software
5. AND, OR , NOT , X-OR gates

6. Active low 8 pin decoders IC (74LS138)


Theory:
Decoder : A decoder is a digital circuit that takes a set of binary
inputs and turns them into a specific output. If there are N input
bits, the decoder can have up to 2^n outputs. Only one of these
outputs is active at a time, depending on the input value. In
simple terms, it “decodes” the input combination and lights up
the matching output line.
There are various types of decoders . Among them two are
discussed below.
2 to 4 line decoder : A 2 to 4 line decoder, there is a total of two
inputs A0 , A1 and a enable key ‘E’ and four outputs lines
(Y0 to Y3). When the enable ‘E’ is set to 1(ON), the decoder
checks the values of A0 and A1. Based on the combination of
these two inputs, one of the four outputs (Y0,Y1,Y2,Y3) and
will be set to 1 while the rest stay at 0 for each combination of
inputs. Only one output is active at a time , depending on the
input.
3 to 8 line decoder : A 3 to 8 line decoder also called a binary
to octal decoder which has three inputs (A0,A1,A2) and one
Enable input ‘E’ and eight outputs (Y0 to Y7). When the enable
input ‘E’ is 1, the decoder uses the three input values to activate
one of the eight outputs. Only the output that matches the binary
value of the inputs will be 1 and the rest will be 0.

Solution of the mentioned problems:


1. Pin diagram of 74139 (2 to 4 decoders with enable)
2. Logic diagram of 3 to 8 line decoder using implementation
using basic gates
-Using 2 to 4 line decoder with enable

3. Logic diagram of combi-national circuits using 3 to 8


decoder :
F = M1 * M3 * M6 * M7

4. Implementing the following function to 3 to 8 line decoder


using design 2 to 4 line decoder :
F = m0 + m2 + m4 + m5
Discussion: After completing this experiment , I learned a lot
about how decoders work and how they are used in digital
systems. I understood how to design larger decoders by
connecting smaller ones together. I also learned the role of the
enable input and how it controls the operation of the decoder.
In addition, I learned how to use a truth table to create the logic
circuit and write the output expression for a decoder.

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