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W13 Tutorial Example Question

The document outlines the design of a circuit to implement a 4-point FFT on a processor using a finite state machine and additional hardware for single clock cycle execution. It details the necessary components, their delays, and asks for a maximum clock frequency for each design, along with a discussion of their advantages and disadvantages. Additionally, it suggests using pipelining to enhance the performance of the second design and inquires about the new maximum clock frequency.

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3 views1 page

W13 Tutorial Example Question

The document outlines the design of a circuit to implement a 4-point FFT on a processor using a finite state machine and additional hardware for single clock cycle execution. It details the necessary components, their delays, and asks for a maximum clock frequency for each design, along with a discussion of their advantages and disadvantages. Additionally, it suggests using pipelining to enhance the performance of the second design and inquires about the new maximum clock frequency.

Uploaded by

Asif
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Suppose you have the following processor as in your project.

Design a circuit to implement the 4-point FFT on a processor. You can assume x0, x1, x2 and x3
are always initially stored in R0, R1, R2 and R3

1. Using a Finite State Machine


2. Using additional hardware that could be implement the FFT In a single clock cycle. Draw
a diagram of a parallel circuit using as little hardware as possible (you can use
adders/registers/basic gates/multipexers)
3. Assume the following delays:
• Tsetup/thold/dq = negligible
• Tristate buffer = 1ns
• Adder = 10ns
• Bus delays = 1ns
• Basic Gates = 2ns
• Multiplexer = 2ns

What is the maximum clock frequency of each design?

4. Discuss advantages/disadvantages of each implementation.


5. Discuss how to use pipelining to speed up your answer to question 2, what is your new
maximum clock frequency?

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