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MICROPROCESSOR
Microprocessor is an integrated chip that fetch instructions from the memory and provides results
by executing them.

Microprocessor Bit of Microprocessor Memory Capacity Technology

4004 4 bits 640 B PMOS
8085 8 bits 64 KB NMOS
8086 16 bits 1 MB HMOS

PROGRAMMING LANGUAGES

Fig. 1.1

Low Level Languages

It is platform specific language.
For example, Machine Language and Assembly Language.
Machine Language: Its instructions are written in binary pattern.
Assembly Language: In this language binary patterns are replaced by mnemonics i.e., short English
word.
Assembler: It is a software that converts assembly language into machine language.

High Level Languages

These are platform independent languages.
Compiler: It reads the whole program at once and produce its object code which is machine
understandable language that means converts high level language program into machine level
language.
Interpreter: It is a software which reads one instruction at a time from source code and produce its
object code.

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Note: Bit:- Short form of Binary digit, it may be 0 or 1.

1 Nibble = 4 bits
1 Byte = 8 bits

8085 MICROPROCESSOR

Fig. 1.2

Note:
• It is an 8-bit microprocessor.
• It is based on NMOS technology.
• Total number of memory location that can interfaced with 8085 is 64 K location. Therefore,
its memory capacity is 64 KB.
• It has 40-pin integrated chip.
• Inward pins = 21 and Outward pins = 27
• It has 16-bit unidirectional address bus and 8-bit bidirectional data bus.
• Clock frequency is 3 MHz.

Address and Data bus

• 16-bit unidirectional address bus and 8-bit bidirectional data bus.
• Lower 8-pins of address bus are multiplexed with data bus (AD0 – AD7).
• Memory capacity = (2 N  d ) bits
Where, N = No. of address bus
d = Number of data bus

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Control and Status pin

• WR = 0 → Perform write operation

• RD = 0 → Perform read operation
• In 8085, five pins are active low

Serial I/O pins

These pins are used to transfer the data serially by the use of RIM and SIM instructions.
• SID = 1 → Serial input data
• SOD = 0 → Serial output data

Externally Initiated Signals

Interrupt Signals:
• In 8085, there are five pins of hardware interrupts.
• Priority order: TRAP > RST 7.5 > RST 6.5 > RST 5.5 > INTR
• TRAP has highest priority and INTR has lowest priority.
• TRAP is also known as RST 4.5.
• TRAP is edge and level triggered.

Note:
Maskable interrupt: TRAP
Non-maskable interrupt: RST 7.5, RST 6.5, RST 5.5, INTR
Vectored interrupt: TRAP, RST 7.5, RST 6.5, RST 5.5
Non-vectored interrupt: INTR
• RST 0, RST 1, RST 2, RST 3, RST 4, RST 5, RST 6, RST 7 are software interrupts.

HOLD : It is used by another controller to request the microprocessor to use address, data and
control signal.
HLDA: It is hold acknowledgement signal.
READY: If READY is high then it indicates that the processor is ready to send or receive data.
RESET IN: Used to reset the program counter.

INTERNAL ARCHITECTURE OF 8085

• Register unit
• Timing and control unit
• Interrupt control unit

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Register unit

Fig. 1.3

Note: In 8085, there are eight 8-bit register and two 16-bit register.
Accumulator:
All arithmetic and logical operations are performed in accumulator and the result is stored in the
accumulator.

Flag register:
In 8085, five flags are defined at the different bits of flag registers.

Fig. 1.4

Note:
• Status of flag is affected according to the result of arithmetic and logic operation.
• If in the result of accumulator,
Number is positive, S = 0
Number is negative, S = 1
If all bits are zero, Z = 1
Any bit is one, Z = 0
If number of one’s are even, P = 1
Number of one’s are odd, P = 0
If carry is present at MSB, CY = 1 otherwise, CY = 0
If carry passes from lower nibble to upper nibble (D3 → D4), AC = 1 otherwise, AC = 0

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Stack Pointer
• It is a 16-bit special purpose register.
• Stack pointer holds the address of top of the stack that defined inside the memory.

Program Counter
• It is 16-bit special purpose register that holds the address of next instruction to be fetched.

PSW (Program Status Word)

• It is a 16-bit register in which higher 8-bit are accumulator and lower 8-bit are flag register.

Fig. 1.5

Note:
• For the storage of 16-bit data two registers are combined in pair such as BC, DE, HL pair.
• Higher byte of 16-bit data always stored in higher order register. Whereas lower order byte of
data store in lower order register.

INSTRUCTIONS IN 8085

Flowchart of Program Execution

Fig. 1.6

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Instructions:
• Command that is given to microprocessor to perform a task.

Fig. 1.7

TYPES OF INSTRUCTIONS IN 8085

• Data transfer instructions
• Arithmetic and logical instructions
• Branching and conditional instructions
• Machine control instructions

Data Transfer Instructions

Machine No. of
Instruction Opcode Operand T-States
cycle Bytes

MOV Rd, Rs: Move the data from source

MOV Rd, Rs 1 4 1
register Rs to destination register Rd.

MVI Rd, 8-bit data: Move immediate 8- Rd, 8-bit

MVI 2 7 2
bit data to destination register Rd. data

LXI Rp, 16-bit data: Load immediate Rp, 16-bit

LXI 3 10 3
register pair with 16-bit data. data

STA 16-bit address: Store accumulator

16-bit
with the data whose address is given in STA 4 13 3
address
the instruction.

LDA 16-bit address: Load the

16-bit
accumulator with the data whose address LDA 4 13 3
address
is given in the instruction.

LDAX Rp: Load the accumulator with

the data whose address is given in the LDAX Rp 4 13 3
register pair Rp.

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Arithmetic and Logical Instructions

Machine No. of
Instruction Opcode Operand T-States
cycle Bytes

ADD R: Add the data of given register to

ADD R 1 4 1
the accumulator.

ADI 8-bit data: Add immediate the 8-bit

ADI 8-bit data 2 7 2
data to the accumulator.

ADC R: Add the data of given register to

ADC R 1 4 1
accumulator with carry.

ACI 8-bit data: Add immediate the 8-bit

ACI 8-bit data 2 7 2
data to accumulator with carry.

SUB R: Subtract the data given in a

SUB R 1 4 1
register from accumulator.

CMP R: Compare the data of given

CMP R 1 4 1
register with accumulator.

CMA: Complement of accumulator. CMA – 1 4 1

ORA R: Logical OR operation of the

ORA R 1 4 1
data in given register with accumulator.

ANA R: Logical AND operation of the

ANA R 1 4 1
data in given register with accumulator.

XRA R: Logical XOR operation of the

XRA R 1 4 1
data in given register with accumulator.

ORI 8-bit data: Logical OR operation of

ORI 8-bit data 2 7 2
8-bit data immediately with accumulator.

ANI 8-bit data: Logical AND operation

of 8-bit data immediately with ANI 8-bit data 2 7 2
accumulator.

XRI 8-bit data: Logical XOR operation

of 8-bit data immediately with XRI 8-bit data 2 7 2
accumulator.

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Branching and Conditional Instructions

Machine No. of
Instruction Opcode Operand T-States
cycle Bytes

CALL 16-bit address: Unconditional 16-bit

CALL 5 18 3
subroutine call. address

RET: Unconditionally return from

RET – 3 10 1
subroutine.

JMP 16-bit address: Jump 16-bit

JMP 3 10 3
unconditionally at the given location. address

Machine control instructions

Machine No. of
Instruction Opcode Operand T-States
cycle Bytes

PUSH Rp: Push register pair on to the

PUSH Rp 3 12 1
stack.

POP Rp: Pop of the stack to the register

POP Rp 3 10 1
pair.

RIM: Read Interrupt Mask RIM – 1 4 1

SIM: Set Interrupt Mask SIM – 1 4 1

IN 8-bit address: Input data to the 8-bit

IN 3 10 2
accumulator from the given 8-bit address. address

OUT 8-bit address: Output data from

8-bit
the accumulator to the given 8-bit OUT 3 10 2
address
address.

HLT: Stop the operation of processor. HLT – 1 4/5 1

Addressing Modes
Register Addressing Mode
The address of the data given in the form of register.
Example: MOV B, C
Direct Addressing Mode
The address of the data given directly in the instructions.
Example: IN 10 H, OUT 30 H
Immediate Addressing Mode
Data itself given in the instructions.
Example: MVI B, 50 H

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Indirect Addressing Mode

If the address of the data given in the form of the content of register than it is indirect addressing
mode.
Example: MOV B, M
Implicit Addressing Mode
Address of data is not required; it is defined in opcode only.
Example: CMA

8086 MICROPROCESSOR

Fig. 1.8

Note:
• It is a 16-bit microprocessor.
• It is based on HMOS technology.
• Maximum memory that can be access with 8086 is 1 MB.
• It has 40-pins integrated chip.
• It has multiplexed address and data bus (AD0 - AD15 and A16 - A19).
• It has 20 address lines and 16 data lines.
• Clock frequency is 5 MHz.
• Size of flag register = 16 bit
• No. of flags = 9
• Memory segmentation concept is used in 8086, whereas in 8085 normal memory concepts
are used.

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Registers of 8086

Category of Register No. of bits Name of Register

Accumulator (AX)
General Purpose Base Addressing Register (BX)
16
Register Counter for Loop operations (CX)
Pointer for Data in I/O operations (DX)

Pointer 16 Stack Pointer (SP), Base Pointer (BP)

Index 16 Source Index (SI), Destination Index (DI)

Code Segment (CS), Data Segment (DS),

Segment 16
Stack Segment (SS), Extra Segment (ES)

Instruction 16 Instruction Pointer (IP)

Flag 16 Flag Register

Note:
In 8086, general purpose register can be accessed either 16 or 8-bits.
For example, AH: Upper half of AX
AL: Lower half of AX

Flag Register
• 8086 has 16-bit flag register in which nine flags are presents.
• 3 control flags – Direction, Interrupt enable, Trap.
• 6 status flags – Overflow, Sign, Zero, Auxiliary carry, Parity, Carry.

Fig. 1.9

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8051 MICROCONTROLLER

• It is an 8-bit microcontroller.
• It has 128 bytes of RAM and 4K bytes of on-chip ROM.
• It has 16-bit address and data buses.
• 32 general-purpose registers of 8-bit each.
• 16-bit timer (usually 2, but may have more or less).
• 40 pins in a dual in-line package (DIP).

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Pins 1-8
These pins are known as port 1. This port does not serve any other instructions. It is internally pulled
up, bidirectional I/O port.
Pin-9
It is a RESET pin, which is used to reset the microcontroller to its initial values.
Pins 10-17
These pins are known as port 3. This port serve some function like interrupt time input, control
signal, serial communication signals RXD and TXD, etc.
Pins 18-19
These pins are used for interfacing an external crystal to get the system clock.
Pin 20
This is PSEN pin which stand for program store enable. It is used to read a signal from the external
program memory.
Pin 21-28
These pins are known as port 2. It serve as I/O port. Higher order address bus signal are also
multiplexed
Pin 29
This is PSEN pin which stand for program store enable. It is used to read a signal from the external
program memory.
Pin 30
This is a ALE Pin which stands for address latch enable. It is used to de-multiplex the address data
signal of port.
Pin 31
This is a EA pin which stands for External Access input. It is used to enable/disable the external
memory interface.
Pins 32-39
These pins are known as port 0, It serve as I/O Port, lower order address and data bus signals are
multiplexed using this port.
Pin 40
This pins used to provide power supply to the circuit.
In 8051 there are six types of addressing mode.
Addressing Mode Examples
Immediate addressing mode MOV A, # 0AFH. (Load 0AF into A)
Register addressing mode MOV A, R5 (Copy the content of R5 into A)
Direct addressing mode MOV R2, 45H (Copy the content of 45H in R2)
MOV A; @ R0 (Move content of RAM location whose
Register indirect addressing mode
address is held by R0 into A
Indexed addressing mode MOVC A, @ A + DPTR
Implied addressing mode RLA

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Some important microcontroller ICs

Intel 8155 The 8155 includes 256 bytes of RD/WR memory i.e. RAM, 3 I/O ports and
a 16 bit timer.
Intel 8255 The 8255 is widely used programmable parallel I/O device. It can be
programmed to transfer data under various conditions from I/O to interrupt
I/O
Intel 8251 (Programmable Communication interface) Intel 8251 is also known as
universal synchronous/asynchronous receiver/transmitter.
Intel 8253 (Programmable Interval Timer) The programmable counter is used in real
time application of timing and counting such as BCD.
Intel 8257 (Programmable DMA Controller) Intel 8257 DMA Controller chip is a 40-
pin programmable integrated Circuit. The DMA controller chip 8257 works
in two modes slave mode and master mode.
Intel 8259 (Programmable Interrupt controller) It designed for the 8085 and Intel 8086
microprocessor. The 8259 combines multiple interrupt input source into a
signal interrupt output to the host microprocessor.
Intel 8272 (Floppy Disk Controller) The function of floppy disk controller is to
interface a floppy disk system to a microprocessor.
Intel 8275 (Programmable CRT Controller) an Intel 8275 is a single chip device. Its
function is to interface CRT raster scan display with the microcomputer.
Intel 8279 (Programmable Keyboard/display) The INTEL 8279 is keyboard/Display
controller specially developed for interfacing keyboard and display device
to Intel 8085, 8086 and 8088 microprocessor.
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