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Q1) Explain in words the operations specified by the following register transfer notation:
(a) R2 R2 + 1, R1 R
(b) R3 R3 - 1
(c) If (S1 = 1) then (R0 R1) else if (S2 = 1) then (R0 R2)
Q2) Design the controller whose state diagram is shown in Fig.1. Use D flip‐flops.
FIGURE 1
Q3) Prove that the multiplication of two n‐bit numbers gives a product of length less than
2n bits
Q4) What is the value of E in each HDL block, assuming that RA = 1?
(a) RA = RA - 1; (b) RA <= RA - 1;
if (RA == 0) E = 1; if (RA == 0) E <= 1;
else E = 0; else E <= 0;
Q5) Using HDL, assume that:
A = 4b0110, B = 4b0010, and C = 4b0000. Evaluate the result of the following operations:
1. A * B;
2. A + B;
3. A - B;
4. ~C;
5. A & B;
6. A | B;
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7. A ^ B;
8. & A;
9. ~|C;
10. A || B;
11. A && C;
12. |A;
13. A < B;
14. A > B;
15. A != B;
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A D flip-flop (Data or Delay flip-flop) is a type of sequential logic circuit that
stores and transfers data based on a clock signal. It is widely used in digital
electronics for data storage, registers, and clocked operations.
Working of D Flip-Flop
• The D (Data) input determines the next state of the flip-flop.
• On the clock (CLK) edge (rising or falling, depending on the design), the
value at the D input is transferred to the Q output.
• The output remains the same until the next clock edge.
Tutorial_1
24MTRN07I