Regulation – 2022 (CBCS Scheme) MICROCONTROLLERS – BEC405A

MODULE: 01: MICROCONTROLLERS - INTRODUCTION:

SYLLABUS:

TEXT BOOK:

1. The “8051 Microcontroller and Embedded Systems – Using Assembly and C”, Muhammad Ali
Mazidi and Janice Gillespie Mazidi and Rollind. Mckinlay; Phi, 2006 / Pearson, 2006.
2. “The 8051 Microcontroller”, Kenneth j. Ayala, 3rd edition, Thomson/Cengage Learning.
3. “Programming And Customizing The 8051 Microcontroller”.Myke Predko Tata Mc Graw-Hill
Edition 1999 (reprint 2003).
REFERENCEBOOKS:

1. “The 8051 Microcontroller Based Embedded Systems”, Manish K Patel, McGraw Hill, 2014,
ISBN: 978-93-329-0125-4
2. “Microcontrollers: Architecture, Programming, Interfacing and System Design”, Raj Kamal,
Pearson Education, 2005.

MICROCONTROLLER: Introduction

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• A microcontroller is a small integrated circuit, usually composed of a central processing unit, memory,
parallel input and output interfaces, a clock generator, one or more analog-to-digital converters, and
serial communication interfaces.
OR
• A microcontroller is a compact integrated circuit designed to perform a specific task in an
embedded system. It is a self-contained system with a processor, memory, I/O ports, Serial Port
Timers and Counters and other peripherals, all on a single chip.
• Microcontrollers are widely used in automatically controlled products and devices, such as
automobile engine control systems, implantable medical devices, remote controls, office machines,
appliances, power tools, toys, and other embedded systems.
Key Components of a Microcontroller:
• Central Processing Unit (CPU):
o The brain of the microcontroller that executes instructions from the memory.
• Memory:
o Flash/ROM: Stores the program code.
o RAM: Stores temporary data during program execution.
o EEPROM: Stores data that must be retained even when the power is off.
• Input/output Ports (I/O):
o Allow the microcontroller to interact with external devices, such as sensors, actuators, and
other peripherals.
• Timers/Counters:
o Used for timing operations, counting events, or generating precise time delays.
• Analog-to-Digital Converter (ADC):
o Converts analog signals (from sensors) to digital data that the CPU can process.
• Digital-to-Analog Converter (DAC):
o Converts digital data to analog signals (used in some microcontrollers).
• Communication Interfaces:
o UART, SPI, I2C: Enable communication with other devices or microcontrollers.
o USB, CAN, and Ethernet: Advanced communication protocols in some microcontrollers.
• Clock Generator:
o Provides the timing signal for the CPU and other components.
• Interrupts:
o Allow the microcontroller to respond to external or internal events in real-time.
Applications of Microcontrollers:
• Consumer Electronics: TVs, remote controls, washing machines, etc.
• Automotive: Engine control units, airbag systems, infotainment systems.
• Industrial Automation: Robotics, PLCs, motor control.
• Medical Devices: Pacemakers, glucose monitors, infusion pumps.
Criteria for Choosing a Microcontroller:
• Meeting the computing needs of the task at hand efficiently and cost effectively
• Speed

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• Packaging
• Power consumption
• The amount of RAM and ROM on chip
• The number of I/O pins and the timer on chip
• How easy to upgrade to higher performance or lower power-consumption version
• Cost per unit
• Availability of software development tools, such as compilers, assemblers, and debuggers
• Wide availability and reliable sources of the microcontroller
• The 8051 family has the largest number of diversified (multiple source) suppliers
o Intel (original)
o Atmel
o Philips/Signetics
o AMD
o Infineon (formerly Siemens)
o Matra
o Dallas Semiconductor/Maxim
MICROCONTROLLER Vs MICROPROCESSOR
[Link] Microcontroller Microprocessor
01

02 Microcontroller contains the circuitry of Microprocessor contains ALU, General purpose

microprocessor, and in addition it has built in ROM, registers, stack pointer, program counter, clock
RAM, I/O Devices, Timers/Counters etc. timing circuit, interrupt circuit
03 It has few instructions to move data between memory It has many instructions to move data between
and CPU memory and CPU
04 It has many bit handling instructions Few bit handling instruction
05 More number of pins are multifunctional Less number of pins are multifunctional
06 Separate memory map for data and code(program) Single memory map for data and code (program)
07 Less access time for built in memory and IO. Access time for memory and IO are more
08 It requires less additional hardware Microprocessor based system requires additional
hardware
09 Limited number of instructions with few addressing Large number of instructions with flexible
modes addressing modes
10 On – chip device: Highly integrated Silicon chip that Off – chip device: Silicon chip contains CPU, which
contains ROM, RAM, I/O ports, timers and counters in capable of performing arithmetic and logical
single chip operations
11 Low cost low power consumption High cost and high power consumption
12 Small architecture: Small Memory Large architecture: Large Memory

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RISC Vs CISC
[Link] RISC CISC
01 Reduced Instruction Set Computer Complex Instruction Set Computer.
02 Faster due to simple and less instructions Slower due to complex instructions and More number
of instructions.
03 Instructions are pipelined and increased execution No instruction pipelining and slow execution speed.
speed
04 Large number of registers are available Less number of general purpose register are available.
05 The operations are performed on registers only. The Operations are performed either in registers or
memory operations are load and store memory depending on the instructions
06 Single instructions , Fixed-length instructions More, variable instructions
07 Harvard architecture Harvard or Von Neumann architecture will be
followed
08 Orthogonal instructions Non – orthogonal instructions
(All instruction types use addressing mode)
09 Small, simple, and highly optimized set of Large, complex, and versatile set of instructions.
instructions.
10 Single clock cycle for most instructions Multiple clock cycles for complex instructions
11 More power-efficient due to simpler design. Less power-efficient due to complex hardware.
12 ARM, MIPS, RISC-V, AVR, PIC x86 (Intel, AMD), 8051, Z80.
13 Embedded systems, mobile devices, IoT, real-time Desktop PCs, servers, legacy systems.
applications.
14 Simpler, requires more RAM for storage More complex, requires less RAM

PROCESSOR ARCHITECTURES: PRINCETON Vs HARVARD

[Link] PRINCETON( VON – NEUMANN ) HARVARD ARCHITECTURE
01

Single memory for both data and instructions. Separate memories for data and instructions.
02 Single bus for data and instruction transfer Separate buses for data and instruction transfer.
(shared).
03 Slower due to data and instructions compete for Faster as data and instructions can be fetched
bus access. simultaneously.
04 Simpler design with a single memory and bus More complex due to separate memories and
system buses.
05 Lower cost due to simpler hardware. Higher cost due to additional hardware (separate
memories and buses).
06 General-purpose computing Embedded systems, DSPs (Digital Signal
Processors), microcontrollers.

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07 Von Neumann is simpler and cheaper to Harvard is more complex and expensive due to
implement the need for separate memories and buses.
08

FEATURES OF 8051:
• 8 bit CPU , 16 bit Address lines
• On chip clock oscillator
• 5 addressing modes: Immediate, Direct, Indirect, Register and Indexed addressing mode
• CISC (Complex Instruction Set Computing): Supports a rich set of instructions.
• Harvard Architecture: Separate memory for program and data
o 4Kbytes of internal program memory (code memory) [ROM]
o 128 bytes of internal data memory [RAM]
▪ Working registers [00 – 1F]
▪ Bit addressable memory area [20 – 2F]
▪ General purpose memory area (Scratch pad memory) [30-7F]
o 60 Kbytes of external program memory address space.
o 64 Kbytes of external data memory address space.
• 4 I/O Ports (P0, P1, P2, P3): Each is an 8-bit port (Total: 32 I/O lines).32 bi directional I/O lines
• Two 16-bit timers/counters:
o T0, T1 Used for timing operations, frequency generation, and event counting.
• UART (Universal Asynchronous Receiver-Transmitter):
o Supports Full Duplex serial data receiver/transmitter register (SBUF).
o SBUF holds the byte to be transmitted or the received byte, when serial communication is used.
• 4 Register banks with 8 registers in each bank.
• 16 bit Program counter (PC) and a data pointer (DPTR)
• 8 Bit Program Status Word (PSW)
• 8 Bit Stack Pointer
• Five vector interrupt structure (RESET not considered as an interrupt.)
o Two External and Three Internal Interrupt sources.
o Interrupts are events which interrupt the normal sequence of execution of instructions.
• 21 Special Function Registers (SFRs)

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o Includes Accumulator (A), B register, Stack Pointer (SP), Program Status Word (PSW) etc
• ALU can perform arithmetic and logic functions on 8 bit variables.
• 12 MHz Default Clock Frequency: Executes one machine cycle in 12 clock cycles.
• Control Registers: TCON, TMOD, SCON, PCON, IP and IE which controls the operations of the timers,
serial port and interrupts.
Block diagram 8051

1. Program Memory (ROM/Flash):

o Stores the program code (instructions) to be executed by the microcontroller.
o Typically 4 KB of on-chip ROM in the 8051.
o Stores the program code permanently.
2. Data Memory (RAM):
o Stores temporary data during program execution.
o Typically 128 bytes of on-chip RAM in the 8051.
3. CPU (Central Processing Unit) – Executes instructions and controls operations.
4. ALU (Arithmetic Logic Unit):
o Performs arithmetic (addition, subtraction) and logical (AND, OR, XOR) operations.
5. Registers:
o Accumulator (A): Used for arithmetic and data transfer operations.
o B Register: Used for multiplication and division.
o R0-R7: General-purpose registers.
o DPTR (Data Pointer): Used for accessing external memory.
o PC (Program Counter): Points to the next instruction to be executed.
o SP (Stack Pointer): Manages the stack for function calls and interrupts.
6. Instruction Decoder:
o Decodes the instructions fetched from program memory and controls the execution.
7. Timing and Control Unit:

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o Generates control signals and manages the timing of operations.

8. I/O Ports:
o P0, P1, P2, P3: 8-bit bidirectional I/O ports
o For interfacing with external devices.
9. Serial Communication Port (UART):
o Used for serial communication (e.g., with a PC or other devices).
o Enables communication with other devices via TX and RX pins
10. Interrupt Control:
o Signal activated by an I/O device to alert CPU
o Manages interrupt signals from external or internal sources.
o 5 Interrupts – Handles external and internal interrupts
o 2 External Interrupts (INT0, INT1),
o 3 Internal Interrupts (TF0, TF1, [SERIAL INTERRUPT RI, TI])
11. Timer/Counter:
o Two 16-bit timers/counters (Timer 0 and Timer 1)
o Timing and counting operations.
o Used for generating time delays and counting events.
12. Oscillator (Clock Circuit):
o Provides the clock signal for synchronizing operations.

Architecture 8051
► 8051 microcontroller generic part includes a whole family of microcontrollers that have numbers
ranging from 8031 to 8751 and are available in N-Channel Metal Oxide Silicon (NMOS) and
complementary Metal Oxide Silicon (CMOS) construction in a variety of package type.
► Arithmetic and Logic Unit: Performs arithmetic and logical operations on 8-bit data.
► Registers of 8051:
► A and B registers:
• These two 8-bit registers hold the result of many arithmetic and logical operations of the CPU
and they are bit-addressable registers i.e., each bit can be accessed for reading or for altering.
• Accumulator (A) is used in many operations, including addition, subtraction, integer
multiplication, division, Boolean bit manipulation. Also used for data transfers between 8051
and any external memory.
• Register B may be used as a location where data may be stored. It is also used with register A
for multiplication and division operations and has no other function.
MEMORY:

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• Program Memory (ROM/Flash):

o Stores the program code (instructions) to be executed by the microcontroller.
o Typically 4 KB of on-chip ROM in the 8051.
o Stores the program code permanently.
• Data Memory (RAM):
o Stores temporary data during program execution.
o Typically 128 bytes of on-chip RAM in the 8051.
• The 128 bytes of internal RAM is organized as below.
o (i) Four register banks (Bank0,Bank1, Bank2 and Bank3)
▪ Each of 8-bits (total 32 bytes). The default bank register is Bank0.
▪ The registers are named as R0-R7 .
o (ii) 16 bytes of bit addressable area
▪ 16 bytes (from address 20H to 2FH) are bit-addressable, meaning each individual bit
can be directly accessed.
o (iii) 80 bytes of general purpose area (Scratch pad memory)
▪ This area is also utilized by the microcontroller as a storage area for the operating stack.
▪ General Purpose RAM:
• The remaining 80 bytes (from address 30H to 7FH) are used as general-purpose
RAM for data storage.
▪ Special Function Registers (SFRs):
• The SFRs occupy the memory space from 80H to FFH. These are used to control
the various functions of the microcontroller, such as I/O ports, timers, interrupt
handling, and serial communication.

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► Program Status Word (PSW) Register:

• It is an 8-bit register and it is also referred to as flag register. They are: CY (carry), AC (auxiliary
carry), P (parity), and OV (overflow). Each Flags are 1-bit registers. It is 8 bits wide, but only 6
bits are used by the 8051. The two unused bits are user definable flags. 4 flags are called
conditional flags, indicates certain conditions after execution of certain instructions.

Symbo Bit: Function:

l:
CY PSW.7 Carry Flag; used in arithmetic, jump, rotate, and
Boolean instructions.
AC PSW.6 Auxiliary carry flag; used for BCD arithmetic.
F0 PSW.5 General purpose user flag
RS1 PSW.4 Register Bank Select Bit 1
RS0 PSW.3 Register Bank Select Bit 0
RS1 RS0 Function: Address:
0 0 Select register bank 0 00h – 07h
0 1 Select register bank 1 08h – 0Fh
1 0 Select register bank 2 10h – 17h
1 1 Select register bank 3 18h – 1Fh
OV PSW.2 Overflow Flag; used in arithmetic instructions.
--- PSW.1 User defined flag (reserved for future use).

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P PSW.0 Parity Flag; shows the parity of register A: 1 = Odd

parity, 0 = Even parity

o CY (Carry Flag):
• This flag is set whenever there is a carry after an addition or a barrow after subtraction.
Affected after 8 bit addition and subtraction. It is used to detect error in unsigned arithmetic
operation. It can be used as single bit storage. SETB C → for cy = 1, CLR C → for cy = 0
o AC (Auxiliary Carry Flag):
• This flag is set whenever there is a carry from lower nibble to upper nibble or barrow from upper
nibble to lower nibble. This flag is used by the instructions that perform BCD arithmetic.
o OV (Overflow Flag):
• This flag is set whenever the result of a signed operation is too large, causing the high-order bit to
overflow into the sign bit. In general, carry flag is used to detect errors in unsigned arithmetic
operations. The overflow flag is used to detect errors in signed arithmetic operations.
o P (Parity Flag):
• This reflects the number of 1’s in the accumulator register. If it has odd number of 1’s, then P=1.
If it has even number of 1’s, then P=0.
o RS1, RS0:
• Select register bank as shown in fig. by default register bank 0 is selected.

► Program Counter (PC):

• It is a 16-bit register, used to hold the address of the next instruction to be executed. The
instructions (opcodes) are fetched from the memory location addressed by PC. After the CPU
fetches the opcode, the PC is automatically incremented to point to the next instruction.
• In 8051, PC is 16-bits wide, 8051 can access programs from address 0000h to FFFFh, a total of
64K bytes of code. The contents of the PC may be altered by certain instructions like CALL, RET
etc. The PC is the only register which does not have an internal address. By de-fault PC is set to
0000h on reset of the microcontroller. For this reason, the first opcode must be burned into
memory location 0000h of program ROM.
► Data Pointer (DPTR):
• It is a 16-bit register, made up of two 8-bit registers called DPH (High) and DPL (Low). It is an
index register which is used to hold the address of the external memory. DPH and DPL hold the
high order byte and low order bye of the address. The DPTR does not have a single internal
address. DPH and DPL are assigned internal addresses separately (DPH – 83h, DPL – 82h).
► Special Function Registers (SFR):
• The 8051 operations use the internal 128-byte RAM addresses from 80h to OFFh called a Special-
Function register (SFR). There are 21 SFR registers are available in 8051. Some SFRs are also bit-

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addressable. This feature allows the programmer to change only what needs to be altered, leaving the
remaining bits in that SFR unchanged. Not all the addresses from 80h to FFh are used for SFRs
Name: Function: Internal RAM address (HEX)
A Accumulator E0
B Arithmetic F0
DPH Addressing External Memory 83
DPL Addressing External Memory 82
IE Interrupt Enable Control A8
IP Interrupt Priority B8
P0 Input / Output Port Latch 80
P1 Input / Output Port Latch 90
P2 Input / Output Port Latch A0
P3 Input / Output Port Latch B0
PCON Power Control 87
PSW Program Status Word D0
SCON Serial Port Control 98
SBUF Serial Port Data Buffer 99
SP Stack Pointer 81
TMOD Timer Mode Control register 89
TCON Timer/Counter Control 88
TL0 Timer 0 low byte 8A
TH0 Timer 0 high byte 8C
TL1 Timer 1 low byte 8B
TH1 Timer 1 high byte 8D
Ports:
• There are 4 ports and each ports are having 8 pins to transmit and receive the information. Total 32
Input and Output data lines. Each port is 8 bit wide and has special function register P0, P1, P2, P3
which are bit addressable means each bit can be set or reset by the Bit instructions (SETB for high,
CLR for low) independently. The data at any port which is transmitting or receiving is in these
registers.
Stack and Stack Pointer:
• The stack refers to an area of internal RAM that is used in conjunction with certain opcodes to store
and retrieve data quickly.
• The 8-bit stack pointer (SP) register is used by the 8051 to hold an internal RAM address that is called
the "top of the stack." The top of the stack is the location in internal RAM where the last byte of data
was stored by a stack operation.
• The SP increments before storing data on the stack so that the stack grows up as data is stored.
• As data is retrieved from the stack, the byte is read from the stack, and then the SP decrements to point
to the next available byte of stored data.
• The SP is set to 07h when the 8051 is reset and can be changed to any internal RAM address by the
programmer

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•
.Interrupt:
• Interrupts stop the microcontroller’s current task.
• Interrupts are caused when some other program has a higher priority request for execution.
• When an interrupt occurs, the ongoing task stops, the sub-routine for the interrupt is executed, and
then the previous job resumes.
INT0 It is an external interrupt having code 0. External hardware cause this interrupt.
INT1 It is an external interrupt having code 1. External hardware cause this interrupt.
TF0 This is for timer 0 overflow interrupt.
TF1 This is for timer 1, overflow interrupt
RI/TI This is a serial communication interrupt.
Timers and Counters :
• Timer Registers: Register pairs (TH0, TL0) & (TH1, TL1) are the two 16 bit counting registers for
Timer/Counter 0 and 1 respectively.
• Serial Port
• There are two pins available for serial communication TXD and RXD
• Normally TXD is used for transmitting serial data which is in SBUF register, RXD is used for receiving
the serial data.
• SCON register is used for controlling the operation.
Oscillator Circuit and Timing of 8051:
o The heart of the 8051 is the circuitry that generates the clock pulses by which all the internal
operations are synchronized.
o In most microcontrollers there is built-in circuitry which allows a simple connection of a crystal or
ceramic resonators or an external clock source.
o Pins XTAL1 and XTAL2 are provided for connecting a resonant network to form an oscillator.
o Typically, a quartz crystal and capacitors are employed as shown below.
o Ceramic resonators may be used as a low-cost alternative to crystal resonators.
o However, decreases in frequency stability and accuracy make the ceramic resonator a poor choice if
high-speed data serial communication with other systems, or critical timing, is to be done.

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PIN DIAGRAM 8051:

Pin No: Name: Description:

1–8 P1.0–P1.7 Port 0 pins used to interface peripherals
9 RST • Reset pin, resets the activities of microcontroller and execution starts
from the address 0000h.
• For this reason the first instruction opcode must be stored in the address
0000h
10 RXD Used to receive data serially.
11 TXD Used to transmit data serially.
12 & 13 INT0 & External Interrupt 0 and External Interrupt 1, active low pins, used to
INT1 interrupt sequential flow of execution
14 & 15 T0 & T1 Timer 0 and Timer 1, provides external pulses for counter 0 and counter 1,
respectively.
16 WR Write control pin, active low, used to write external data RAM.
17 RD Read control pin, active low, used to read external data RAM.
18 & 19 XTAL2 & Provides external frequency source for the 8051.
XTAL2
20 GND Ground pin
21–28 A8–A15 High-order address pins.
29 PSEN • Program Store Enable, is an output pin and is active low.
• Program Store Enable is used to read data from external program memory

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30 ALE •
Address latch enable is an output pin and is active high.
•
ALE Address Latch Enable is used to de multiplex the address and data
signal of port 0 (for external memory interfacing.)
• When address moves on port 0, ALE will be high.
• It is the indication to hold the Address in latch
31 EA • External Access, it is input pin and must be connected to either VCC or GND
• EA= 1 (Vcc), indicate that the program code is stored in the
microcontroller’s onchip ROM.
• EA= 0 (GND), indicate that the program code has to be accessed from
the external memory,
32–39 AD0–AD7 Address/Data pins. Used as low-order address pins A0 – A7 at the beginning
of machine cycle, and as data pins D0 – D7 at the later part of the machine
40 VCC Usually +5V DC is given to this pin

I/O PORTS FUNCTIONS

1. Port 0:
• The Port 0 or P0 is a General Purpose I/O Port.
• It consists of 8 pins starting from pin 32 to pin 39.
• An 8-bit bidirectional I/O port is port 0.
• It can be applied to operations involving input and output.
• A different name for it is the "low-order" address bus.
• However, this port can also be utilized as a multiplexed Address and Data bus (from AD0 to AD7).
2. Port 1
• The Port 1 or P1, is also an 8-bit port starting from pin 1 to pin 8.
• Although similar to the P0, the P1 is also a General Purpose I/O Port, however, unlike the other
three ports, P1 does not serve any dual purpose.
• Another 8-bit bidirectional I/O port is Port 1, which is.
• It can be applied to operations involving input and output.
• A different use for it is to offer a collection of all-purpose I/O pins or external interrupt pins
• Hence the sole purpose of P1 is for interfacing.
3. Port 2
• The pins from 21 to 28 belong to the Port 2, or P2.
• An 8-bit bidirectional I/O port is known as Port 2.
• It can be applied to operations involving input and output.
• Additionally, it functions as the high-order address bus for accessing external memory
• Now when there is no presence of an external memory, the P2 act as a General Purpose I/O Port.
• However, in the presence of external memory, P2 acts as an Address Bus, starting from A8 to A15.
4. Port 3:
• Though the Port 3 or P3 usually acts as a normal I/O Port, it can provide some other functions as
well.
• The pin numbers are from 10 to 17.
• A bidirectional 8-bit I/O port with additional specific functionality is port 3.

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• It contains two external interrupt pins (INT0, INT1) that can cause hardware interruptions from
outside the device.
• TXD and RXD, two additional pins, are provided for serial communication
• The other functions are below.

INTERNAL MEMORY ORGANIZATION

The internal memory of 8051 is of 2 types –
1. Internal ROM (Program Memory)
2. Internal RAM (Data Memory)
1. Internal ROM (Program Memory)
• 8051 has 4 kB internal Read Only Memory. A corresponding block of internal program code, contained in
an internal ROM, occupies code address space 0000h to [Link] (bar) is used to allow usage of
Internal ROM or not. The PC is used to address program code bytes from addresses 0000h to
[Link] addresses higher than 0FFFh, which exceed the internal ROM capacity, will cause the
8051 to automatically fetch code bytes from external program memory. Code bytes can also be
fetched exclusively from an external memory, addresses 0000h to FFFFh, by connecting the external
access pin (EA pin 31 on the DIP) to ground. The 8051 microcontroller has 4kB of on chip ROM but it
can be extended up to 64kB. This ROM is also called program memory or code memory. The CODE
segment is accessed using the program counter (PC) for opcode fetches and by DPTR for data. When
the Internal ROM address is exceeded the 8051 automatically fetches the code bytes from the external
program memory

2. Internal RAM (Data Memory)

• Internal RAM is found on-chip on the 8051. It is the fastest RAM available, and it is also the most
flexible in terms of reading, writing, and modifying its contents.
• Internal RAM is volatile, when the 8051 is reset this memory is cleared.
• The 128 bytes of internal RAM is organized as below.
o (i) Four register banks (Bank0,Bank1, Bank2 and Bank3)
▪ Each of 8-bits (total 32 bytes).

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▪ The default bank register is Bank0.

▪ The remaining Banks are selected with the help of RS0 and RS1 bits of PSW Register.
▪ The 32 bytes of RAM from address 00 H to 1FH are used as working registers organized
as four banks of eight registers each.
▪ The registers are named as R0-R7 .Each register can be addressed by its name or by its
RAM address
o (ii) 16 bytes of bit addressable area
▪ 16 bytes (from address 20H to 2FH) are bit-addressable, meaning each individual bit
can be directly accessed.
▪ This includes memory locations for flags, switches, and control signals.
o (iii) 80 bytes of general purpose area (Scratch pad memory)
▪ This area is also utilized by the microcontroller as a storage area for the operating stack.
▪ General Purpose RAM: The remaining 80 bytes (from address 30H to 7FH) are used as
general-purpose RAM for data storage.
▪ Special Function Registers (SFRs):
▪ The SFRs occupy the memory space from 80H to FFH. These are used to control the
various functions of the microcontroller, such as I/O ports, timers, interrupt handling,
and serial communication.
▪ Common SFRs include:
▪ P0, P1, P2, P3: Port registers for I/O operations.
▪ TMOD, TCON: Timer control registers.
▪ SCON: Serial control register.
▪ IE: Interrupt enable register.
▪ PCON: Power control register
▪ External RAM:
▪ The 8051 can also address external data memory (RAM) if it is connected.
▪ The configuration allows addressing up to 64KB (from address 0000H to FFFFH) of external RAM.
▪ This external memory is accessed using the data and address buses connected to the microcontroller.
▪ Memory Addressing: The internal RAM addresses range from 00H to 7FH (for internal RAM).
▪ The SFRs have addresses ranging from 80H to FFH.
▪ For external RAM, the addressing depends on the chip's configuration.

PREPARED BY: Prof. Manjunatha M/ Prof. SANTOSH KUMAR. N – AP/ECE, SRI SAIRAM COLLEGE OF ENGG, ANEKAL 16
 Regulation – 2022 (CBCS Scheme) MICROCONTROLLERS – BEC405A

EXTERNAL MEMORY INTERFACING:

PROGRAM MEMORY INTERFACING

PREPARED BY: Prof. Manjunatha M/ Prof. SANTOSH KUMAR. N – AP/ECE, SRI SAIRAM COLLEGE OF ENGG, ANEKAL 17
 Regulation – 2022 (CBCS Scheme) MICROCONTROLLERS – BEC405A

▪ In 8051, when the pin is connected to VCC, program fetches to addresses 0000H through 0FFFH
are directed to the internal ROM and program fetches to addresses 1000H through FFFFH are directed
to external ROM/EPROM.

▪ On the other hand when pin is grounded, all addresses (0000H to FFFFH) fetched by program
are directed to the external ROM/EPROM.

▪ The signal is used to activate output enable signal of the external ROM/EPROM.
▪ The port 0 is used as a multiplexed address/bus. It gives lower order 8-bit address in the initial T-cycle
and later it is used as a data bus.
▪ The 8-bit address is latched using external latch and ALE signal generated by 8051.
INTERFACING OF DATA MEMORY:

▪ The CPU generates RD and WR signals as needed during external RAM access
▪ is connected to VCC
▪ ALE = 1 microcontroller sends out address on AD0-AD7
▪ When ALE = 0 , then the lines are used for data transfer

PREPARED BY: Prof. Manjunatha M/ Prof. SANTOSH KUMAR. N – AP/ECE, SRI SAIRAM COLLEGE OF ENGG, ANEKAL 18
 Regulation – 2022 (CBCS Scheme) MICROCONTROLLERS – BEC405A

Interfacing Microcontroller with 16KB EPROM and 8K RAM

VTU question papers BEC405A – JAN 2025

VTU question papers BEC405A – JUNE 2024

VTU question papers BEC405A – JUNE 2024

PREPARED BY: Prof. Manjunatha M/ Prof. SANTOSH KUMAR. N – AP/ECE, SRI SAIRAM COLLEGE OF ENGG, ANEKAL 19
 Regulation – 2022 (CBCS Scheme) MICROCONTROLLERS – BEC405A

VTU question papers BEC405A – MODEL QUESTION PAPER -1

VTU question papers BEC405A – MODEL QUESTION PAPER -2

PREPARED BY: Prof. Manjunatha M/ Prof. SANTOSH KUMAR. N – AP/ECE, SRI SAIRAM COLLEGE OF ENGG, ANEKAL 20
 Regulation – 2022 (CBCS Scheme) MICROCONTROLLERS – BEC405A

PREPARED BY: Prof. Manjunatha M/ Prof. SANTOSH KUMAR. N – AP/ECE, SRI SAIRAM COLLEGE OF ENGG, ANEKAL 21