MODULE 1:
MCU BASICS:
ARCHITECTURE,
INSTRUCTION SET, AND
ADDRESSING MODES
Microcontroller and Applications
Ranjan Tiwari, Chanakya University 2/10/2026
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INTRODUCTION TO MICROCONTROLLERS
• A microcontroller (MCU) is a small computer on a single integrated circuit that is designed to control
specific tasks within electronic systems.
• It combines the functions of a central processing unit (CPU), memory, and input/output interfaces, all
on a single chip.
• The processor core is responsible for executing instructions and controlling the other components of the
microcontroller.
• The memory is used to store data and program code, while the input/output peripherals are used to
interact with the external environment.
Ranjan Tiwari, Chanakya University 2/10/2026
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CHARACTERISTICS AND APPLICATION OF MCU
Microcontroller Components
Microcontrollers integrate processor core, memory, and I/O
peripherals on a single chip for compact control.
Control-Oriented Design
Optimized for dedicated control tasks with low power use and
minimal external hardware requirements.
Real-time Operation
Microcontrollers often operate in real-time environments
requiring precise timing and reliability.
Applications and Programming
Used in automotive, home appliances, IoT, and industrial
automation; programmed in C or assembly.
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CLASSIFICATION OF MICROCONTROLLERS
Types of
microcontroller
Bus width Memory Instruction Set Architecture
1. 8 bit 1. Embedded
1. CISC
2. 16 bit 2. External 1. Von-
2. RISC
3. 32 bit Neumann(Combined)
2. Harvard
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8051 PIN DIAGRAM
• 8051 has 40 Pins.
• XTAL 1 and 2 12 MHz.
• RST: Reset, RAM and I/o ports, PC goes to 0000H.
• ALE: Address latch enable.
• EA: Enable external access. If 0 then external ROM
starts from 0000H, if 1 then ROM starts from 1000H.
• PSEN: program store enable acts as read signal for
external ROM.
• All ports are bidirectional.
• P3.0 RxD, and P3.1 are serial ports.
• P3.2 and P3.3 are INT0 INT1 and are low enable
interrupt signals.
• P3.4 and P3.5 T0 and T1 are Timer inputs.
• P3.6 3.7 are WR and RD are for external RAM.
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MCU ARCHITECTURE
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PSW REGISTER CY
PSW.7
AC FO RS1 RS0 OVR × P
PSW.0
• PSW is an 8 bit register. It is used to check the status of the result obtained in accumulator.
• PSW is a bit addressable register. Meaning user can also modify any particular bit.
• CY is carry flag. If there is carry from the MSB then 1.
• AC is auxiliary carry. Carry going from lower nibble to higher nibble.
• FO is user defined.
• RS1 and RS0 are register bank select.
• OVR is overflow bit. It indicates that the result is out of range in case of signed number
representation. It is set when result goes beyond (-128 to 127).
• × is don’t care.
• P is parity bit. It is odd parity meaning, it becomes one if there is odd number of 1 in result.
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REGISTER BANKS IN 8051 Bank0 R0=00H
.
.
RS1 RS0 Active bank RAM address R7=07H
range
Bank1 R0=08H
0 0 Bank 0 (default) 00H-07H .
.
0 1 Bank 1 08H-0FH R7=0FH
1 0 Bank 2 10H-17H Bank2 R0=10H
.
.
1 1 Bank 3 18H-1FH
R7=17H
Bank3 R0=18H
.
• Banks can be selected in two ways. .
• MOV PSW, #08H MOV R0, #55H, where will R7=1FH
• SETB PSW.3 CLR PSW.4 it store 55H?
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MEMORY ORGANIZATION (ROM)
• External ROM of 64kB can be attached
along with the 4kB of internal ROM.
• There are 3 modes of operation.
• 1. only Internal, 2. Internal + external, 3.
Only external discarding internal.
• Keep 𝐸𝐴 =1, till we are using internal
ROM.
• If we use 𝐸𝐴 =0 and not connected
external ROM then controller fails.
• External ROM eats upon internal ROM
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MEMORY ORGANIZATION (RAM)
• External RAM of 64kB can be attached along with the
128 Bytes of internal RAM.
• External RAM don't eat over internal RAM.
• Internal RAM uses 8 bit address ex-25 H, while
External RAM uses 16 bit address ex-0025 H. so they
don't interfere with each other.
• Internal RAM can never be discarded.
• SP contains address of top of stack.
• On push instruction, SP first gets incremented , i.e
SP=SP+1 while in POP it decrement after first pop. ie,
SP=SP-1.
• Default value of SP is 07 H i.e last location of Bank 0.
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ADDRESSING MODES The way an operand is given in an instruction is called addressing modes
Immediate Addressing: Immediate addressing embeds the operand/data within the instruction for fast but less
flexible data access. Ex MOV A, #35H MOV DPTR, #2026H.
Register Addressing: Rather than giving data directly operand/data is stored in register: MOV A, Rr MOV Rr, A
(r=0-7) MOV R3, R4 Valid Registers: R0, R1, R2…..R7, with A.
Direct Addressing: Direct addressing explicitly specifies memory addresses, ideal for accessing fixed memory
locations. Works only for Internal RAM and SFRs i.e memory from 00 H to FF H (00-7F, RAM and 80-FF for
SFRs) because only Internal RAM and SFRs have 8-bit addresses. MOV A, 30H MOV 00H, 01H MOV 20H,
#20H MOV A, 80H. Note direct addressing don’t work with external RAM.
Indirect Addressing: Indirect addressing uses registers to store memory addresses, enabling dynamic and efficient
data access. Internal RAM 8 Bit address, Only R0 and R1 is used, MOV A, @R0 MOV @R1, A External RAM
16 bit address. MOVX A, @DPTR MOVX @DPTR, A MOVX A, @Rp MOVX @Rp, A.
Indexed Addressing: Indexed addressing combines base address and offset, supporting structured and complex data
access. MOVC A, @A+DPTR MOVC A, @A+PC works on internal/external ROM depending on DPTR and
PC value, EA =0 then totally external ROM. NOTE: MOV=Int RAM, MOVX=Ext RAM, MOVC=ROM also
check EA signal.
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Ranjan Tiwari, Chanakya University 2/10/2026
Data Transfer Instructions
These instructions move data between registers, memory, and I/O
ports to facilitate communication within the MCU.
Arithmetic Instructions
TYPES OF
Perform operations like addition, subtraction, multiplication, and
division vital for embedded system calculations.
INSTRUCTIONS IN Logical Instructions
Include AND, OR, XOR, and NOT operations used for bit
MCUS manipulation and decision making in programs.
Control/Branch Instructions
Control program flow via jumps, calls, and returns enabling
conditional execution and looping in MCU programs.
Boolean/BIT Instructions
These are bit operations carried out on bit addressable memory
locations or any particular bit of SFRs(Special function registers).
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DATA TRANSFER INSTRUCTIONS
• MOV A, #data MOV A, Rr MOV A, address H, MOV MOV A, @Rp
• MOV Rr, A MOV Rr, #data MOV Rr, address H
• MOV address, A MOV address, #data MOV address, Rp MOV address, @Rp MOV
address1, address2
• MOV @Rp, A MOV @Rp, address H MOV @Rp, #data. MOV DPTR, #16 bit data
• MOVX A, @Rp MOVX A, @DPTA both vice versa
• MOVC A, @A+DPTR MOVC A, @A+PC.
• PUSH A PUSH R1 POP A POP R1
• XCH A, Rr XCH A, address XCH A, @Rp
• XCHD A, @Rp only the lower nibbles will be exchanged higher nibble remain same.
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ARITHMETIC INSTRUCTIONS
• ADD A, #55H ADD A, 55H ADD A, Rr (r=0-7) ADD A, @Rp
• ADDC A, #55H ADDC A, 55H ………………….
• SUBB A, #55H SUBB A, 55H …… If using for ordinary subtraction then
clear borrow first. A-55-CF
• INC A INC R0 INC @Rp INC 55H INC DPTR Note: there is no DEC
DPTR
• DEC A DEC R0 DEC @Rp DEC 55H
• MUL AB A gets lower byte and B get the higher byte.
• DIV AB is A/B A gets quotient, B gets reminder. Note Division by zero
gives garbage and overflow becomes 1.
• DA A decimal adjust after addition. Used to convert from hex to valid
Decimal number.
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LOGIC INSTRUCTIONS
• ANL A, #55H ANL A, 55H ANL A, R1 ANL A, @Rp ANL 55H, A ANL 55H, #35H
• ORL A, #55H ORL A, 55H ORL A, R1 ORL A, @Rp ORL 55H, A ORL 55H, #35H
• XRL A, #55H XRL A, 55H XRL A, R1 XRL A, @Rp XRL 55H, A XRL 55H, #35H
• RL A, only works for accumulator, MSB goes to carry and LSB
• RR A, only works for accumulator, LSB goes to carry and MSB
• RLC A, this now keeps carry in loop.
• RRC A, this now keeps carry in loop.
• CLR A CPL A
• SWAP A (swaps lower and higher nibble) NOP (Software delay)
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BRANCH INSTRUCTIONS
• Branch can be of two types JUMP and CALL
• Jump: LJMP laddrr (any jump from 0000 H-FFFF H). LJMP stands for long jump
• SJMP raddr ex SJMP 07H (PC=PC+radd) range (-128 to 127), all conditional jump are short jump.
• AJMP saddr, 64 kB of ROM is divided into pages of 2kB (8 different opcode for AJMP, within same page
of 2kB) AJMP stands for absolute jump.
• ACALL (absolute call: used for 2kB range) LCALL (Long call: used for 64 kB range )
• RET RETI RET stands for return and RETI stands for return after interrupt.
• Conditional jump: CJNE x,y label CJNE A, #35H , label CJNE A, 35H , label CJNE A, @Rp , label
CJNE stands for Compare and jump if not equal.
DJNZ Rr, label DJNZ stands for decrement and jump if not zero
• JC label JNC label JZ label JNZ label (JC: jump if carry, JNC: jump if no carry, JNZ jump if not
zero, JZ: jump if zero)
• Bit wise: JB (jump if bit ) bit, label ex JB PSW.5, label JNB (Jump if not bit) bit, label JBC(jump if bit
and clear) bit, label
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BOOLEAN/BIT INSTRUCTION
• SETB C CLR C CPL C C stands for carry
• SETB b , ex: SETB PSW.6 SETB 08H CLR b CPL b b can be any bit
addressable location of memory or any SFRs
• MOV C, b MOV b, C Carry bit works similar to accumulator in case
of bit operations
• ANL C, b ANL C, /b
• ORL C, b ORL C, /b
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