IC Package Testing– Test Firmware and

Test Program Debugging

Chapter- 2 (Lecture- 5)

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Agenda
• Introduction
• Qualification Plan
• Acceptance Criteria
• ImplementTest Program
• Test Firmware Workflow
• UART
• Coding Convention
• Test Development
• Debugging Code
• CollaborativeTools

UART : Universal Asynchronous Receiver-transmitter

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After Assembly – Test Flow
Purpose: Verify device
Assembly
functionality after packaging
and check performance Assembly Final Test
prior to shipping to the Opens/Shorts Test
customer. Hot Test

Burn-In

Stress Cold Test

Repair
Laser Marking
Vacuum Package

Source – [Link]
manufacturing-process-flow-model-for-MCMs_fig4_3341999

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Introduction
The assembly and short test program screen out gross assembly failures
coming out of the assembly lines.

The Test Developer uses Testers and Golden Samples for program
development. Each test program development typically takes few weeks
to months depending upon the complexity of the requirements.

Engineering validation is performed to do voltage measurement and

verify if the results are correct.

Test program consists of all the standard tests which are defined as per
the product under test.

Complete validation defined in accordance with design team. Document

all validation results in qualification file and communicate results to
design team and other stakeholders for further review.
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Assembly Opens/Shorts Testing (AOST)
Purpose: Quick test for shorts or opens on package leads or balls.
• Testing immediately follows packaging
• The packages are put through an open/short test to screen for massive electrical fails before leaving assembly.
• There is also a vision inspection to check for damaged or missing balls/leads and other obvious defects.

Source – [Link]
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Qualification Plan

The qualification plan Recommendation for

shall be reviewed, test to isolate any
revised and finalized tester hardware
based on the product failures or any false
to be tested. negatives.

Test Program Validation Verification Force Fail

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Acceptance Criteria

Acceptance Voltage measured is

Provides evidence
Results evaluation are
All reject units from
within specification as within acceptable
Criteria per the design
documents.
that results are
updated.
yield & meets
baseline.
evaluation further
sent for debug.

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Acceptance Criteria Continued…
• It helps ensure device requirements are met by characterizing and optimizing system performance, ensuring system quality
and reliability by screening the NAND for array and peripheral circuitry defects.
• The below diagram explains test methodology between controller and NAND.
• Regardless of the different protocols required per tester platform, it handles the interactions with the NAND system.
• Interaction between the host system and NAND device can be considered to be a black box where the data and algorithms
used within the test program to execute different tests.

Test FW: Test Firmware 8

Implement Test Program

▪ Team creates test programs for unit level tests.

▪ Typical test program includes:

• Device ID read, Controller ID read, Check for pin
leakage, Open and Short test, Current & Voltage
measurements etc.

▪ Some of NAND array functional tests are also added like

Erase, Program and Read.

Source – [Link]
ECC: Error Correcting Code
uC: Micro Controller

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Example
READ OPERATION

Source – [Link]

RB: Read Busy Signal , WB: Write Busy , tR : Read Time, tRR: Read Retry Time 10
IC Package Testing– Test Firmware

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Firmware

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Managed NAND

Source – [Link]
nand/

eMMC: Embedded Multimedia Card; CMD: Command

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Introduction Assembly

AOST
Test Firmware – Test specific code that is used to interface
between the μController and the NAND die.
Burn

Cold Test
Code is run on each part individually to evaluate the quality.
Quality Monitor

Binary size limited by Controller SRAM size Hot Test

AGING
Test steps developed for capturing defects and each test steps
has designated opcode (hexadecimal number as per ONFI-
Open NAND Flash Interface. Post Electrical

Ship
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Test Firmware Workflow
Test Program development
work usually begin with Check if the new task has
design team. All inputs are already developed or need
collectively available in modification in existing
technical specification implementation.
documents.

Code activity begins as per During validation, check for

technical documents passing scenario and force
generated for validation. fail the tests.

Prepare validation document

Release the program to the
and share test result with
production line.
design team for review.

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Universal Asynchronous Receiver-Transmitter (UART)
The universal asynchronous receiver-transmitter
(UART) takes bytes of data and transmits the
individual bits in a sequential fashion.
At the destination, a second UART re-assembles the
bits into complete bytes. Each UART contains a shift
register.
Serial transmission of digital information (bits)
through a single wire or other medium is less costly
than parallel transmission through multiple wires.

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Workflow

01 02 03 04

Every test has code Generally, all test All test output will Further analysis
written to catch program have a be displayed to includes collecting
defects and display designated host screen via additional data
pass / fail result. opcode, and they UART as PASS and when test is failing.
are uniquely FAIL .
identified.

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Coding Convention
High level languages such as C and C++ are free field languages. This means that the compiler doesn't care about
spaces, tabs or line breaks present in the source code. Minimizing space usage to save on keyboard strokes is a bad
practice, as seen below.

The sequence of instructions can become more

comprehendible and user friendly through an introduction of
line breaks and adequate space between operators.

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Coding Convention
Limit code statements to one statement per line :

Any instances of unused code, dead code (code that is never reachable), or disabled code should be
removed upon addition to the main development line.

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Coding Convention
Comments can help expound on a programmer's design choice for an algorithm and add understanding to the sequence of
instructions they chose to execute. A bad comment can often mislead a reader, and possibly anger them too. Ensure comments
written describe why an action was taken, not what the action is.

None of the comments above add value to the

code. They merely repeat what the programmer
would read out while cluttering the code.
Removal of the comments would enhance
readability in this case.

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Debugging

Test Mode: Selected APIs that need to be added to access device test registers and for
advance debug. The APIs then send the instructions to control registers which allow host to
access device. These set of commands are vendor specific and very confidential.

Special Block Access: Need additional privilege to access. Once host have access it can
access special blocks and perform erase, program and read operation.

Validation: Test engineers perform the execution and perform checks for further data
analysis and then decide the outcome of the device overall Pass / Fail.

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Skills needed for IC Package Test Engineering
Programming & Debugging
➢ Programming for micro-controllers to control input output devices connected with chip.
➢ Developing processor instruction set.
➢ Understanding of programmable logic devices such as FPGA.
➢ Automation.
➢ Linux fundamentals.
➢ Code is mostly written in C++/Python/Perl.

Textbooks
➢ Any C++ books by Indian/Foreign authors (Yashavant Kanetkar, Bjarne Stroustrup)
➢ Any C++ online courses (Coursera, Udemy)
➢ Semiconductor device/physics fundamentals by any author (Emiliano R. Martins)
➢ Coursera or Udemy online courses related to semiconductor basics.
➢ Python tutorials

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References
• Some images courtesy to public web material

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Thank You

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