Chapter1 - Introduction

Jerry Sam
March 2026

1 Theory
*. Performance Formulas
• Performance

1
P erf ormance =
ExecutionT ime

Explanation:
Performance measures how fast a computer executes a program. It is
defined as the inverse of execution time. Therefore:

– Smaller execution time ⇒ higher performance

– Larger execution time ⇒ lower performance

• Relative Performance

P erf ormanceX ExecutionT imeY

=
P erf ormanceY ExecutionT imeX

Explanation:
Relative performance compares two machines.
If machine X runs a program faster than machine Y :

P erf ormanceX > P erf ormanceY

Example:

TX = 8s, TY = 20s

1
 PX 20
= = 2.5
PY 8

Machine X is 2.5 times faster than machine Y .

• CPU Time

CP U T ime = InstructionCount × CP I × CycleT ime

Since

1
CycleT ime =
ClockRate

the formula can also be written as

InstructionCount × CP I
CP U T ime =
ClockRate

Explanation:
CPU execution time depends on three factors:

– Instruction Count (number of instructions executed)

– CPI (cycles per instruction)
– Clock Rate (processor frequency)

Improving performance can be achieved by:

– reducing instruction count

– reducing CPI
– increasing clock rate

• Average CPI (when there are multiple instruction types)

Pn
(ICi × CP Ii )
i=1P
AverageCP I = n
i=1 ICi

Explanation:
Programs usually contain multiple instruction types.

– ICi : number of instructions of type i

– CP Ii : CPI of instruction type i

2
 Average CPI is the weighted average of all instruction types.

• Clock Rate (Frequency)

Clock rate is the number of clock cycles per second.
Example:

4 GHz = 4 × 109 cycles/second

Relationship between clock rate and cycle time:

1
ClockRate =
CycleT ime
or
1
CycleT ime =
ClockRate

Multiple-Choice Questions
Question 1. If the processor clock rate increases, which of the fol-
lowing statements is correct?
a) The CPI increases
b) The CPI decreases
c) Power consumption may decrease
d) Execution time decreases if CPI remains unchanged
Answer: D

Question 2. In computer architecture, when a program needs to per-

form I/O operations with peripheral devices (e.g., disk read/write), this
communication is typically carried out through:

a) Directly sending signals to peripheral registers

b) The compiler
c) Instruction Set Architecture (ISA) and the operating system
d) Cache memory

Answer: C

Question 3. The process of translating a program from C++ to assembly

language illustrates which concept of abstraction in computer systems?

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 a) Maintaining a high level of abstraction
b) Reducing the level of abstraction from high-level language to low-
level language
c) Increasing abstraction for better readability
d) Unrelated to abstraction

Answer: B

Question 4. A program contains 2 × 106 instructions with the following

distribution: 30% type X, 50% type Y, and 20% type Z.
Two processors have the following CPI values:

• P1: CPI = 1, 2, 4; clock rate = 2 GHz

• P2: CPI = 2, 3, 5; clock rate = 4 GHz

Which processor executes the program faster?

a) P1 is faster
b) P2 is faster
c) Both are equal
d) Cannot be determined

Answer: B

Question 5. A program originally runs in T0 = 20 seconds. After opti-

mization, the instruction count is reduced by 30% while CPI increases by
20%. What is the new execution time?

a) 6 s
b) 7.2 s
c) 8 s
d) 9 s

Answer: B

Question 6. Two processors have the following CPI values:

• P1: CP Ix = 2.8, CP Iy = 3.2, CP Iz = 3.6

• P2: CP Ix = 1.8, CP Iy = 1.5, CP Iz = 2.0

A program consists of 30% instruction x, 50% instruction y, and 20%

instruction z.
Which processor executes the program faster?

4
 a) P1
b) P2
c) Both are equal
d) Cannot be determined

Answer: B

Question 7. The response time of a system decreases when:

a) The instruction count decreases

b) CPI decreases
c) Clock rate increases
d) All of the above

Answer: D
Question 8. The performance of a computer system is typically measured
by:
a) Instructions executed per second
b) Program execution time
c) Average CPI
d) All of the above
Answer: B

Question 9. If a program is optimized to achieve a speedup of 2, it

means:
a) Execution time is reduced by half
b) CPI is reduced by half
c) Clock frequency is reduced by half
d) Instruction count is reduced by half
Answer: A

Data for the next three questions: A program consists of four in-
struction types with the following proportions and CPI values:
• Floating Point (FP): 35%, CPI = 3
• Integer: 30%, CPI = 1
• Data transfer: 20%, CPI = 5
• Branch: 15%, CPI = 2

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Question 10. Compute the average CPI of the program.
a) 2.65
b) 2.85
c) 2.50
d) 2.14
Answer: A

Question 11. To make the program run 1.4 times faster, by how many
times must the number of FP instructions be reduced?
a) 0.72 times
b) 0.7 times
c) 0.3 times
d) 0.9 times
Answer: A

Question 12. Given a clock frequency of 2.5 GHz. If the CPI of FP

decreases by 0.5% and the CPI of Branch decreases by 2.5%, while other
CPIs remain unchanged, what is the new average execution time per in-
struction?
a) T ≈ 1.055 ns
b) T ≈ 0.87 ns
c) T ≈ 0.90 ns
d) T ≈ 0.092 ns
Answer: A

Question 13. If the number of FP instructions decreases by 0.4 times

and the CPI of Integer instructions increases by 3 times, what is the new
execution time compared to the old one?
a) Tnew ≈ 0.95Told
b) Tnew ≈ 1.07Told
c) Tnew ≈ 1.10Told
d) Tnew ≈ 0.90Told
Answer: B

Question 14. If a program spends 40% of its execution time on floating-

point operations and those operations are accelerated by 3 times, how
many times faster will the program run overall?

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 a) 1.36 times
b) 1.4 times
c) 2.2 times
d) 2.0 times
Answer: A (Amdahl’s Law)
Question 15. Consider two processors:
• P1: 2 GHz, CPI = 1.4
• P2: 3 GHz, CPI = 2
Which processor executes the program faster?
a) P1
b) P2
c) Both are equal
d) Cannot be determined
Answer: A

Question 16. Which phenomenon is affected when the number of pro-

cessors in a system increases?
a) Response time
b) Throughput
c) Both are affected
d) Not affected
Answer: B

Question 17. Which of the following factors affect the energy consump-
tion of a computer system (assuming energy consumption = power ×
execution time)?
a) Only processor architecture
b) Only cache size
c) Only clock frequency
d) Processor architecture, cache size, and clock frequency
Answer: D

Data for the next three questions: A program consists of 200 × 106
floating-point instructions, 100 × 106 integer instructions, 80 × 106 data-
transfer instructions, and 40 × 106 branch instructions. The CPI values
for these instruction types are 2, 1, 4, and 2, respectively.

7
Question 18. What is the average CPI of the above program?
a) 2.0
b) 2.14
c) 2.5
d) 3.0
Answer: B

Question 19. For the program to run 1.5 times faster, to what value
must the CPI of floating-point instructions be reduced?
a) 1.0
b) 0.5
c) 0.8
d) 0.2
Answer: B

Question 20. If the CPI of integer and floating-point instructions de-

creases by 40%, while the CPI of data-transfer and branch instructions
decreases by 30%, and the processor operates at 2 GHz, what is the pro-
gram execution time?
a) 0.35 s
b) 0.45 s
c) 0.29 s
d) 0.5 s
Answer: C

Question 21. Which of the following will increase CPU performance?

a) Increase CPI, decrease clock frequency
b) Increase CPI, increase instruction count
c) Increase clock frequency, increase instruction count
d) Decrease CPI, increase clock frequency
Answer: D

Question 22. What is a register?

a) A part of the processor that stores a sequence of bits

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 b) A part of the operating system that stores program information to
be executed
c) A part of the processor that performs a task
d) A type of main memory

Answer: A

Question 23. Which processor architecture is most widely used today?

a) MIPS
b) IA-32 (Intel)
c) ARM
d) Hitachi SH
Answer: C

Data for the next four questions: A processor with a clock frequency
of 2.3 GHz executes program P with the following parameters:

Instruction Type CPI Instruction Count

Arith 1 5400
Load/store 4 460
Jump/Br 3 1200

Question 24. What is the average CPI of this program?

a) 1.54
b) 1.17
c) 1.35
d) 2.07
Answer: A

Question 25. What is the execution time of this program?

a) 4713 ns
b) 4517 ns
c) 3069 ns
d) 3148 ns

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Answer: A

Question 26. What is the MIPS rating?

a) 1704
b) 1563
c) 1498
d) 1111
Answer: C
Question 27. The processor is improved so that the CPI of the Load/Store
instruction group is reduced to 3, while executing the above program at
the same clock frequency. What is the speedup of this improvement?
a) 1.46
b) 1.33
c) 1.16
d) 1.04
Answer: D

Data for the next four questions: A processor with a clock frequency
of 2.5 GHz executes program P with the following parameters:

Instruction Type CPI Instruction Count

Arith 1 5400
Load 4 900
Store/Br 3 2020

Question 28. What is the average CPI of this program?

a) 1.81
b) 1.17
c) 1.51
d) 2.07
Answer: A

Question 29. What is the execution time of this program?

a) 4713 ns
b) 4517 ns

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 c) 6217 ns
d) 6024 ns
Answer: D

Question 30. What is the MIPS rating?

a) 1704
b) 1563
c) 1498
d) 1381
Answer: D

Question 31. The processor is improved so that the CPI of the Load/Store
instruction group is reduced to 3, while executing the above program at
the same clock frequency. What is the speedup of this improvement?
a) 1.46
b) 1.33
c) 1.06
d) 1.04
Answer: C

Question 32. Choose the FALSE statement:

a) RISC architecture focuses on hardware, while CISC focuses on soft-

ware.
b) Modern compilers use registers more efficiently as the number of vari-
ables increases.
c) Register allocation usually follows the design principle “smaller is
faster” in instruction set architecture.
d) The choice of programming language when developing an application
does NOT affect the application’s speed.
Answer: D

Question 33. Choose the TRUE statement:

a) If machine A has a lower average CPI than machine B, then machine
A always has better performance than machine B.

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 b) One of the main reasons for the development trend toward multicores
is the “Power Wall” problem.
c) Application software cannot be written in assembly language.
d) All of A, B, and C are correct.
Answer: B

Question 34. Choose the FALSE statement:

a) When an instruction is fetched, but has not yet been decoded and
executed, the PC always increases compared to before fetching the
instruction.
b) An instruction that has been fetched always needs to be decoded in
order to be executed.
c) An instruction fetched from Instruction Memory is in the encoded
machine-code form.
d) When an instruction is fetched, and that instruction has already fin-
ished execution, the PC always increases compared to before the
instruction was fetched and executed.
Answer: D
Data for the next five questions: A computer X has an instruction set
consisting of four instruction types A, B, C, and D, whose CPI values are
1, 1.5, 2.0, and 1, respectively. After executing on computer X, a program
P generates the following numbers of instructions for types A, B, C, and
D: 500, 1000, 1200, and 1500, respectively. Computer X operates at a
clock frequency of 2 GHz.

Question 35. Compute the average CPI for computer X above:

a) ≈ 1.38
b) ≈ 1.40
c) ≈ 1.84
d) ≈ 2.01
Answer: B

Question 36. Compute the CPU execution time of program P on com-

puter X:
a) 11.80 µsec
b) 2.10 µsec
c) 2.95 µsec

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 d) 8.40 µsec
Answer: C

Question 37. The compiler vendor releases an upgraded version that

changes the translated instruction counts of program P on machine X so
that the numbers of instructions A, B, C, and D become 500, 1000, 1000,
and 1250, respectively. Compute the system speedup:
a) ≈ 1.12
b) ≈ 1.21
c) ≈ 1.32
d) ≈ 1.30
Answer: A

Question 38. Determine the CPI of instruction type C (by changing the
CPI of instruction type C) so that the speedup reaches 1.25:
a) ≈ 1.00
b) ≈ 1.02
c) ≈ 1.25
d) ≈ 2.36
Answer: B

Question 39. Suppose only two instruction types can be improved. De-
termine the limit of such an improvement:
a) ≈ 1.58
b) ≈ 2.03
c) ≈ 2.46
d) ≈ 2.95
Answer: D

Question 40. Choose the correct statement:

a) When translating from a high-level language to MIPS assembly, the

generated assembly code is unique.
b) When translating from a high-level language to MIPS assembly, the
generated assembly code may be different.

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 c) It is impossible to translate from MIPS assembly back to a high-level
language.
d) It is impossible to translate machine code back to a high-level lan-
guage.
Answer: B
Question 41. Choose the correct statement:
a) The instruction sets on different computers from the same manufac-
turer are identical.
b) Different computers may have different instruction sets, although
they can share many similarities.
c) An instruction set is developed arbitrarily by an individual or an or-
ganization without regard to the hardware structure of the computer
architecture.
d) All of A, B, and C are correct.

Answer: B

Question 42. For a program X, computer A executes X in 8 seconds,

while computer B executes X in 20 seconds. Which of the following con-
clusions is correct?

a) A is 1.8 times faster than B

b) A is 2.45 times slower than B
c) A is 2.5 times faster than B
d) A is 1.674 times slower than B

Answer: C

Question 43. Suppose a program has 4 × 106 instructions, including

1 × 106 integer instructions, 2 × 106 data-transfer instructions, and 1 × 106
branch instructions. The CPI values of these instruction types are 1, 4,
and 3, respectively. What is the average CPI of the whole program?
a) 2.14
b) 3.0
c) 4.8
d) 1.8

Answer: B

14
The average CPI is calculated using the formula
P
(instructioncounti × CPIi )
CPI = .
totalinstructioncount

Substituting the values:

1 × 106 × 1 + 2 × 106 × 4 + 1 × 106 × 3 1 × 106 + 8 × 106 + 3 × 106 12 × 106

CPI = = = = 3.
4 × 106 4 × 106 4 × 106

Question 44. According to the Von Neumann architecture, the program

instructions and data are stored:

a) All in data memory

b) In the same physical memory
c) All in instruction memory
d) In two separate physical memories

Answer: B
Question 45. The instruction set architecture of a processor consists
of three instruction types A, B, and C with CPI values 1, 2, and 3, re-
spectively. Two compilers translate the same program and generate the
following numbers of instructions:

Compiler A B C
X 300 200 200
Y 400 100 200

Which compiler is better when running the program on the same com-
puter?
a) Compiler X
b) Not enough data to determine
c) Compiler Y
d) Both compilers are the same
Answer: C
Detailed solution:
For the same processor, the better compiler is the one that produces fewer
total clock cycles.
X
T otalcycles = (instructioncount × CP I)

15
For compiler X:

CyclesX = 300 × 1 + 200 × 2 + 200 × 3

CyclesX = 300 + 400 + 600 = 1300

For compiler Y:

CyclesY = 400 × 1 + 100 × 2 + 200 × 3

CyclesY = 400 + 200 + 600 = 1200

Since
1200 < 1300
compiler Y requires fewer cycles, so it executes faster.

CompilerY isbetter

Question 46. Which of the following characteristics is typical of embed-

ded computers?
a) A specifically defined purpose of use
b) Can be accessed through a network
c) Very high performance
d) High cost
Answer: A
Detailed solution:
An embedded computer is usually designed for a specific task or a limited
set of tasks inside a larger system.
Examples include:
• a microwave controller,
• a washing machine controller,
• a car braking controller.
So its most typical feature is:

aspecif icallydef inedpurposeof use

The other options are not general defining characteristics:

• Network access may or may not exist.
• Embedded systems are not necessarily very high performance.

16
 • They are often designed to be low-cost, not high-cost.

Question 47. Suppose a program has 4 × 106 floating-point instructions,

1 × 106 integer instructions, 2 × 106 data-transfer instructions, and 1 × 106
branch instructions. The CPI values of these instruction types are 4, 3,
2, and 1, respectively. To make the program run 1.5 times faster, to what
value must the CPI of floating-point instructions be improved?
a) 1.5
b) 3
c) 2.5
d) 2
Answer: D
Detailed solution:
Original total cycles:
Oldcycles = 4 × 106 × 4 + 1 × 106 × 3 + 2 × 106 × 2 + 1 × 106 × 1
= 16 × 106 + 3 × 106 + 4 × 106 + 1 × 106 = 24 × 106
If the program becomes 1.5 times faster, then the new execution time and
new cycle count become:
24 × 106
N ewcycles = = 16 × 106
1.5
Let the new CPI of floating-point instructions be x. Then:
4 × 106 · x + 1 × 106 · 3 + 2 × 106 · 2 + 1 × 106 · 1 = 16 × 106

So:
4 × 106 x + 3 × 106 + 4 × 106 + 1 × 106 = 16 × 106
4 × 106 x + 8 × 106 = 16 × 106
4 × 106 x = 8 × 106
x=2
Therefore, the CPI of floating-point instructions must be improved to:
2

Question 48. Suppose a program has 4 × 106 floating-point instructions,

1 × 106 integer instructions, 2 × 106 data-transfer instructions, and 1 × 106
branch instructions. The CPI values of these instruction types are 4, 3,
2, and 1, respectively. Compute the execution time of the program if the
CPI of floating-point instructions is reduced to 25%. Assume the processor
operates at a clock frequency of 5 GHz.

17
 a) 12.0 msec
b) 10.0 msec
c) 6.0 msec
d) 24.0 msec
Answer: D
Detailed solution:
The original CPI of floating-point instructions is 4.
If it is reduced to 25%, then the new floating-point CPI is:

4 × 0.25 = 1

Now compute the new total cycles:

N ewcycles = 4 × 106 × 1 + 1 × 106 × 3 + 2 × 106 × 2 + 1 × 106 × 1

= 4 × 106 + 3 × 106 + 4 × 106 + 1 × 106 = 12 × 106

Clock frequency:

f = 5GHz = 5 × 109 cycles/second

Execution time:
T otalcycles 12 × 106
T = =
Clockf requency 5 × 109

= 2.4 × 10−3 s

Convert to milliseconds:

2.4 × 10−3 s = 2.4ms

So the correct computed execution time is:

2.4ms

Note: The marked answer in the image is D (24.0 msec), but based on
the calculation, the correct result should be:

2.4ms

Question 49. Design computer B with what clock rate, knowing that for
the same program X: computer A has a clock rate of 2 GHz and CPU
time = 5 s; computer B executes with CPU time = 6 s, but the clock
cycles of B are 1.2× the clock cycles of A.

18
 a) 6 GHz
b) 2 GHz
c) 3 GHz
d) 5 GHz

Answer: B
Detailed solution:
CPU time formula:
Clockcycles
CP U time =
Clockrate
Clock cycles of A:

CyclesA = 2 × 109 × 5 = 1010

Clock cycles of B:
CyclesB = 1.2 × 1010

Clock rate of B:
1.2 × 1010
ClockRateB =
6

= 2 × 109 Hz = 2 GHz

2 GHz

Question 50. What characteristics does the Post-PC computing era

have?

a) End devices are connected to the Internet

b) End devices must be embedded computers
c) The main computation is performed on the cloud/server
d) Both (a) and (c) are correct

Answer: D
Detailed solution:
In the Post-PC era:
• Devices such as smartphones, tablets, and IoT devices are connected
to the Internet.
• Many computing tasks are handled by cloud servers rather than lo-
cally.

19
Therefore:
(a)and(c)arecorrect

Question 51. For a program X, computer A executes X in 8 s while

computer B executes X in 20 s. Which conclusion is correct?

a) A is 2.45 times slower than B

b) A is 1.674 times slower than B
c) A is 2.5 times faster than B
d) A is 1.8 times faster than B

Answer: C
Detailed solution:
Performance ratio:

tB
k=
tA

tA = 8 s, tB = 20 s

20
k= = 2.5
8

So:

Ais2.5timesf asterthanB

Question 52. Suppose an improvement reduces the latency of the data

memory block from 240 ps to 220 ps. Choose the correct statement.

a) The improvement makes the program run faster

b) The improvement makes the program run slower
c) The improvement keeps the program execution time unchanged
d) A, B, and C are all correct

20
Answer: C
Detailed solution:
The program execution time depends on the clock period.
If the memory latency decreases but the clock cycle time remains un-
changed, then the CPU clock frequency does not change.
Therefore:

• The improvement does not affect the clock cycle.

• The execution time of the program remains the same.

P rogram − execution − time − remains − unchanged

Question 53. Which factors affect the performance of a program on a

computer?
a) Programming language
b) Processor architecture
c) Instruction set architecture
d) All of the above
Answer: D
Detailed solution:
All of the listed factors can affect program performance:
• The programming language influences how efficiently algorithms
and operations are expressed.
• The processor architecture affects execution speed, pipelining,
cache behavior, and other hardware characteristics.
• The instruction set architecture determines the available instruc-
tions and how efficiently a program can be translated and executed.
Therefore, all are correct.

Question 54. Why did the clock frequency of Intel processors begin to
stop increasing around 2004?
a) Because the demand for computation decreased
b) Because of the “power wall”
c) Because of the shift to multiprocessor systems

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 d) To reduce manufacturing cost during the economic crisis
Answer: B
Detailed solution:
Around 2004, processor manufacturers encountered the power wall: in-
creasing clock frequency further caused excessive power consumption and
heat dissipation problems.
As a result:
• Clock rates stopped scaling as before.
• Industry focus shifted toward multicore design rather than only in-
creasing frequency.
Thus, the direct reason is:

thepowerwall

Data for the next four questions: A code segment contains 1000
instructions, in which load/store instructions account for 40%, jump in-
structions account for 20%, branch instructions account for 10%, and the
remaining are arithmetic instructions. The CPI values are: load/store
= 3.5, jump = 1, branch = 2.5, arithmetic = 3. The computer operates
at a clock frequency of 2 GHz.

Question 55. Compute the execution time of the above code segment.

a) 1375 ns
b) 2750 ns
c) 1735 ns
d) 1953 ns

Answer: A
Detailed solution:
First compute the number of instructions of each type:

Load/store = 40% × 1000 = 400

Jump = 20% × 1000 = 200

Branch = 10% × 1000 = 100
Arithmetic = 1000 − 400 − 200 − 100 = 300

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Total clock cycles:

400 × 3.5 + 200 × 1 + 100 × 2.5 + 300 × 3

= 1400 + 200 + 250 + 900 = 2750

Clock frequency:
f = 2 × 109 Hz

Execution time:
2750
T = s
2 × 109
= 1.375 × 10−6 s = 1375ns

1375ns

Question 56. To make the program run 2.5 times faster, to what value
must the CPI of the load/store instructions be improved?
a) 2.5
b) 2.0
c) 1.5
d) All are incorrect
Answer: D
Detailed solution:
Original total cycles:
2750

To achieve a speedup of 2.5:

2750
N ewcycles = = 1100
2.5

Let the new CPI of load/store instructions be x. Then:

400x + 200 × 1 + 100 × 2.5 + 300 × 3 = 1100

Compute the constant part:

200 + 250 + 900 = 1350

So:
400x + 1350 = 1100

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 400x = −250
x = −0.625

This is impossible because CPI cannot be negative.

Therefore, none of the listed values can achieve the required speedup.

Question 57. Compute the average CPI of the above code segment.
a) 1.75
b) 1.35
c) 2.75
d) 2.35

Answer: C
Detailed solution:
Average CPI is:
T otalcycles
AverageCP I =
T otalinstructions

From Question 55:

T otalcycles = 2750
T otalinstructions = 1000

Thus:
2750
AverageCP I = = 2.75
1000

2.75

Question 58. The load/store instructions are improved so that their CPI
is reduced by half. What is the speedup of the whole system (speedup is
defined as the ratio of the old execution time to the new execution time)?
a) ≈ 0.75
b) ≈ 1.34
c) ≈ 1.75
d) ≈ 1.00

24
Answer: B
Detailed solution:
Original load/store CPI:
3.5

New load/store CPI after being reduced by half:

3.5
= 1.75
2

New total cycles:

400 × 1.75 + 200 × 1 + 100 × 2.5 + 300 × 3

= 700 + 200 + 250 + 900 = 2050

Speedup:
Oldtime Oldcycles
Speedup = =
N ewtime N ewcycles
2750
= ≈ 1.34
2050

1.34

Question 59. What is the average CPI of the above program?

a) 1.5
b) 2.0
c) ≈ 2.14
d) 3.0
Answer: C
Detailed solution:
From the given data:

• Floating-point instructions: 200 × 106 , CPI = 2

• Integer instructions: 100 × 106 , CPI = 1
• Data-transfer instructions: 80 × 106 , CPI = 4
• Branch instructions: 40 × 106 , CPI = 2

25
Total number of instructions:

200 × 106 + 100 × 106 + 80 × 106 + 40 × 106 = 420 × 106

Total number of clock cycles:

200 × 106 × 2 + 100 × 106 × 1 + 80 × 106 × 4 + 40 × 106 × 2

= 400 × 106 + 100 × 106 + 320 × 106 + 80 × 106 = 900 × 106

Average CPI:
900 × 106
CP I avg = ≈ 2.14
420 × 106

CP I avg ≈ 2.14

Question 60. To make the program run 1.5 times faster, to what value
must the CPI of FP instructions be reduced?
a) 0.8
b) 1.0
c) 0.5
d) 0.2
Answer: C
Detailed solution:
Original total cycles:
900 × 106

To run 1.5 times faster, the new total cycles must be:

900 × 106
= 600 × 106
1.5

Let the new CPI of FP instructions be x. Then:

200 × 106 · x + 100 × 106 · 1 + 80 × 106 · 4 + 40 × 106 · 2 = 600 × 106

The unchanged part is:

100 × 106 + 320 × 106 + 80 × 106 = 500 × 106

So:
200 × 106 x + 500 × 106 = 600 × 106

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 200 × 106 x = 100 × 106
x = 0.5

0.5

Question 61. What is the execution time of the program if the CPI of
integer and floating-point instructions decreases by 40%, while the CPI
of data-transfer and branch instructions decreases by 30%? Assume the
processor operates at 2 GHz.

a) ≈ 0.45 s
b) ≈ 0.29 s
c) ≈ 0.35 s
d) ≈ 0.5 s

Answer: B
Detailed solution:
New CPI values:
F P : 2 × 0.6 = 1.2
Integer : 1 × 0.6 = 0.6
Datatransf er : 4 × 0.7 = 2.8
Branch : 2 × 0.7 = 1.4

New total cycles:

200 × 106 × 1.2 + 100 × 106 × 0.6 + 80 × 106 × 2.8 + 40 × 106 × 1.4

= 240 × 106 + 60 × 106 + 224 × 106 + 56 × 106 = 580 × 106

Clock frequency:
f = 2 × 109 Hz

Execution time:
580 × 106
T = = 0.29 s
2 × 109

0.29 s

Question 62. What are the characteristics of embedded computers?

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 a) Integrated as a component in systems, with strict constraints on
power/performance/cost
b) Large volume, high performance
c) General-purpose, supporting a wide variety of software
d) Used in network environments
Answer: A
Detailed solution:
Embedded computers are typically:
• built into a larger system,
• designed for dedicated tasks,
• constrained by power, performance, physical size, and cost.
Therefore, the best description is:

Integratedasacomponentinsystems, withstrictconstraintsonpower/perf ormance/cost

Question 63. What type of memory is main memory?

a) Volatile (data is lost when powered off)
b) Non-volatile (retains data)
c) Used only for secondary storage
d) Unrelated to data
Answer: A
Detailed solution:
Main memory (RAM) is volatile memory:
• it stores data temporarily while the computer is running,
• its contents are lost when power is turned off.
Hence:

V olatilememory

Question 64. What is a multicore processor?

a) A single processor with many instructions
b) Multiple processors on the same chip, requiring parallel programming
c) A larger cache memory

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 d) Reduced clock frequency
Answer: B
Detailed solution:
A multicore processor contains multiple processing cores on one chip. This
design allows multiple tasks or threads to execute in parallel, but software
often needs parallel programming techniques to fully benefit.
Therefore:

M ultipleprocessorsonthesamechip, requiringparallelprogramming

Question 65. Which factor determines the number of tasks executed in

system performance?
a) Programming language
b) Processor and memory system
c) Algorithm
d) All are correct
Answer: C
Detailed solution:
The number of operations or tasks required to solve a problem is funda-
mentally determined by the algorithm.

• A better algorithm may require fewer operations.

• Hardware and language affect how fast the tasks run, but not the
inherent amount of work needed as directly as the algorithm does.

Thus, the correct answer is:

Algorithm

Question 66. What is throughput?

a) The number of tasks completed per unit time
b) The time required to complete one task
c) The number of machine instructions
d) Clock frequency

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Answer: A
Detailed solution:
Throughput measures how much work a system completes in a given
amount of time.
Therefore, throughput is:

thenumberof taskscompletedperunittime

Option (b) describes response time or execution time, not throughput.

Question 67. If machine A executes a program in 10 seconds and machine

B executes it in 15 seconds, how many times faster is machine A than
machine B?
a) 0.67 times
b) 1 time
c) 2 times
d) 1.5 times
Answer: D
Detailed solution:
Performance is inversely proportional to execution time.

P erf ormanceof A Executiontimeof B

=
P erf ormanceof B Executiontimeof A

Substitute the values:

P erf ormanceof A 15
= = 1.5
P erf ormanceof B 10

So machine A is:

1.5timesf asterthanmachineB

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