AC 450 RMC User's Guide
AC 450 RMC User's Guide
TABLE OF CONTENTS
Chapter 1 - Introduction
1.1 General.......................................................................................................................11
1.2 Available RMC products ...........................................................................................11
11.1 General.......................................................................................................................47
11.2 ACM node in the subrack 8-slots subrack ................................................................47
11.3 ACM node in the subrack RF522 ..............................................................................48
Chapter 15 - Limitations
15.1 General.......................................................................................................................56
15.2 Data base handling concerning I/O boards ................................................................56
Chapter 17 - Positioning
17.1 Database element TIME_DIS for positioning control...............................................58
17.1.1 Summary...................................................................................................58
17.1.2 Properties ..................................................................................................59
17.1.3 Function ....................................................................................................59
17.1.4 Connection ................................................................................................59
17.2 Jumpering of DSDP 140B .........................................................................................60
17.3 Jumpering of DSDP 150 for shear control.................................................................61
ILLUSTRATIONS
Disposition of boards in the 8-slots with two CPUs. 18
Disposition of boards in the 14-slots subrack with four CPUs. 19
Example of positioning one PM511V and carrier boards. 20
Example of positioning two PM511V and carrier boards. 21
Example of positioning three PM511V and carrier boards. 23
Example of positioning one PM511V and carrier boards. 24
Example of positioning two PM511V and carrier boards. 25
Example of positioning three PM511V and carrier boards. 26
Example of positioning four PM511V and carrier boards. 28
Example of positioning MB510 and program cards in 14-slots subrack. 29
Example in 14-slots subrack of positioning of program cards and flash cards with application program
dumps. 30
Example of common memory in 8-slots central rack with two PM511V CPU’s. 31
Example of common memory in 14-slots central rack with four PM511V CPU’s. 31
Application program dumps. 34
HPC communication interface CS513 36
Carrier board SC 560 37
CI546 40
CI546 Strap Groups 41
Rack Layout with TCP/IP interface 42
CS513 43
CS513 Strap Groups for CS513 43
Configuration Tree 44
MB300 Routing Example 46
Example with ACM in a multiprocessor system with two CPUs in the 8-slots subrack. 47
Example with ACM nodes in a single CPU system. 48
Example with ACM node in a multiprocessor system with three CPUs in the 14-slots subrack. 48
Example with ACM nodes in a multiprocessor system with three CPUs. 49
Global start of the CPU PM511V. 52
COLD start of the CPU PM511V. 53
AUTO start current CPU PM511V. 54
The DICONFIG-command of current CPU PM511V. 54
TIME_DIS element 58
DSDP 140 jumper groups 60
DSDP 150 jumper groups 61
DSDP 160 jumper groups 62
DSDP 161 jumper groups 63
TABLES
PC elements for cascade control 12
PC elements for bit manipulation 13
PC elements for positioning control 13
PC elements for communication 14
PC elements for furnace control 15
Miscellaneous PC elements 15
Subscription types 16
Positioning in 8-slots subrack, single systems 20
Positioning in 8-slots subrack, multiprocessor system with two CPUs 21
Positioning in 8-slots subrack, multiprocessor system with three CPUs 22
Positioning in 14-slots subrack, single system. 24
Positioning in 14-slots subrack, multiprocessor system with two CPUs 25
Positioning in 14-slots subrack, multiprocessor system with three CPUs 26
Positioning in 14-slots subrack, multiprocessor system with four CPUs 27
Address jumpering of RMC boards. 57
Properties for TIME_DIS 59
Chapter 1 Introduction
1.1 General
Advant Controller 450RMC is a programmable system for control and supervision of processes
and equipment in metal industrial environments. The Advant Controller 450RMC is an
extension of the programmable system Advant Controller 450.
The RMC products adds functionality and improves certain performance to the Advant
Controller 450RMC
This manual is primarily intended for plant designers, commissioning and maintenance
personnel. It is intended to provide the user with knowledge of the
Advant Controller 450RMC products regarding possibilities and limitations.
This document does not describe the RPC-function and the RPC PC elements included in the
option QC08-RPC01.
This manual does not deal with any general information regarding the
Advant Controller 450 system.
QC08-BAS02
Base system for Advant Controller 450RMC single and multiprocessor systems.
QC08-BAS02 is based on the basic system QC02-BAS21 for Advant Controller 450.
QC08-BAS01
Base system for Advant Controller 450RMC single and multiprocessor systems. The base
system is designed for RPC (Rapid PC) applications.
QC08-BAS01 is based on the basic system QC02-BAS21 for Advant Controller 450.
QC08-RMC01
Option module for Advant Controller 450RMC single and multiprocessor systems.
QC08-RPC01
Option module for Advant Controller 450RMC single and multiprocessor systems. This option
requires the base system QC08-BAS01.
QC08-VIP01
Option module for Advant Controller 450RMC single and multiprocessor systems.
2.1 General
This chapter gives a brief overview of PC elements included in option QC08-RMC01.
Element Description
CTRL-H1 Generation of automatic loop control deviation and correction of the speed reference
according to sequence control and measured loop position.
LSCAN-R Reading loop position, material detection and material temperature from circuit board
DSDP161.
LSCAN-W Initialization of PC element LSCAN-R and circuit board DSDP161.
READ-H1 Reading loop position and material detection from circuit board DSDP160.
SETR-H1 Auto and manual control of R-factor.
TRAC-H1 Length measurement for head and tail tracking through a rolling mill. Setting of three
warning flags and one length dependent flag. Cobble detection alarm function. Late
head, tail material detection alarm function.
MDIN-H1 Interlocking of material detection signal in rolling mills. False head, end detection
alarms.
SEQ-H1 Sequence control and logics of overriding control functions in rolling mills.
CONF-H2 Control of drive configuration set up of rolling mill, overriding auto loop or min tension
control set up.
CONFIG Control of drive configuration set up of rolling mill, overriding auto loop or min tension
control set up.
Element Description
ISR Set/reset bits in an Integer
ITGLE Toggle bits in an Integer
ICOPY Copy bits into an Integer
IAOR AND/OR bit manipulation
I-DEMUX Conversion of an Integer into a number of Boolean signals
Element Description
POSW-H1 Interface for reading control and error signals and dynamic data from positioning
board DSDP140B.
POSR-H1 Interface for writing control signals and dynamic data to positioning board
DSDP140B.
CLCK-H1 Initiation and reset routine for circuit board DSDP150.
START-H1 Interface routine to create a start pulse for positioning board DSDP140B
with a digital output on circuit board DSDP150.
PULSE-H1 Interface routine to create a single pulse of controlled duration and pulse width
on a DSDP150 digital output board.
LINT-H1 Length integrator for head or tail.
TIME-H1 Interface routine for reading of system clock located on circuit board DSDP150.
PULSE-C Pulse counter element for circuit board DSDP150.
2.5 Communication
Element Description
PCC-RD Communication element for reading of data from corresponding PCC-WR element
located in same or another CPU system within a multiprocessor system.
PCC-WR Communication element for writing of data to corresponding PCC-RD element
located in same or another CPU system within a multiprocessor system.
HPC-RD Interface element for reading of data from circuit board DSCS160 used for
HPC, High Performance Communication.
HPC-WR Interface element for writing of data to circuit board DSCS160
used for HPC, High Performance Communication
FDC-W Write element for fast communication on the AF100 bus.
FDC-R Read element for fast communication on the AF100 bus.
STAPC-W Write element for fast communication on the AF100 bus to an APC.
RFAPC-R Read element for fast communication on the AF100 bus from an APC.
DI-RD Reading and configuration of an absolute parallel binary coded incremental sensor.
DI-RE Fast reading of absolute parallel binary coded incremental sensors.
RSCOM-WR Sending text lines to an RS232 device.
TEXT-LN Calculation of actual length of text lines
VIP-NETW Used for configuration and supervision of a VIP network in order to communicate via
TCP/UDP links to external computers.
VIP-NODE Used for configuration and supervision of nodes connected to a VIP network.
VIP-LINK Used for configuration and supervision of TCP and UDP links to an external
computer.
VIP-CHAN Used for configuration and supervision of channels for a TCP/UDP link.
VIP-R Provides the application programme with an interface for receiving data on a
TCP/UDP link from an external computer.
VIP-W Provides the application programme with an interface for sending data on a
TCP/UDP link to an external computer.
TIME-CON Used for conversion of date and time into internal system time representation.
TIME-SET Used for setting of date and time in the internal system time representation.
Element Description
ADD-G Addition of group data elements.
DIV-G Division of group data elements.
MUL-G Multiplication of group data elements.
SUB-G Subtraction of group data elements.
REG-GMI Group data register with memory.
2.7 Miscellaneous
Element Description
AIR Interface element for direct access of analog input channels
AOW Interface element for direct access of analog output channels.
BCD-RD Reading of data from digital input board DSDI 110.
BCDW-H1 Writing of data to digital output board DSDO 110.
CHOS-H1 Change of state detection.
REG-LD Register element to delay transducer values of a processed material
in a feed-forward control application.
REG-TOT Register element to delay transducer values of a processed material
in a feed-forward control application.
MV320CYC Changing of updating time for a MV320 display.
RAMP-SH Generation of an S-shaped ramp signal.
RAMP-SSH Generation of an S-shaped ramp signal with a balancing function.
TRIGON Trigonometric functions
MEAN-R Mean value calculator for data type real (R).
STRIP-TR Strip tracking on Operator Stations.
SHIFT-BG Shift register element for barographs.
LED-DW Control of cascaded display units.
TBL-SRCH Searching of table data.
Type Description
0 No updating
1 Updating only during display exchange
2 Updating only during display exchange plus event controlled updating
3 Updating according to 2 above plus cyclic updating interval 333 ms
5 As 3 above but cyclic updating each second
6 As for type 3, but cyclic updating every third second
4.1 General
The database element AC450_1 represent PM511V CPU nodes in the Advant Controller
450RMC. In this element is the subrack type described.
5.1 General
An Advant Controller 450RMC multiprocessor system can have two different subracks (8-slots
and 14-slots). The eight slots subrack may contain up to three PM511V (CPU) boards. Figure 4-
1 shows the disposition of boards in the eight slots subrack with two CPU systems. The fourteen
slots subrack may contain up to four PM511V(CPU) boards. Figure 4-2 shows the disposition of
boards in the fourteen slots subrack with four CPU systems.
PM SC PM SC SC SC SC SC SR SR
511 5x0 511 5x0 5x0 5x0 5x0 560 511 511
ABB ABB ABB ABB ABB ABB ABB ABB ABB ABB
F F F F
RUN F RUN F F F F F 2V 2V
HLT TO RUN HLT TO RUN RUN RUN RUN RUN 5V 5V
BAT DUAL 1 BAT DUAL 1 1 1 1 1
CS CS CS
513 513 513
F R F R F R
X4 X4 X4
2 3 2 3
1 4 1 4
2 2 2 2 2 2 SB SB TC
51x 51x 520
ENTER ENTER ABB ABB ABB
RUN
X10 X10
SERV SERV F IP F IP A1 *
BF BP BF BP A2 *
FC FC AG *
B1 *
B2 *
BG *
X11 X11 RA *
I/O I/O F1 F1 RA *
2AF 2AF RB *
RB *
FN *
Option S *
SG *
Slot no. : 1 2 3 4 5 6 7 8
SR SR SB SB SR SR TC
511 511 51x 51x 511 511 520
ABB ABB ABB ABB ABB ABB ABB
F RUN
F F F
2V 2V 2V 2V A1 *
5V F IP F IP
5V BF BP BF BP 5V 5V A2 *
FC FC AG *
B1 *
B2 *
BG *
RA *
F1 F1 RA *
2AF 2AF RB *
Option Option RB *
FN *
Option S *
SG *
PM SC PM SC PM SC SC PM SC SC SC SC SC SC
511 5x0 511 5x0 511 5x0 5x0 511 5x0 5x0 5x0 5x0 5x0 560
ABB ABB ABB ABB ABB ABB ABB ABB ABB ABB ABB ABB ABB ABB
F F F F
RUN F RUN F RUN F F RUN F F F F F F
HLT TO RUN HLT TO RUN HLT TO RUN RUN HLT TO RUN RUN RUN RUN RUN RUN
BAT DUAL 1 BAT DUAL 1 BAT DUAL 1 1 BAT DUAL 1 1
1 1 1 1
CS CS CS CS CS
513 513 513 513 513
F R F R F R F R F R
X4 X4 X4 X4 X4
2 3 2 3 2 3 2 3
1 4 2 1 4 2 1 4 2 2 1 4 2 2
2 2 2 2
Slot no. : 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Figure 5-2. Disposition of boards in the 14-slots subrack with four CPUs.
In figure 4-2 the 14-slots subrack is equipped with redundant voltage regulators SR511 (which
is marked “option”) and redundant power supply’s SB51x for battery backup (which is marked
“option”).
MB300 and/or GCOM for PM511V in slot no. 1 On SC 5x0 in slot no 2 On SC 5x0 in slot no 2
VIP (TCP/IP) for PM511V in slot no. 1 On SC 5x0 in slot no 2, see note 1. On SC 5x0 in slot no 2, see note 1.
MB 510 for PM511V in slot no. 1 Slot 2-8, if ACM is used slot 2-6, Slot 2-8, if ACM is used slot 2-6,
see note 2 see note 2
Submodules for EXCOM etc. are placed on free positions on carrier boards.
Single system
1
PM SC SC SC SC SC SC SC
511V 5x0 5x0 5x0 5x0 5x0 5x0 560
MB300 MB300
HPC
Slot no. 1 2 3 4 5 6 7 8
Figure 5-3. Example of positioning one PM511V and carrier boards.
[Link] Advant Controller 450RMC, multi processor system with two CPUs
MB300 and/or GCOM for PM511V in slot no. 1 On SC 5x0 in slot no 2 On SC 5x0 in slot no 2
VIP (TCP/IP) for PM511V in slot no. 1 On SC 5x0 in slot no 2, see note 1. On SC 5x0 in slot no 2, see note 1.
MB 510 for PM511V in slot 1 Slot no 2, see note 2 Slot no 2, see note 2
MB300 and/or GCOM for PM511V in slot no. 3 On SC 5x0 in slot no 4 and 5 On SC 5x0 in slot no 4
VIP (TCP/IP) for PM511V in slot no. 3 On SC 5x0 in slot no 4 and 5, see On SC 5x0 in slot no 4, see note 1.
note 1.
MB 510 for PM511V in slot 1 & 3 Slot no 4-8, if ACM is used slot 2-6, Slot no 4-8, if ACM is used slot 2-6,
see note 2 see note 2
Note 1: The VIP (TCP/IP) can be used on any SC 5x0. This SC 5x0 can not be shared with other PM511 CPU’s.
Note 2: MB510 is used for flash prom with system software if application program is stored in flash proms. The flash
card with application program is positioned on the PM511V
Table 5-2. Positioning in 8-slots subrack, multiprocessor system with two CPUs
Submodules for EXCOM etc. are placed on free positions on carrier boards.
MB300 MB300
MB510
HPC
Slot no. 1 2 3 4 5 6 7 8
Figure 5-4. Example of positioning two PM511V and carrier boards.
[Link] Advant Controller 450RMC, multi processor system with three CPUs
MB300 and/or GCOM for PM511V in slot no. 1 On SC 5x0 in slot no 2 On SC 5x0 in slot no 2
VIP (TCP/IP) for PM511V in slot no. 1 On SC 5x0 in slot no 2, see note 1. On SC 5x0 in slot no 2, see note 1.
MB 510 for PM511V in slot no. 1 Slot no 2, see note 2 Slot no 2, see note 2
MB300 and/or GCOM for PM511V in slot no. 3 On SC 5x0 in slot no 4 and 5 On SC 5x0 in slot no 4
VIP (TCP/IP) for PM511V in slot no. 3 On SC 5x0 in slot no 4 and 5, see On SC 5x0 in slot no 4, see note 1.
note 1.
MB 510 for PM511V in slot no. 1 and 3 Slot no 4-6, see note 2 Slot no 4-5, see note 2
MB300 and/or GCOM (TCP/IP) for PM511V in On SC 5x0 in slot no 8 On SC 5x0 in slot no 8
slot no. 7
VIP (TCP/IP) for PM511V in slot no. 7 On SC 5x0 in slot no 8, see note 1. On SC 5x0 in slot no 8, see note 1.
MB 510 for PM511V in slot no. 1, 3 and 7 Slot no 8, see note 2 Slot no 8, see note 2
SC 560 - Slot no 6
Note 1: The VIP (TCP/IP) can be used on any SC 5x0. This SC 5x0 can not be shared with other PM511 CPU’s.
Note 2: MB510 is used for flash prom with system software if application program is stored in flash proms. The flash
card with application program is positioned on the PM511V
Table 5-3. Positioning in 8-slots subrack, multiprocessor system with three CPUs
Submodules for EXCOM etc. are placed on free positions on carrier boards
.
Multiprocessor system with three PM511V
1
PM SC PM SC SC SC PM SC
511V 5x0 511V 5x0 510 560 511V 5x0
MB510
MB300
MB300
MB510
HPC
1 Carrier board for
HPC-communication
MB300
MB300
MB300
HPC
Slot no 1 2 3 4 5 6 7 8
Figure 5-5. Example of positioning three PM511V and carrier boards.
VIP (TCP/IP) for PM511V in slot no. 1 On SC 5x0 in slot no 2, see note 1.
MB 510 Slot no 2-14, if ACM is used slot 2-11, see note 2
Submodules for EXCOM etc. are placed on free positions on carrier boards.
MB510
HPC
HPC
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
[Link] Advant Controller 450RMC, multi processor system with two CPUs
VIP (TCP/IP) for PM511V in slot no. 1 On SC 5x0 in slot no 2, see note 1.
VIP (TCP/IP) for PM511V in slot no. 3 On SC 5x0 in slot no 4, see note 1.
MB 510 for PM511V in slot no. 1 & 3 Slot no 4-14, if ACM is used slot 4-11, see note 2
Note 1: The VIP (TCP/IP) can be used on any SC 5x0. This SC 5x0 can not be shared with other PM511 CPU’s.
Note 2: MB510 is used for flash prom with system software if application program is stored in flash proms. The
flash card with application program is positioned on the PM511V
Table 5-5. Positioning in 14-slots subrack, multiprocessor system with two CPUs
Submodules for EXCOM etc. are placed on free positions on carrier boards.
MB300
MB510
HPC
MB300
MB300
HPC
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
1 Carrier board for HPC-communication
[Link] Advant Controller 450RMC, multi processor system with three CPUs
VIP (TCP/IP) for PM511V in slot no. 1 On SC 5x0 in slot no 2, see note 1.
VIP (TCP/IP) for PM511V in slot no. 3 On SC 5x0 in slot no 4, see note 1.
MB 510 for PM511V in slot no. 1 & 3 On SC 5x0 in slot no 4, see note 2
MB300 and/or GCOM for PM511V in slot no. 5 On SC 5x0 in slot no 6 and 7
VIP (TCP/IP) for PM511V in slot no. 5 On SC 5x0 in slot no 6 and 7, see note 1.
MB 510 for PM511V in slot no. 1, 3 & 5 Slot no 6-14, if ACM is used slot 6-11, see note 2
Note 1: The VIP (TCP/IP) can be used on any SC 5x0. This SC 5x0 can not be shared with other PM511 CPU’s.
Note 2: MB510 is used for flash prom with system software if application program is stored in flash proms. The
flash card with application program is positioned on the PM511V
Table 5-6. Positioning in 14-slots subrack, multiprocessor system with three CPUs
Submodules for EXCOM etc. are placed on free positions on carrier boards.
MB300
MB510
HPC
MB300
MB300
MB300
MB300
HPC
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
1 Carrier board for HPC-communication
Figure 5-8. Example of positioning three PM511V and carrier boards.
[Link] Advant Controller 450RMC, multi processor system with four CPUs.
VIP (TCP/IP) for PM511V in slot no. 1 On SC 5x0 in slot no 2, see note 1.
VIP (TCP/IP) for PM511V in slot no. 3 On SC 5x0 in slot no 4, see note 1.
MB300 and/or GCOM for PM511V in slot no. 5 On SC 5x0 in slot no 6 and 7
VIP (TCP/IP) for PM511V in slot no. 5 On SC 5x0 in slot no 6 and 7, see note 1.
MB 510 for PM511V in slot no. 1, 3 & 5 Slot no 6-7, see note 2
MB300 and/or GCOM for PM511V in slot no. 8 On SC 5x0 in slot no 9 and 10
VIP (TCP/IP) for PM511V in slot no. 8 On SC 5x0 in slot no 9 and 10, see note 1.
MB 510 for PM511V in slot no. 1, 3, 5 & 8 Slot no 9-14, if ACM is used slot 9-11, see note 2
Note 1: The VIP (TCP/IP) can be used on any SC 5x0. This SC 5x0 can not be shared with other PM511 CPU’s.
Note 2: MB510 is used for flash prom with system software if application program is stored in flash proms. The
flash card with application program is positioned on the PM511V
Table 5-7. Positioning in 14-slots subrack, multiprocessor system with four CPUs
Submodules for EXCOM etc. are placed on free positions on carrier boards.
MB300
MB300
MB300
MB300
MB300
MB300 MB300
MB510
HPC
MB300
MB300
MB300
MB300
MB300
HPC
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
1 Carrier board for HPC-communication
Figure 5-9. Example of positioning four PM511V and carrier boards.
card
MB510
MB510
Prog.
Prog.
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Figure 5-10. Example of positioning MB510 and program cards in 14-slots subrack.
App. dump
App. dump
App. dump
App. dump
MB510
MB510
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
6.1 General
The internal communication consists of data exchange between the PM511V CPU’s in the central
rack. The communication is performed via a common memory. The PM511V CPU which is posi-
tioned in slot #1, is the host for this common memory.
The PM511V CPU in slot #1 must have the working modes “OPERATION” (P1) or
“CONFIGURATION” (P2) to be host for the common memory. If this CPU has other working
modes (“STOPPED” or “OFFLINE”) or if the CPU is not present in the central rack. Next
PM511V CPU to the right in the central rack, can be host if the working mode is “OPERATION”
(P1) or “CONFIGURATION” (P2), else next PM511V CPU to the right is tested and so on.
CM
CM - Common memory
Slot no 1 2 3 4 5 6 7 8
Figure 6-1. Example of common memory in 8-slots central rack with two PM511V CPU’s.
CM
CM - Common memory
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Figure 6-2. Example of common memory in 14-slots central rack with four PM511V CPU’s.
7.1 General
In the AC 450RMC multiprocessor system has each PM511V CPUs local S100 I/O buses.
MB300
MB300
MB300
MB300
MB300
MB300
HPC
MB300
MB300
MB300
MB300
MB300
MB300
HPC
S100 I/O rack(s) S100 I/O rack(s)
8.1 Introduction
The application programs of the PM511V CPU in the AC 450RMC can be stored in a
flash card (PCMCIA).
At COLD start and at RECONFIG the PM511V CPU is loaded automatic with the appli-
cation program stored in the flash card. The PM511V CPU comes into the same mode
as the PM511V CPU had when the application program dump (DUAP) was taken.
Guidelines
• No restrictions in location of submodule and submodule carrier in controller sub-
rack. Use leftover slot on a submodule carrier if possible.
• Advant Station 130 Engineering Station (AS 130ES) and AdvaBuild On-line
Builder together with the file manager (in Windows) support the preparation of
flash cards (PCMCIA) with application dumps.
Considerations
• The system program backup and the application program backup can not be mixed
in one single flash card.
• The flash card for application backup must first be formatted using the AdvaBuild
On-line Builder.
• The application program dump (DUAP) to be used should preferably be taken
while the controller is in the operation mode (P1) with all PC-programs running.
This will ensure that no manual intervention is needed to get into full operation
after shut down and an automatic restart.
• Select a flash card that takes the actual application programs for all PM511V CPUs
in the subrack. In case the memory size of the flash card is too small use additional
flash card(s).
• Each PM511V CPU in the subrack has it own flash card which is positioned in the
PCMCIA-slot on the PM511V CPUs
At COLD start the PM511V CPUs searches for a flash card containing application pro-
grams. When the flash card is located, the PM511V CPU load the stored application
dump.
MB300
MB300
MB300
APP. DUMP
APP. DUMP
APP. DUMP
APP. DUMP
MB300
MB300
MB300
HPC
MB300
MB300
MB300
MB300
MB300
MB300
HPC
Figure 8-1. Application program dumps.
9.1 General
High Performance Communication bus (HPC) is a fast, low-load, Local Area Network (LAN)
for interconnection of MasterPiece 200/1 RMC stations and/or Advant Controller 450RMC
stations in a multi-drop configuration.
Carrier board SC 560 is used for the protocol stack; otherwise the same hardware applies to both
HPC and to MB300.
The PC elements HPC-WR and HPC-RD are used for communication on PC program level. The
data is routed by network, node and a channel identity. HPC-WR is used for sending of data and
HPC-RD for reading of data.
Several HPC-RD elements can read data from the same HPC-WR element. The HPC-RD
elements may even be located in all CPU systems within a multiprocessor system. HPC
messages may also be broadcasted to all nodes within a network.
9.2 Performance
Maximum size of a HPC messages is 970 byte.
An Advant Controller 450RMC station may have up to four HPC links where each SC 560
carrier board supports two links. A HPC network may contain up to 127 nodes.
A maximum forty receiving channels can be designated to a specific node. The total number of
receiving channels for one HPC node is limited to 80 channels.
The message flow through the HPC communication board SC560 is limited to 600 messages/s
for small message (typically < 200 bytes) messages.
S3 S2 S1
Network Node Slave Protocol
number number number type
12345678 12345678 12345678
1 1 1
0 0 0
CS
513
F R F=FAULT LED S3 S2 S1
R=RUN
TXRX TX=Transmit
RX=Receive
X4
AIU
9.3.1 Strappings
SC560
F
RUN-LED
RUN
(GREEN)
1
MODULE 1 X1x
X1 - X7
FB+ BACK
PLANE
X2x
MODULE 2
D70
D68
D71
D69
D72
CONNECTORS X1-X7
The rear connectors, X1-X7, contains the connection to the FB+ back-plane.
PROM locations
The SC 560 board has five sockets for PROM located near the lower edge of the board. Four
sockets (D68 - D71) are intended for the “main program memory” and the fifth sockets (D72) is
not used.
10.1 General
The Vendor Internet Protocol (VIP) function is intended to be used for communication between
AC 450RMC controllers and external computers supplied by vendors outside ABB, but can also
be used for internal communication between AC 450RMC controllers.
The VIP function supports Transmission Control Protocol (TCP) and User Datagram Protocol
(UDP) built on the Internet Protocol (IP) for ethernet.
CI
546
F R F = Fault led
R = Run
TX = Transmit
Tx Rx RX = Receive
COLL = Collision
A = Not Used
COLL A
S1, S2, and S3 =
DIP-switches
S3 S1 S2
X26 AUI
DIP-Switches
The DIP-switch S1 is used for node number. The DIP-switches S2, and S3 are NOT used.
CAUTION
Always disconnect the transceiver cable (DSTK 128/129, TK 576Vxxx) from the
X26 contact of CI546 before inserting or removing CI546.
NOTE
SC510 and SC520 carrier board holding the CI546 submodule must not be shared
with other main CPU’s. SC560 carrier board can however be shared.
S3 S1 S2
Not used Node Not used
number
12 34 567 8
12 34 567 8
12 34 567 8
0 1 0 1 0 1
S3 S1 S2
S1
12 34 567 8
0 1
PM SC PM SC SC SC PM SC
511V 5x0 511V 5x0 510 510 510 5x0 CS513 MB510
MB510
TCP/IP
MB300
MB300
Slot no 1 2 3 4 5 6 7 8
Figure 10-3. Rack Layout with TCP/IP interface
DIP-Switches
The DIP-switch S2 is used for node number. The DIP-switches S1, and S3 are NOT used.
S3 S2 S1
Not Node Not
used number used
12345678 12345678 12345678
1 1 1
0 0 0
8 = Most Significant Bit
1 = Least Significant Bit
S2
1 2 34 5 6 7 8
1 Bit 1 - 7 defines the node number.
0 Allowed values: 1 - 99.
10.3 Configuration
Configuration of communication links is done by means of a data base element and the PC
elements below.
• VIP-NETW Configuration of network
• VIP-NODE Configuration of nodes
• VIP-LINK Configuration of links
• VIP-CHAN Configuration of channels
A configuration can be illustrated as a tree structure according to Figure 10-6.
Network
Node
Link
Channel
Channel
Channel
Link
Channel
Channel
Node
Link
Channel
Channel
Channel
NOTE
A CI532 DB element must be created for each network interface card. The IMPLEMENTED
property must be set to 0 by the user to allow the PC element VIP-NETW to initialize the DB
element.
Network: 11 (MB300)
Network: 12 (MB300) Network: 13 (MB300)
Network: 19 (TCP/IP)
NOTE
The real time performance in the transit node and on the MB300 network cable
should be considered when large amount of transit traffic is used.
Refer MasterNetTM User’s Guide.
11.1 General
The Advanced Control Module (ACM) is normally used for calculations of a process model.
The ACM node consists of the following hardware:
• PM510V CPU
• Carrier board SC510 with the submodule MB510.
The MB510 is the interface for the flash card which is loaded with software for e.g. the process
model.
The ACM node communicate with the PM510V CPU in slot no 1.
The ACM node uses cold start and the mode selector on PM510V CPU must always be in posi-
tion 3 = CLEAR.
The ACM can be used both in an AC 450RMC single system and in an AC 450RMC
multiprocessor system.
MB300
MB510
HPC
MB300
HPC
Slot no 1 2 3 4 5 6 7 8
Slot no. 7 and 8 are used
1 Carrier board for HPC-communication for the ACM node.
Figure 11-1. Example with ACM in a multiprocessor system with two CPUs in the 8-slots subrack.
If two ACM nodes are used, the first ACM-node is positioned in slot no 7 and slot no 8.
The second ACM node is positioned in slot no 5 and 6. The second ACM node affects
the position of the other circuit boards in the rack.
1
PM SC SC SC PM SC PM SC
511V 5x0 510 560 510V 5x0 510V 5x0
MB510
MB300
MB510
MB510
HPC
MB300
Slot no 1 2 3 HPC
4 5 6 7 8
MB300
MB510
MB510
HPC
MB300
MB300
HPC
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
If two ACM nodes are used, the first ACM-node is positioned in slot no 7 and slot no 8.
The second ACM node is positioned in slot no 5 and 6. The second ACM node affects
the position of the other circuit boards in the rack.
Multiprocessor system with three PM 511V CPUs and two ACM nodes.
1
PM SC PM SC PM SC SC SC PM SC PM SC SC
511V 5x0 511V 5x0 511V 5x0 5x0 510 511V 5x0 510V 5x0 560
MB300
MB300
MB510
MB300
MB300
MB510
MB510
HPC
MB300
MB300
MB300
MB300
HPC
Slot no 1 2 3 4 5 6 7 8 9 10 11 12 13 14
12.1 General
CPU systems that are not connected to a MasterBus 300 network automatically forward their
system messages to the leftmost CPU system that is connected to MB300.
Layout of system messages from a CPU system without MB300:
1 1 Sn*<time> <mtype> <code> <task> <address> <data1> <data2>
13.1 General
Advant Controller 450RMC has four working modes. The CPU PM511V front LED
display indicates the working modes with codes “P1”, “P2”, “-3” and “-4”.
“P1”, working mode OPERATION:
The CPU executes the application program. This is an Advant Controller
450RMC normal status. The system performs control tasks and
controls process outputs.
“P2”, working mode CONFIGURATION:
The CPU does not execute the application program. The controller sys-
tem and the application program can now be configured.
“-3”, working mode STOPPED:
The CPU does not execute at all. The CPU performs self-tests of some
basic controller functions. The process outputs have a defined state (zero).
“-4”, working mode OFFLINE:
The CPU executes only low-level fault-tracing commands usually per-
formed by ABB personnel. The process outputs have a defined state (zero).
During the boot phase and during the time of transition between certain working modes the LED
display will indicate intermediate states with the help of a sequence of special codes. These codes
are relevant at fault finding and system analysis.
The multiprocessor system can be started up with a Global start-up or a Local start-up.
PM PM
511V 511V
P P
1 2
1 2 3 4 5 6
PM PM PM PM PM PM
511V 511V 511V 511V 511V 511V
_ _
C P P
L _ _ _ _ 2
1 2 3 4 5 6
PM PM PM PM PM PM
511V 511V 511V 511V 511V 511V
_ _
A P P
L _ _ _ _ 1
1 2 3 4 5
PM PM PM PM PM
511V 511V 511V 511V 511V
P A P P
2 _ _ _ 1
14.1 General
The power supply system for Advant Controller 450RMC includes a battery package intended
for current supply for RAM (Random Access Memory) and the system clock of the CPU-boards
PM511V in event of a power failure in the subrack.
The backup power supply is supervised. Status is available for the CPU-boards PM511V by the
controller diagnostic system.
At power-up the CPUs starts with an AUTO-start or a COLD-start.
AUTO-start is preformed when the status of the battery is okay.
COLD-start is performed when the battery has been discharged.
Chapter 15 Limitations
15.1 General
See chapter 5 Multiprocessor system considerations concerning positioning of circuit boards
in the subrack.
16.1 General
Table 12-1 Address jumpering of RMC boards below shows recommended addresses to be
used for special RMC I/O boards.
Address range
Board Remark
Hexadecimal Decimal
DSDI 110 C0...EF 192...239 (For boards handled
by BCD-RD)
DSDO 110 C0...EF 192...239 (For boards handled
by BCDW-H1)
DSDP 140 B C0...EF 192...239
DSDP 160 C0...EF 192...239
DSDP 161 C0...EF 192...239
Chapter 17 Positioning
17.1.1 Summary
The Digital input element TIME_DIS holds the data values of the properties associated to a
digital input channel. Besides this special properties for very accurate time tagging is available.
The element is subordinated to the DI-board DSDI 110 or DSDI 120.
17.1.2 Properties
Value PC
Terminal Default
Name entered by connection Description
No. value
user data type
52 ALLOWED user 0 - 127=the time tagging is activated.
73 VALID system - B 1=the time information is valid.
82 DI01 system - B Is set at positive transition.
83 DI10 system - B Is set at negative transition.
90 INST01 system - I Event time for the last 0 to 1
transition at the digital input.
91 INST10 system - I Event time for the last 1 to 0
transition at the digital input.
92 FTIME_H system - I The duration of the last 0 to 1 pulse
at the digital input.
93 FTIME_L system - I The duration of the last 1 to 0 pulse
at the digital input.
94 CLOCKADR user - H*4 Address to clock board DSDP 150.
The address format is
H’C080xx00, where xx is the
jumpered board address.
17.1.3 Function
The circuit board DSDP 150 contains a ring counter used as a clock for time tagging of DI
events. The initiating of the clock is performed by the PC element CLCK-H1. The resolution of
the clock is one millisecond. The maximum pulse time possible to register is 32 seconds. The
maximal difference between the actual time at the digital input and the registered time in the
database is 3.1 ms. The average difference is 1.55 ms.
The properties INST01, FTIME_H and FTIME_L will be updated only if property DI01 is reset
when a positive transition occurs.
17.1.4 Connection
The PC element TIME-H1 has to be connected to property number 95 (ADDR) that is not
visible in the database element.
To connect TIME-H1 to ADDR following syntax can be used: “=DIx.y:42(2).95” where x is
board number and y is the channel number.
S1
S
4
S
3
S
2
Address: S1 Example
1 0 1 0
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
Address: $C0
S3-S4 S2
1
3
4
5
S101-S106
1 6
2 S1
7 10
3
8 11
9 12 X3
S107-S112
S10 S20
Address: S1 Example
1 0 1 0
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
Address: $C0
S101-S112 S10-S20 X3
1 1 1
3
5
7
9
X3
S1
S10
S20
S30
X4
S40
Address: S1 Example
1 0 1 0
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
Address: $C0
S10-S40 X3 X4
1 1 1
S2
S1
S4
Address: S1 Example
1 0 1 0
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
Address: $C0
S2 S4
1 1
19.1 General
If error occurs see the manual “Advant Controller 450 User’s Guide” for fault tracing.
Note. In this mode of the CPU the communication speed between the CPU and
the Engineering Station is reduced. At communication the LED-diodes
marked “LO” on the CPU will flash (instead of the LED-diodes marked
“HI”).