CUET
CHITTAGONG UNIVERSITY OF ENGINEERING AND
TECHNOLOGY
Department of Electrical and Electronic Engineering
EXPERIMENT NO: 02
Phase Shift Keying (PSK) Modulation
and Demodulation
Course No : EEE-474
Course Title : Telecommunication Engineering Sessional
Name of the Student : Bahauddin Mahmud
ID No : 2102019
Level / Term : Level-04 / Term-01
Section / Group : Section-A / Group-03
Date of Performance : June 02, 2026
Date of Submission : June 16, 2026
Remarks:
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OBJECTIVES
• To study and demonstrate the fundamental principles of Phase Shift Keying (PSK) binary signal generation.
• To implement and analyze the performance of a Costas Loop / synchronous structure for recovery of the
baseband digital information from a phase-modulated carrier signal.
• To evaluate the operational stages of PSK demodulation, including carrier frequency multiplication, phase
synchronization via a Voltage Controlled Oscillator (VCO), phase detection, and low-pass filtering.
APPARATUS
• Digital Communication 2 Laboratory Kit (LabVolt Series 91023-20)
• Two-part Interconnecting Blocks
• BNC and Point-to-Point Connecting Wires
• Digital Storage Oscilloscope (GW Instek)
CONNECTION BLOCK DIAGRAMS
The generation of a binary Phase Shift Keying (PSK) signal relies on changing the phase of a constant-amplitude
sinusoidal carrier in response to a digital input sequence. The operational block diagrams for modulation and
synchronous coherent detection are structured as follows:
Digital Information Balanced Modulator Band Pass Filter
(Baseband NRZ)
→ (Product Mixer)
→ (BPF)
→ PSK Output
↑
Local Carrier
Oscillator
Fig-01: Block diagram of Phase Shift Keying (PSK) Modulation
Incoming
Frequency Phase Detector Low Pass Voltage R
PSK → Doubler
→ (Multiplier)
→ Filter (LPF)
→ Comparator
→ N
Signal
↑
Voltage Controlled
Oscillator (VCO)
Fig-02: Block diagram of Synchronous PSK Demodulation loop using synchronized local reference
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OSCILLOSCOPE OBSERVATIONS
The signal waveforms captured at critical intermediate test points during the experimentation are displayed below.
Channel 1 (top trace, yellow) consistently denotes the synchronized reference baseband data stream, while Channel
2 (bottom trace, cyan/blue) represents the local network response under investigation.
Figure 3: Time-domain correspondence between the Figure 4: Fully developed Phase Shift Keying (PSK)
original digital baseband message (top) and the modulated carrier wave exhibiting exact π radian (180°)
preliminary primary demodulated stream (bottom). phase shifts at binary transition boundaries.
Figure 5: Output profile of the absolute frequency doubler Figure 6: Highly stable output square-wave generated by
stage showing square-wave conversion at twice the the local Voltage Controlled Oscillator (VCO),
original fundamental carrier frequency (2f_c). establishing a phase-coherent tracking base.
Figure 7: Time-domain output trace extracted from the Figure 8: Low-Pass Filter (LPF) output signal, tracking a
active Phase Shifter circuit module, used for aligning smooth analog contour by eliminating high-frequency
carrier match-points. mixed components.
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Δt = 860.0 μs
Figure 9: Propagation delay measurements recorded between the primary reference
digital input sequence (top) and the completely reconstructed output digital data stream
(bottom).
DETAILED PROCESS DESCRIPTION
The operational cycle of Phase Shift Keying (PSK) transmission involves distinct stages of modulation and
demodulation. As observed in the initial stage of processing, the digital baseband message text and input binary
sequence establish explicit logic boundary states. The modulation circuit incorporates a product mixer structure that
combines this unipolar data sequence with a high-frequency sinusoidal reference carrier. The resulting phase-
modulated waveform displays clear phase transitions as illustrated in Figure 4. When the digital bit sequence
changes state from a binary logic high '1' to a binary logic low '0', the carrier undergoes an abrupt phase shift of
exactly π radians (or 180 degrees). This maintains a constant signal envelope while securely encoding the data
within the phase changes of the transmitted wave.
For synchronous coherent detection, the loop must reconstruct a clean baseband outline from the phase transitions
without dropping bits. The incoming PSK signal enters an absolute frequency doubler stage. As demonstrated in
Figure 5, this non-linear mathematical operation effectively cancels out the 180^\circ alternating phase variations
by doubling the fundamental carrier parameters, yielding a constant periodic waveform at a frequency of 2f_c. This
continuous high-frequency reference drives a local Phase-Locked Loop (PLL) containing a central Voltage
Controlled Oscillator (VCO). The VCO output, shown in Figure 6, stabilizes and locks onto the frequency-doubled
carrier tracking tone, providing a reference framework independent of message channel noise.
The signal is then routed through an adjustable Phase Shifter module, shown in Figure 7, to correct for any
transmission delay or phase discrepancies introduced by the physical cabling. The phase-aligned reference tone is
multiplied with the raw incoming PSK wave in a synchronous product demodulator block. This multiplication
yields a rectified high-frequency ripple signal containing a distinct baseband component. Passing this waveform
through an integrated low-pass filter (LPF) suppresses the high-frequency mixer products, leaving a smooth analog
voltage contour that tracks the baseband data transitions (see Figure 8).
The final reconstruction step uses a high-gain non-inverting voltage comparator circuit. This module acts as a
slicing threshold detector that squares up the filtered analog envelope, restoring it to clean digital logic levels. As
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analyzed in Figure 3 and Figure 9, the fully recovered digital square wave matches the original unipolar input data
stream. However, it exhibits a distinct propagation delay of exactly \Delta t = 860.0\,\mu ext{s} (corresponding to a
measured shifting frequency index of f = 1.163\, ext{kHz}). This delay is primarily due to the storage times and
group delay characteristics of the low-pass filter stages and comparator circuits.
BRIEF DISCUSSION
In this experiment, binary Phase Shift Keying (PSK) modulation and coherent demodulation were analyzed using
the LabVolt training platform and high-bandwidth oscilloscope observations. The generation of the PSK wave was
confirmed by observing the localized 180^\circ phase reversals at the binary data transition points. These
transitions occurred while maintaining a constant peak-to-peak carrier envelope amplitude, illustrating the high
power efficiency of phase-modulation schemes compared to Amplitude Shift Keying (ASK).
For signal recovery, synchronous coherent detection was achieved using an absolute frequency doubler paired with
a local tracking VCO filter loop. This setup successfully circumvented the phase ambiguity inherent in PSK
signals. The experiment demonstrated that precise phase alignment via the phase shifter module is essential; any
significant phase misalignment at the demodulator mixer directly reduces the output signal-to-noise ratio and can
cause severe bit inversion or data corruption. The final squared digital output waveform closely matched the
original baseband sequence. The observed propagation delay of 860.0\,\mu ext{s} represents the cumulative group
delay of the active low-pass filtering and comparator stages. In conclusion, the experiment verified that
synchronous PSK systems provide robust and accurate data recovery, making them highly suitable for power-
limited and noise-prone digital communication channels.
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