‰ In the early days of the computer,

8051 programmers coded in machine language,

ASSEMBLY consisting of 0s and 1s
PROGRAMMING ¾ Tedious, slow and prone to error
‰ Assembly languages, which provided
Structure of
mnemonics for the machine code instructions,
Assembly
plus other features, were developed
Language
¾ An Assembly language program consist of a series
of lines of Assembly language instructions
‰ Assembly language is referred to as a low-
level language
¾ It deals directly with the internal structure of the
CPU

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 ‰ Assembly language instruction includes
8051 ¾ a mnemonic (abbreviation easy to remember)
ASSEMBLY ƒ the commands to the CPU, telling it what those
PROGRAMMING to do with those items
¾ optionally followed by one or two operands
Structure of ƒ the data items being manipulated
Assembly
‰ A given Assembly language program is
Language
a series of statements, or lines
¾ Assembly language instructions
ƒ Tell the CPU what to do
¾ Directives (or pseudo-instructions)
ƒ Give directions to the assembler

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 ‰ An Assembly language instruction
8051
ASSEMBLY consists of four fields:
PROGRAMMING [label:] Mnemonic [operands] [;comment]

ORG 0H ;start(origin) at location

Structure of 0
MOV R5, #25H ;load 25H into R5
Assembly MOV R7, #34H ;load 34H into R7
Directives do not
Language MOV A, #0 ;load 0 into generate
A any machine
ADD A, R5 ;add contentscode
ofandR5aretoused
A
;now A = A + only
R5 by the assembler
Mnemonics ADD A, R7 ;add contents of R7 to A
produce ;now A = A + R7
opcodes ADD A, #12H ;add to A value 12H
;now A = A + 12H
HERE: SJMP HERE ;stay in this loop
END ;endComments
of asm may
source file
be at the end of a
The label field allows line or on a line by themselves
the program to refer to a The assembler ignores comments
line of code by name
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 ‰ The step of Assembly language
ASSEMBLING
AND RUNNING
program are outlines as follows:
AN 8051 1) First we use an editor to type a program,
PROGRAM many excellent editors or word
processors are available that can be used
to create and/or edit the program
ƒ Notice that the editor must be able to produce
an ASCII file
ƒ For many assemblers, the file names follow
the usual DOS conventions, but the source file
has the extension “asm“ or “src”, depending
on which assembly you are using

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 2) The “asm” source file containing the
ASSEMBLING program code created in step 1 is fed to
AND RUNNING an 8051 assembler
AN 8051 ƒ The assembler converts the instructions into
PROGRAM machine code
(cont’) ƒ The assembler will produce an object file and
a list file
ƒ The extension for the object file is “obj” while
the extension for the list file is “lst”
3) Assembler require a third step called
linking
ƒ The linker program takes one or more object
code files and produce an absolute object file
with the extension “abs”
ƒ This abs file is used by 8051 trainers that
have a monitor program

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 4) Next the “abs” file is fed into a program
ASSEMBLING called “OH” (object to hex converter)
AND RUNNING which creates a file with extension “hex”
AN 8051 that is ready to burn into ROM
PROGRAM ƒ This program comes with all 8051 assemblers
(cont’)
ƒ Recent Windows-based assemblers combine
step 2 through 4 into one step

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 EDITOR
PROGRAM
ASSEMBLING [Link]
AND RUNNING
AN 8051 ASSEMBLER
PROGRAM PROGRAM
[Link]
Other obj files
Steps to Create [Link]

a Program LINKER
PROGRAM

[Link]

OH
PROGRAM

[Link]
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 ‰ The lst (list) file, which is optional, is
ASSEMBLING
AND RUNNING
very useful to the programmer
AN 8051 ¾ It lists all the opcodes and addresses as
PROGRAM well as errors that the assembler detected
¾ The programmer uses the lst file to find
lst File the syntax errors or debug
1 0000 ORG 0H ;start (origin) at 0
2 0000 7D25 MOV R5,#25H ;load 25H into R5
3 0002 7F34 MOV R7,#34H ;load 34H into R7
4 0004 7400 MOV A,#0 ;load 0 into A
5 0006 2D ADD A,R5 ;add contents of R5 to A
;now A = A + R5
6 0007 2F ADD A,R7 ;add contents of R7 to A
;now A = A + R7
7 0008 2412 ADD A,#12H ;add to A value 12H
;now A = A + 12H
8 000A 80EF HERE: SJMP HERE;stay in this loop
9 000C END ;end of asm source file
address
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 ‰ The program counter points to the
PROGRAM
COUNTER AND
address of the next instruction to be
ROM SPACE executed
¾ As the CPU fetches the opcode from the
Program program ROM, the program counter is
Counter increasing to point to the next instruction
‰ The program counter is 16 bits wide
¾ This means that it can access program
addresses 0000 to FFFFH, a total of 64K
bytes of code

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 ‰ All 8051 members start at memory
PROGRAM
COUNTER AND
address 0000 when they’re powered
ROM SPACE up
¾ Program Counter has the value of 0000
Power up ¾ The first opcode is burned into ROM
address 0000H, since this is where the
8051 looks for the first instruction when it
is booted
¾ We achieve this by the ORG statement in
the source program

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 ‰ Examine the list file and how the code
PROGRAM is placed in ROM
COUNTER AND 1 0000 ORG 0H ;start (origin) at 0

ROM SPACE
2 0000 7D25 MOV R5,#25H ;load 25H into R5
3 0002 7F34 MOV R7,#34H ;load 34H into R7
4 0004 7400 MOV A,#0 ;load 0 into A
5 0006 2D ADD A,R5 ;add contents of R5 to A
Placing Code in ;now A = A + R5
6 0007 2F ADD A,R7 ;add contents of R7 to A
ROM ;now A = A + R7
7 0008 2412 ADD A,#12H ;add to A value 12H
;now A = A + 12H
8 000A 80EF HERE: SJMP HERE ;stay in this loop
9 000C END ;end of asm source file

ROM Address Machine Language Assembly Language

0000 7D25 MOV R5, #25H
0002 7F34 MOV R7, #34H
0004 7400 MOV A, #0
0006 2D ADD A, R5
0007 2F ADD A, R7
0008 2412 ADD A, #12H
000A 80EF HERE: SJMP HERE

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 ‰ After the program is burned into ROM,
PROGRAM
COUNTER AND
the opcode and operand are placed in
ROM SPACE ROM memory location starting at 0000
ROM contents
Address Code
Placing Code in
0000 7D
ROM 0001 25
(cont’) 0002 7F
0003 34
0004 74
0005 00
0006 2D
0007 2F
0008 24
0009 12
000A 80
000B FE

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 ‰ A step-by-step description of the
PROGRAM
COUNTER AND
action of the 8051 upon applying
ROM SPACE power on it
1. When 8051 is powered up, the PC has
Executing 0000 and starts to fetch the first opcode
Program from location 0000 of program ROM
ƒ Upon executing the opcode 7D, the CPU
fetches the value 25 and places it in R5
ƒ Now one instruction is finished, and then the
PC is incremented to point to 0002, containing
opcode 7F
2. Upon executing the opcode 7F, the value
34H is moved into R7
ƒ The PC is incremented to 0004

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 ‰ (cont’)
PROGRAM
COUNTER AND 3. The instruction at location 0004 is
ROM SPACE executed and now PC = 0006
4. After the execution of the 1-byte
Executing instruction at location 0006, PC = 0007
Program 5. Upon execution of this 1-byte instruction
(cont’) at 0007, PC is incremented to 0008
ƒ This process goes on until all the instructions
are fetched and executed
ƒ The fact that program counter points at the
next instruction to be executed explains some
microprocessors call it the instruction pointer

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 ‰ No member of 8051 family can access
PROGRAM
COUNTER AND
more than 64K bytes of opcode
ROM SPACE ¾ The program counter is a 16-bit register

ROM Memory Byte Byte Byte

Map in 8051 0000 0000 0000

Family
0FFF
8751
AT89C51 3FFF
DS89C420/30

7FFF
DS5000-32

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 ‰ 8051 microcontroller has only one data
8051 DATA
TYPES AND
type - 8 bits
DIRECTIVES ¾ The size of each register is also 8 bits
¾ It is the job of the programmer to break
Data Type down data larger than 8 bits (00 to FFH,
or 0 to 255 in decimal)
¾ The data types can be positive or negative

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 ‰ The DB directive is the most widely
8051 DATA
TYPES AND
used data directive in the assembler
DIRECTIVES ¾ It is used to define the 8-bit data
¾ When DB is used to define data, the
Assembler numbers can be in decimal, binary, hex,
The “D” after the decimal
Directives ASCII formats number is optional, but using
“B” (binary) and “H”
ORG 500H (hexadecimal) for the others is
required
DATA1: DB 28 ;DECIMAL (1C in Hex)
DATA2: DB 00110101B ;BINARY (35 in Hex)
DATA3: DB 39H ;HEX
The Assembler will ORG 510H Place ASCII in quotation marks
convert the numbers DATA4: DB “2591” The;ASCII
AssemblerNUMBERS
will assign ASCII
into hex code for the numbers or characters
ORG 518H
DATA6: DB “My name is Joe”
Define ASCII strings larger ;ASCII CHARACTERS
than two characters

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 ‰ ORG (origin)
8051 DATA ¾ The ORG directive is used to indicate the
TYPES AND beginning of the address
DIRECTIVES ¾ The number that comes after ORG can be
either in hex and decimal
Assembler ƒ If the number is not followed by H, it is decimal
Directives and the assembler will convert it to hex
(cont’) ‰ END
¾ This indicates to the assembler the end of
the source (asm) file
¾ The END directive is the last line of an
8051 program
ƒ Mean that in the code anything after the END
directive is ignored by the assembler

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 ‰ EQU (equate)
8051 DATA
TYPES AND ¾ This is used to define a constant without
DIRECTIVES occupying a memory location
¾ The EQU directive does not set aside
Assembler storage for a data item but associates a
directives constant value with a data label
(cont’) ƒ When the label appears in the program, its
constant value will be substituted for the label

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 ‰ EQU (equate) (cont’)
8051 DATA
TYPES AND ¾ Assume that there is a constant used in
DIRECTIVES many different places in the program, and
the programmer wants to change its value
Assembler throughout
ƒ By the use of EQU, one can change it once and
directives
the assembler will change all of its occurrences
(cont’)
Use EQU for the
counter constant

COUNT EQU 25
... ....
MOV R3, #COUNT

The constant is used to

load the R3 register

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 JUMP, LOOP AND CALL
INSTRUCTIONS

The 8051 Microcontroller and Embedded

Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young
楊中平

Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering
National Cheng Kung University, TAIWAN
 ‰ Repeating a sequence of instructions a
LOOP AND certain number of times is called a
JUMP loop
INSTRUCTIONS
¾ Loop action is performed by
DJNZ reg, Label
Looping
ƒ The register is decremented
ƒ If it is not zero, it jumps to the target address
referred to by the label
A loop can be repeated a ƒ Prior to the start of loop the register is loaded
maximum of 255 times, if with the counter for the number of repetitions
R2 is FFH
ƒ Counter can be R0 – R7 or RAM location
;This program adds value 3 to the ACC ten times
MOV A,#0 ;A=0, clear ACC
MOV R2,#10 ;load counter R2=10
AGAIN: ADD A,#03 ;add 03 to ACC
DJNZ R2,AGAIN ;repeat until R2=0,10 times
MOV R5,A ;save A in R5

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 ‰ If we want to repeat an action more
LOOP AND
JUMP
times than 256, we use a loop inside a
INSTRUCTIONS loop, which is called nested loop
¾ We use multiple registers to hold the
Nested Loop count

Write a program to (a) load the accumulator with the value 55H, and
(b) complement the ACC 700 times

MOV A,#55H ;A=55H

MOV R3,#10 ;R3=10, outer loop count
NEXT: MOV R2,#70 ;R2=70, inner loop count
AGAIN: CPL A ;complement A register
DJNZ R2,AGAIN ;repeat it 70 times
DJNZ R3,NEXT

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 ‰ Jump only if a certain condition is met
LOOP AND JZ label ;jump if A=0
JUMP MOV A,R0 ;A=R0
INSTRUCTIONS JZ OVER ;jump if A = 0
MOV A,R1 ;A=R1
JZ OVER ;jump if A = 0
Conditional ...
Jumps OVER: Can be used only for register A,
not any other register

Determine if R5 contains the value 0. If so, put 55H in it.

MOV A,R5 ;copy R5 to A
JNZ NEXT ;jump if A is not zero
MOV R5,#55H
NEXT: ...

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 ‰ (cont’)
LOOP AND JNC label ;jump if no carry, CY=0
JUMP ¾ If CY = 0, the CPU starts to fetch and execute
INSTRUCTIONS instruction from the address of the label
¾ If CY = 1, it will not jump but will execute the next
Conditional instruction below JNC
Jumps Find the sum of the values 79H, F5H, E2H. Put the sum in registers
(cont’) R0 (low byte) and R5 (high byte).
MOV R5,#0
MOV A,#0 ;A=0
MOV R5,A ;clear R5
ADD A,#79H ;A=0+79H=79H
; JNC N_1 ;if CY=0, add next number
; INC R5 ;if CY=1, increment R5
N_1: ADD A,#0F5H ;A=79+F5=6E and CY=1
JNC N_2 ;jump if CY=0
INC R5 ;if CY=1,increment R5 (R5=1)
N_2: ADD A,#0E2H ;A=6E+E2=50 and CY=1
JNC OVER ;jump if CY=0
INC R5 ;if CY=1, increment 5
OVER: MOV R0,A ;now R0=50H, and R5=02
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 8051 conditional jump instructions
LOOP AND Instructions Actions
JUMP JZ Jump if A ＝ 0
INSTRUCTIONS JNZ Jump if A ≠ 0
DJNZ Decrement and Jump if A ≠ 0
Conditional CJNE A,byte Jump if A ≠ byte
Jump if byte ≠ #data
Jumps CJNE reg,#data
(cont’) JC Jump if CY ＝ 1
JNC Jump if CY ＝ 0
JB Jump if bit ＝ 1
JNB Jump if bit ＝ 0
JBC Jump if bit ＝ 1 and clear bit

‰ All conditional jumps are short jumps

¾ The address of the target must within
-128 to +127 bytes of the contents of PC

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 The unconditional jump is a jump in
‰
LOOP AND which control is transferred
JUMP unconditionally to the target location
INSTRUCTIONS
LJMP (long jump)
Unconditional ¾ 3-byte instruction
Jumps ƒ First byte is the opcode
ƒ Second and third bytes represent the 16-bit
target address
– Any memory location from 0000 to FFFFH
SJMP (short jump)
¾ 2-byte instruction
ƒ First byte is the opcode
ƒ Second byte is the relative target address
– 00 to FFH (forward +127 and backward
-128 bytes from the current PC)

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 ‰ To calculate the target address of a
LOOP AND
JUMP
short jump (SJMP, JNC, JZ, DJNZ, etc.)
INSTRUCTIONS ¾ The second byte is added to the PC of the
instruction immediately below the jump
Calculating ‰ If the target address is more than -128
Short Jump to +127 bytes from the address below
Address
the short jump instruction
¾ The assembler will generate an error
stating the jump is out of range

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 Line PC Opcode Mnemonic Operand
LOOP AND 01 0000 ORG 0000
JUMP 02 0000 7800 MOV R0,#0
03 0002 7455 MOV A,#55H
INSTRUCTIONS 04 0004 6003 JZ NEXT
05 0006 08 INC R0
Calculating 06 0007 04
+ AGAIN: INC A
07 0008 04 INC A
Short Jump 08 0009 2477 NEXT: ADD A,#77H
Address 09 000B 5005 JNC OVER
(cont’) 10 000D E4 CLR A
11 000E F8 MOV R0,A
12 000F F9
+ MOV R1,A
13 0010 FA MOV R2,A
14 0011 FB MOV R3,A
15 0012 2B OVER: ADD A,R3
16 0013 50F2 JNC AGAIN
17 0015 80FE + HERE: SJMP HERE
18 0017 END

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 ‰ Call instruction is used to call subroutine
CALL
¾ Subroutines are often used to perform tasks
INSTRUCTIONS that need to be performed frequently
¾ This makes a program more structured in
addition to saving memory space
LCALL (long call)
¾ 3-byte instruction
ƒ First byte is the opcode
ƒ Second and third bytes are used for address of
target subroutine
– Subroutine is located anywhere within 64K
byte address space
ACALL (absolute call)
¾ 2-byte instruction
ƒ 11 bits are used for address within 2K-byte range

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 ‰ When a subroutine is called, control is
CALL
INSTRUCTIONS
transferred to that subroutine, the
processor
LCALL ¾ Saves on the stack the the address of the
instruction immediately below the LCALL
¾ Begins to fetch instructions form the new
location
‰ After finishing execution of the
subroutine
¾ The instruction RET transfers control back
to the caller
ƒ Every subroutine needs RET as the last
instruction

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 ORG 0
BACK: MOV A,#55H ;load A with 55H
CALL MOV P1,A ;send 55H to port 1
INSTRUCTIONS LCALL
MOV
DELAY
A,#0AAH
;time
;load
delay
A with AA (in hex)
MOV P1,A ;send AAH to port 1
LCALL LCALL
SJMP
DELAY
BACK ;keep doing this indefinitely
(cont’) Upon executing “LCALL DELAY”,
the address of instruction below it,
The counter R5 is set to “MOV A,#0AAH” is pushed onto
FFH; so loop is repeated stack, and the 8051 starts to execute
255 times.
at 300H.
;---------- this is delay subroutine ------------
ORG 300H ;put DELAY at address 300H
DELAY: MOV R5,#0FFH ;R5=255 (FF in hex), counter
AGAIN: DJNZ R5,AGAIN ;stay here until R5 become 0
RET ;return to caller (when R5 =0)
END ;end of asm file
When R5 becomes 0, control falls to the
The amount of time delay depends RET which pops the address from the stack
on the frequency of the 8051 into the PC and resumes executing the
instructions after the CALL.
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 001 0000 ORG 0
002 0000 7455 BACK: MOV A,#55H ;load A with 55H
CALL 003 0002 F590 MOV P1,A ;send 55H to p1
INSTRUCTIONS 004
005
0004
0007
120300
74AA
LCALL DELAY
MOV A,#0AAH
;time
;load
delay
A with AAH
006 0009 F590 MOV P1,A ;send AAH to p1
CALL 007
008
000B
000E
120300
80F0
LCALL DELAY
SJMP BACK ;keep doing this
Instruction and 009 0010
Stack 010
011
0010
0300
;-------this is the delay subroutine------
ORG 300H
012 0300 DELAY:
013 0300 7DFF MOV R5,#0FFH ;R5=255
014 0302 DDFE AGAIN: DJNZ R5,AGAIN ;stay here
015 0304 22 RET ;return to caller
016 0305 END ;end of asm file

Stack frame after the first LCALL

0A
09 00 Low byte goes first
and high byte is last
08 07
SP = 09
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 01 0000 ORG 0
02 0000 7455 BACK: MOV A,#55H ;load A with 55H
03 0002 F590 MOV P1,A ;send 55H to p1
CALL 04 0004 7C99 MOV R4,#99H
05 0006 7D67 MOV R5,#67H
INSTRUCTIONS 06 0008 120300 LCALL DELAY ;time delay
07 000B 74AA MOV A,#0AAH ;load A with AA
08 000D F590 MOV P1,A ;send AAH to p1
Use PUSH/POP 09 000F 120300 LCALL DELAY
in Subroutine
10 0012 80EC SJMP BACK ;keeping doing
this
11 0014 ;-------this is the delay subroutine------
12 0300 ORG 300H
13 0300 C004 DELAY: PUSH 4 ;push R4
14 0302 C005 PUSH 5 ;push R5
Normally, the 15 0304 7CFF MOV R4,#0FFH;R4=FFH
number of PUSH 16 0306 7DFF NEXT: MOV R5,#0FFH;R5=FFH
and POP 17 0308 DDFE AGAIN: DJNZ R5,AGAIN
instructions must 18 030A DCFA DJNZ R4,NEXT
19 030C D005 POP 5 ;POP into R5
always match in any
20 030E D004 POP 4 ;POP into R4
called subroutine 21 0310 22 RET ;return to caller
22 0311 After first LCALL After PUSH 4
END After of
;end PUSH 5 file
asm
0B 0B 0B 67 R5
0A 0A 99 R4 0A 99 R4
09 00 PCH 09 00 PCH 09 00 PCH
Department08of Computer
0B PCLScience
08 and 0B Information
PCL 08 Engineering
0B PCL
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 ;MAIN program calling subroutines
ORG 0
CALL MAIN: LCALL SUBR_1 It is common to have one
INSTRUCTIONS LCALL
LCALL
SUBR_2
SUBR_3
main program and many
subroutines that are called
from the main program
Calling
HERE: SJMP HERE
;-----------end of MAIN
Subroutines SUBR_1: ...
... This allows you to make
RET each subroutine into a
;-----------end of subroutine1 separate module
- Each module can be
SUBR_2: ...
... tested separately and then
RET brought together with
;-----------end of subroutine2 main program
- In a large program, the
SUBR_3: ... module can be assigned to
... different programmers
RET
;-----------end of subroutine3
END ;end of the asm file

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 ‰ The only difference between ACALL
CALL
and LCALL is
INSTRUCTIONS
¾ The target address for LCALL can be
ACALL anywhere within the 64K byte address
¾ The target address of ACALL must be
within a 2K-byte range
‰ The use of ACALL instead of LCALL
can save a number of bytes of
program ROM space

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 ORG 0
CALL BACK: MOV
MOV
A,#55H
P1,A
;load
;send
A with
55H to
55H
port 1
INSTRUCTIONS LCALL DELAY ;time delay
MOV A,#0AAH ;load A with AA (in hex)
MOV P1,A ;send AAH to port 1
ACALL LCALL DELAY
(cont’) SJMP BACK ;keep doing this indefinitely
...
END ;end of asm file

A rewritten program which is more efficiently

ORG 0
MOV A,#55H ;load A with 55H
BACK: MOV P1,A ;send 55H to port 1
ACALL DELAY ;time delay
CPL A ;complement reg A
SJMP BACK ;keep doing this indefinitely
...
END ;end of asm file

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 I/O PORT
PROGRAMMING

The 8051 Microcontroller and Embedded

Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young
楊中平

Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering
National Cheng Kung University, TAIWAN
 Provides
+5V supply
I/O voltage to
PROGRAMMING 8051 Pin Diagram the chip
P1.0 1 40 Vcc
A total of 32 P1.1 2 39 P0.0 (AD0)
pins are set P1.2 3 38 P0.1 (AD1)
P1.3 4 37 P0.2 (AD2)
aside for the P1 P1.4 5 36 P0.3 (AD3)
four ports P0, P1.5 6 35 P0.4 (AD4) P0
P1.6 7 34 P0.5 (AD5)
P1, P2, P3, P1.7 8 8051 33 P0.6 (AD6)
where each RST 9 32 P0.7 (AD7)
port takes 8 (RXD) P3.0 10
(8031) 31 -EA/VPP
(TXD) P3.1 30 ALE/PROG
pins (-INT0) P3.2
11
12
(89420) 29 -PSEN
(-INT1) P3.3 13 28 P2.7 (A15)
P3 (T0) P3.4 14 27 P2.6 (A14)
(T1) P3.5 15 26 P2.5 (A13)
(-WR) P3.6 16 25 P2.4 (A12)
(-RD )P3.7 17 24 P2.3 (A11) P2
XTAL2 18 23 P2.2 (A10)
XTAL1 19 22 P2.1 (A9)
GND 20 21 P2.0 (A8)
Grond

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HANEL National Cheng Kung University, TAIWAN 2
 ‰ The four 8-bit I/O ports P0, P1, P2 and
I/O
PROGRAMMING
P3 each uses 8 pins
‰ All the ports upon RESET are
I/O Port Pins configured as input, ready to be used
as input ports
¾ When the first 0 is written to a port, it
becomes an output
P1.0
P1.1
1
2
40
39
Vcc
P0.0(AD0)
¾ To reconfigure it as an input, a 1 must be
sent to the port
P1.2 3 38 P0.1(AD1)
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6
P1.7
7
8
34
33
32
P0.5(AD5)
P0.6(AD6) ƒ To use any of these ports as an input port, it
RST 9 P0.7(AD7)
(RXD)P3.0
(TXD)P3.1
10
8051 31
11(8031)30
-EA/VPP
ALE/PROG must be programmed
(INT0)P3.2 12 29 -PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ It can be used for input or output,
I/O
PROGRAMMING
each pin must be connected externally
to a 10K ohm pull-up resistor
Port 0 ¾ This is due to the fact that P0 is an open
drain, unlike P1, P2, and P3
ƒ Open drain is a term used for MOS chips in the
same way that open collector is used for TTL
chips
Vcc
P1.0
P1.1
1
2
40
39
Vcc
P0.0(AD0) 10 K
P1.2
P1.3
3
4
38
37
P0.1(AD1)
P0.2(AD2) P0.X
P1.4 5 36 P0.3(AD3) P0.0
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5) P0.1
33 P0.6(AD6)

Port 0
P1.7 8 P0.2
RST 9 32
8051 31 P0.7(AD7) 8051
(RXD)P3.0 10 -EA/VPP P0.3
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2 12 29 -PSEN P0.4
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14) P0.5
(T1)P3.5 15 26 P2.5(A13) P0.6
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11) P0.7
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 The following code will continuously send out to port 0 the
I/O alternating value 55H and AAH
PROGRAMMING BACK: MOV A,#55H
MOV P0,A
Port 0 ACALL DELAY
(cont’) MOV A,#0AAH
MOV P0,A
ACALL DELAY
SJMP BACK

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2 12 29 -PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ In order to make port 0 an input, the
I/O port must be programmed by writing 1
PROGRAMMING
to all the bits
Port 0 as Input Port 0 is configured first as an input port by writing 1s to it, and then
data is received from that port and sent to P1
MOV A,#0FFH ;A=FF hex
MOV P0,A ;make P0 an i/p port
;by writing it all 1s
BACK: MOV A,P0 ;get data from P0
P1.0 1 40 Vcc
P1.1
P1.2
2
3
39
38
P0.0(AD0)
P0.1(AD1)
MOV P1,A ;send it to port 1
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3) SJMP BACK ;keep doing it
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2 12 29 -PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ Port 0 is also designated as AD0-AD7,
I/O
PROGRAMMING
allowing it to be used for both address
and data
Dual Role of ¾ When connecting an 8051/31 to an
Port 0 external memory, port 0 provides both
address and data

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2 12 29 -PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ Port 1 can be used as input or output
I/O
PROGRAMMING ¾ In contrast to port 0, this port does not
need any pull-up resistors since it already
Port 1 has pull-up resistors internally
¾ Upon reset, port 1 is configured as an
input port
The following code will continuously send out to port 0 the
alternating value 55H and AAH
P1.0 1 40 Vcc
P1.1
P1.2
2
3
39
38
P0.0(AD0)
P0.1(AD1)
MOV A,#55H
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3) BACK: MOV P1,A
P1.5 6 35 P0.4(AD4)
P1.6
P1.7
7
8
34
33
P0.5(AD5)
P0.6(AD6)
ACALL DELAY
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP CPL A
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2
(INT1)P3.3
12
13
29
28
-PSEN
P2.7(A15)
SJMP BACK
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ To make port 1 an input port, it must
I/O
PROGRAMMING
be programmed as such by writing 1
to all its bits
Port 1 as Input Port 1 is configured first as an input port by writing 1s to it, then data
is received from that port and saved in R7 and R5
MOV A,#0FFH ;A=FF hex
MOV P1,A ;make P1 an input port
;by writing it all 1s
MOV A,P1 ;get data from P1
P1.0 1 40 Vcc
P1.1 2
3
39
38
P0.0(AD0)
P0.1(AD1)
MOV R7,A ;save it to in reg R7
P1.2
4 37 P0.2(AD2)
P1.3
P1.4 5 36 P0.3(AD3) ACALL DELAY ;wait
P1.5 6 35 P0.4(AD4)
P1.6
P1.7
7
8
34
33
P0.5(AD5)
P0.6(AD6)
MOV A,P1 ;another data from P1
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP MOV R5,A ;save it to in reg R5
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2 12 29 -PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ Port 2 can be used as input or output
I/O
PROGRAMMING ¾ Just like P1, port 2 does not need any pull-
up resistors since it already has pull-up
Port 2 resistors internally
¾ Upon reset, port 2 is configured as an input
port

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2 12 29 -PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ To make port 2 an input port, it must
I/O
PROGRAMMING
be programmed as such by writing 1 to
all its bits
Port 2 as Input ‰ In many 8051-based system, P2 is used
or Dual Role as simple I/O
‰ In 8031-based systems, port 2 must be
used along with P0 to provide the 16-
P1.0
P1.1
P1.2
1
2
3
40
39
38
Vcc
P0.0(AD0)
P0.1(AD1)
bit address for the external memory
P1.3 4 37 P0.2(AD2)
P1.4
P1.5
P1.6
5
6
7
36
35
34
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
¾ Port 2 is also designated as A8 – A15,
indicating its dual function
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP
(TXD)P3.1 11(8031)30 ALE/PROG

Port 0 provides the lower 8 bits via A0 – A7

(INT0)P3.2 12 29 -PSEN
(INT1)P3.3
(T0)P3.4
13
14
28
27
P2.7(A15)
P2.6(A14) ¾
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ Port 3 can be used as input or output
I/O
PROGRAMMING ¾ Port 3 does not need any pull-up resistors
¾ Port 3 is configured as an input port upon
Port 3 reset, this is not the way it is most
commonly used

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3 4 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2 12 29 -PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)

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 ‰ Port 3 has the additional function of
I/O
PROGRAMMING
providing some extremely important
signals
Port 3 P3 Bit Function Pin
Serial
(cont’) P3.0 RxD 10 communications
P3.1 TxD 11
External
P3.2 INT0 12 interrupts
P3.3 INT1 13
P1.0 1
2
40
39
Vcc
P0.0(AD0) P3.4 T0 14 Timers
P1.1
P1.2 3 38 P0.1(AD1)
37
P3.5 T1 15
P1.3 4 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5) Read/Write signals
P1.7
RST
8
9
33
32
8051 31
P0.6(AD6)
P0.7(AD7) P3.6 WR 16 of external memories
(RXD)P3.0 10 -EA/VPP
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
11(8031)30
12 29
28
ALE/PROG
-PSEN
P2.7(A15)
P3.7 RD 17
13
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5
(WR)P3.6
15
16
26
25
P2.5(A13)
P2.4(A12) In systems based on 8751, 89C51 or
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10) DS89C4x0, pins 3.6 and 3.7 are used for I/O
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8) while the rest of the pins in port 3 are
normally used in the alternate function role
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 Write a program for the DS89C420 to toggle all the bits of P0, P1,
and P2 every 1/4 of a second
I/O ORG 0
PROGRAMMING BACK: MOV A,#55H
MOV P0,A
MOV P1,A
Port 3 MOV P2,A
ACALL QSDELAY ;Quarter of a second
(cont’) MOV A,#0AAH
MOV P0,A
MOV P1,A
MOV P2,A
ACALL QSDELAY
P1.0 1 40 Vcc SJMP BACK
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1) QSDELAY: Delay
P1.3 4 37 P0.2(AD2)
P1.4
P1.5
5
6
36
35
P0.3(AD3)
P0.4(AD4)
MOV R5,#11 = 11 × 248 × 255 × 4 MC × 90 ns
P1.6
P1.7
7
8
34
33
P0.5(AD5)
P0.6(AD6)
H3: MOV R4,#248 = 250,430 µs
RST 9 32 P0.7(AD7)
(RXD)P3.0 10
8051 31 -EA/VPP H2: MOV R3,#255
(TXD)P3.1 11(8031)30 ALE/PROG
(INT0)P3.2
(INT1)P3.3
12 29
28
-PSEN
P2.7(A15)
H1: DJNZ R3,H1 ;4 MC for DS89C4x0
13
(T0)P3.4
(T1)P3.5
14
15
27
26
P2.6(A14)
P2.5(A13)
DJNZ R4,H2
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11) DJNZ R5,H3
XTAL2 18 23 P2.2(A10)
XTAL1
GND
19
20
22
21
P2.1(A9)
P2.0(A8)
RET
END
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 The entire 8 bits of Port 1 are accessed
BACK: MOV A,#55H
I/O MOV P1,A
PROGRAMMING ACALL
MOV
DELAY
A,#0AAH
MOV P1,A
Different ways ACALL
SJMP
DELAY
BACK
of Accessing
Entire 8 Bits Rewrite the code in a more efficient manner by accessing the port
directly without going through the accumulator
BACK: MOV P1,#55H
ACALL DELAY
MOV P1,#0AAH
ACALL DELAY
SJMP BACK

Another way of doing the same thing

MOV A,#55H
BACK: MOV P1,A
ACALL DELAY
CPL A
SJMP BACK
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 ‰ Sometimes we need to access only 1
I/O BIT
MANIPULATION
or 2 bits of the port
PROGRAMMING BACK: CPL
ACALL
P1.2
DELAY
;complement P1.2

SJMP BACK
I/O Ports
and Bit ;another variation of the above program
AGAIN: SETB P1.2 ;set only P1.2
Addressability ACALL DELAY
CLR P1.2 ;clear only P1.2
ACALL DELAY
SJMP AGAIN P0 P1 P2 P3 Port Bit
P0.0 P1.0 P2.0 P3.0 D0
P0.1 P1.1 P2.1 P3.1 D1
P0.2 P1.2 P2.2 P3.2 D2
P0.3 P1.3 P2.3 P3.3 D3
P0.4 P1.4 P2.4 P3.4 D4
P0.5 P1.5 P2.5 P3.5 D5
P0.6 P1.6 P2.6 P3.6 D6
P0.7 P1.7 P2.7 P3.7 D7

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 Example 4-2
Write the following programs.
I/O BIT Create a square wave of 50% duty cycle on bit 0 of port 1.
MANIPULATION Solution:
PROGRAMMING The 50% duty cycle means that the “on” and “off” state (or the high
and low portion of the pulse) have the same length. Therefore,
I/O Ports we toggle P1.0 with a time delay in between each state.
and Bit HERE: SETB P1.0 ;set to high bit 0 of port 1
LCALL DELAY ;call the delay subroutine
Addressability CLR P1.0 ;P1.0=0
(cont’) LCALL DELAY
SJMP HERE ;keep doing it
Another way to write the above program is:
HERE: CPL P1.0 ;set to high bit 0 of port 1
LCALL DELAY ;call the delay subroutine
SJMP HERE ;keep doing it
8051

P1.0

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 ‰ Instructions that are used for signal-bit
I/O BIT
operations are as following
MANIPULATION
PROGRAMMING Single-Bit Instructions
Instruction Function
I/O Ports SETB bit Set the bit (bit = 1)
and Bit CLR bit Clear the bit (bit = 0)
Addressability CPL bit Complement the bit (bit = NOT bit)
(cont’) JB bit, target Jump to target if bit = 1 (jump if bit)
JNB bit, target Jump to target if bit = 0 (jump if no bit)
JBC bit, target Jump to target if bit = 1, clear bit
(jump if bit, then clear)

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 ‰ The JNB and JB instructions are widely
I/O BIT used single-bit operations
MANIPULATION ¾ They allow you to monitor a bit and make
PROGRAMMING a decision depending on whether it’s 0 or 1
¾ These two instructions can be used for any
Checking an bits of I/O ports 0, 1, 2, and 3
Input Bit ƒ Port 3 is typically not used for any I/O, either
single-bit or byte-wise

Instructions for Reading an Input Port

Mnemonic Examples Description

MOV A,PX MOV A,P2 Bring into A the data at P2 pins
JNB PX.Y, .. JNB P2.1,TARGET Jump if pin P2.1 is low
JB PX.Y, .. JB P1.3,TARGET Jump if pin P1.3 is high
MOV C,PX.Y MOV C,P2.4 Copy status of pin P2.4 to CY

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 Example 4-3
I/O BIT
Write a program to perform the following:
MANIPULATION (a) Keep monitoring the P1.2 bit until it becomes high
PROGRAMMING (b) When P1.2 becomes high, write value 45H to port 0
(c) Send a high-to-low (H-to-L) pulse to P2.3
Solution:
Checking an SETB P1.2 ;make P1.2 an input
Input Bit MOV A,#45H ;A=45H
(cont’) AGAIN: JNB P1.2,AGAIN ; get out when P1.2=1
MOV P0,A ;issue A to P0
SETB P2.3 ;make P2.3 high
CLR P2.3 ;make P2.3 low for H-to-L

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 Example 4-4
I/O BIT
Assume that bit P2.3 is an input and represents the condition of an
MANIPULATION oven. If it goes high, it means that the oven is hot. Monitor the bit
PROGRAMMING continuously. Whenever it goes high, send a high-to-low pulse to port
P1.5 to turn on a buzzer.
Solution:
Checking an
HERE: JNB P2.3,HERE ;keep monitoring for high
Input Bit SETB P1.5 ;set bit P1.5=1
(cont’) CLR P1.5 ;make high-to-low
SJMP HERE ;keep repeating

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 Example 4-5
I/O BIT
A switch is connected to pin P1.7. Write a program to check the status
MANIPULATION of SW and perform the following:
PROGRAMMING (a) If SW=0, send letter ‘N’ to P2
(b) If SW=1, send letter ‘Y’ to P2

Checking an Solution:
Input Bit
SETB P1.7 ;make P1.7 an input
AGAIN: JB P1.2,OVER ;jump if P1.7=1
(cont’)
MOV P2,#’N’ ;SW=0, issue ‘N’ to P2
SJMP AGAIN ;keep monitoring
OVER: MOV P2,#’Y’ ;SW=1, issue ‘Y’ to P2
SJMP AGAIN ;keep monitoring

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 Example 4-6
I/O BIT
A switch is connected to pin P1.7. Write a program to check the status
MANIPULATION of SW and perform the following:
PROGRAMMING (a) If SW=0, send letter ‘N’ to P2
(b) If SW=1, send letter ‘Y’ to P2
Use the carry flag to check the switch status.
Reading Single Solution:
Bit into Carry SETB P1.7 ;make P1.7 an input
Flag AGAIN: MOV C,P1.2 ;read SW status into CF
JC OVER ;jump if SW=1
MOV P2,#’N’ ;SW=0, issue ‘N’ to P2
SJMP AGAIN ;keep monitoring
OVER: MOV P2,#’Y’ ;SW=1, issue ‘Y’ to P2
SJMP AGAIN ;keep monitoring

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 Example 4-7
I/O BIT
A switch is connected to pin P1.0 and an LED to pin P2.7. Write a
MANIPULATION program to get the status of the switch and send it to the LED
PROGRAMMING
Solution:
SETB P1.7 ;make P1.7 an input
Reading Single AGAIN: MOV C,P1.0 ;read SW status into CF
Bit into Carry MOV P2.7,C ;send SW status to LED
Flag SJMP AGAIN ;keep repeating
(cont’)

The instruction
‘MOV
P2.7,P1.0’ is
wrong , since such
However ‘MOV an instruction does
P2,P1’ is a valid not exist
instruction

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 ‰ In reading a port
I/O BIT ¾ Some instructions read the status of port
MANIPULATION pins
PROGRAMMING ¾ Others read the status of an internal port
latch
Reading Input ‰ Therefore, when reading ports there
Pins vs. Port are two possibilities:
Latch ¾ Read the status of the input pin
¾ Read the internal latch of the output port
‰ Confusion between them is a major
source of errors in 8051 programming
¾ Especially where external hardware is
concerned

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 ‰ Some instructions read the contents of
READING
INPUT PINS VS.
an internal port latch instead of
PORT LATCH reading the status of an external pin
¾ For example, look at the ANL P1,A
Reading Latch instruction and the sequence of actions is
for Output Port executed as follow
1. It reads the internal latch of the port and
brings that data into the CPU
2. This data is ANDed with the contents of
register A
3. The result is rewritten back to the port latch
4. The port pin data is changed and now has the
same value as port latch

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 ‰ Read-Modify-Write
READING
¾ The instructions read the port latch
INPUT PINS VS.
normally read a value, perform an
PORT LATCH operation then rewrite it back to the port
latch
Reading Latch Instructions Reading a latch (Read-Modify-Write)
for Output Port Mnemonics Example
(cont’) ANL PX ANL P1,A
ORL PX ORL P2,A
XRL PX XRL P0,A
JBC PX.Y,TARGET JBC P1.1,TARGET
CPL PX.Y CPL P1.2
INC PX INC P1
DEC PX DEC P2
DJNZ PX.Y,TARGET DJNZ P1,TARGET
MOV PX.Y,C MOV P1.2,C
CLR PX.Y CLR P2.3 Note: x is 0, 1, 2,
SETB PX.Y SETB P2.3 or 3 for P0 – P3

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 ‰ The ports in 8051 can be accessed by
I/O BIT
MANIPULATION the Read-modify-write technique
PROGRAMMING ¾ This feature saves many lines of code by
combining in a single instruction all three
Read-modify- actions
write Feature 1. Reading the port
2. Modifying it
3. Writing to the port
MOV P1,#55H ;P1=01010101
AGAIN: XRL P1,#0FFH ;EX-OR P1 with 1111 1111
ACALL DELAY
SJMP BACK

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 ADDRESSING MODES

The 8051 Microcontroller and Embedded

Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young
楊中平

Home Automation, Networking, and Entertainment Lab

Dept. of Computer Science and Information Engineering
National Cheng Kung University, TAIWAN
 ‰ The CPU can access data in various
ADDRESSING
MODES
ways, which are called addressing
modes
¾ Immediate
¾ Register
¾ Direct Accessing
memories
¾ Register indirect
¾ Indexed

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 ‰ The source operand is a constant
IMMEDIATE
ADDRESSING ¾ The immediate data must be preceded by
MODE the pound sign, “#”
¾ Can load information into any registers,
including 16-bit DPTR register
ƒ DPTR can also be accessed as two 8-bit
registers, the high byte DPH and low byte DPL

MOV A,#25H ;load 25H into A

MOV R4,#62 ;load 62 into R4
MOV B,#40H ;load 40H into B
MOV DPTR,#4521H ;DPTR=4512H
MOV DPL,#21H ;This is the same
MOV DPH,#45H ;as above
;illegal!! Value > 65535 (FFFFH)
MOV DPTR,#68975

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 ‰ We can use EQU directive to access
IMMEDIATE
ADDRESSING
immediate data
MODE Count EQU 30
... ...
(cont’) MOV R4,#COUNT ;R4=1EH
MOV DPTR,#MYDATA ;DPTR=200H

ORG 200H
MYDATA: DB “America”

‰ We can also use immediate addressing

mode to send data to 8051 ports
MOV P1,#55H

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 ‰ Use registers to hold the data to be
REGISTER manipulated
ADDRESSING MOV A,R0 ;copy contents of R0 into A
MODE
MOV R2,A ;copy contents of A into R2
ADD A,R5 ;add contents of R5 to A
ADD A,R7 ;add contents of R7 to A
MOV R6,A ;save accumulator in R6

‰ The source and destination registers

must match in size
¾ MOV DPTR,A will give an error
MOV DPTR,#25F5H
MOV R7,DPL
MOV R6,DPH

‰ The movement of data between Rn

registers is not allowed
¾ MOV R4,R7 is invalid
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 ‰ It is most often used the direct
ACCESSING
MEMORY
addressing mode to access RAM
locations 30 – 7FH
Direct ¾ The entire 128 bytes of RAM can be
Addressing accessed Direct addressing mode
Mode ¾ The register bank locations are accessed
by the register names
MOV A,4 ;is same as
MOV A,R4 ;which means copy R4 into A

‰ Contrast this with immediate

addressing mode Register addressing mode

¾ There is no “#” sign in the operand

MOV R0,40H ;save content of 40H in R0
MOV 56H,A ;save content of A in 56H
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 ‰ The SFR (Special Function Register)
ACCESSING
MEMORY
can be accessed by their names or by
their addresses
SFR Registers MOV 0E0H,#55H ;is the same as
and Their MOV A,#55h ;load 55H into A
Addresses MOV 0F0H,R0 ;is the same as
MOV B,R0 ;copy R0 into B

‰ The SFR registers have addresses

between 80H and FFH
¾ Not all the address space of 80 to FF is
used by SFR
¾ The unused locations 80H to FFH are
reserved and must not be used by the
8051 programmer
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 Special Function Register (SFR) Addresses
Symbol Name Address
ACCESSING ACC* Accumulator 0E0H
MEMORY B* B register 0F0H
PSW* Program status word 0D0H
SFR Registers SP Stack pointer 81H

and Their DPTR Data pointer 2 bytes

Addresses DPL Low byte 82H

(cont’) DPH High byte 83H

P0* Port 0 80H
P1* Port 1 90H
P2* Port 2 0A0H
P3* Port 3 0B0H
IP* Interrupt priority control 0B8H
IE* Interrupt enable control 0A8H
… … …

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 Special Function Register (SFR) Addresses
Symbol Name Address
ACCESSING TMOD Timer/counter mode control 89H
MEMORY TCON* Timer/counter control 88H

T2CON* Timer/counter 2 control 0C8H

SFR Registers T2MOD Timer/counter mode control OC9H
and Their TH0 Timer/counter 0 high byte 8CH
Addresses TL0 Timer/counter 0 low byte 8AH
(cont’) TH1 Timer/counter 1 high byte 8DH
TL1 Timer/counter 1 low byte 8BH
TH2 Timer/counter 2 high byte 0CDH
TL2 Timer/counter 2 low byte 0CCH
RCAP2H T/C 2 capture register high byte 0CBH
RCAP2L T/C 2 capture register low byte 0CAH
SCON* Serial control 98H
SBUF Serial data buffer 99H
PCON Power ontrol 87H

* Bit addressable
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 Example 5-1
ACCESSING
MEMORY Write code to send 55H to ports P1 and P2, using
(a) their names (b) their addresses

SFR Registers Solution :

(a) MOV A,#55H ;A=55H
and Their
MOV P1,A ;P1=55H
Addresses MOV P2,A ;P2=55H
(cont’)
(b) From Table 5-1, P1 address=80H; P2 address=A0H
MOV A,#55H ;A=55H
MOV 80H,A ;P1=55H
MOV 0A0H,A ;P2=55H

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 ‰ Only direct addressing mode is allowed
ACCESSING
MEMORY
for pushing or popping the stack
¾ PUSH A is invalid
Stack and ¾ Pushing the accumulator onto the stack
Direct must be coded as PUSH 0E0H
Addressing Example 5-2
Mode Show the code to push R5 and A onto the stack and then pop them
back them into R2 and B, where B = A and R2 = R5

Solution:
PUSH 05 ;push R5 onto stack
PUSH 0E0H ;push register A onto stack
POP 0F0H ;pop top of stack into B
;now register B = register A
POP 02 ;pop top of stack into R2
;now R2=R6

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 ‰ A register is used as a pointer to the
ACCESSING
MEMORY
data
¾ Only register R0 and R1 are used for this
Register purpose
Indirect ¾ R2 – R7 cannot be used to hold the
Addressing address of an operand located in RAM
Mode ‰ When R0 and R1 hold the addresses of
RAM locations, they must be preceded
by the “@” sign
MOV A,@R0 ;move contents of RAM whose
;address is held by R0 into A
MOV @R1,B ;move contents of B into RAM
;whose address is held by R1

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 Example 5-3
Write a program to copy the value 55H into RAM memory locations
ACCESSING 40H to 41H using
MEMORY (a) direct addressing mode, (b) register indirect addressing mode
without a loop, and (c) with a loop

Register Solution:
(a)
Indirect MOV A,#55H ;load A with value 55H
MOV 40H,A ;copy A to RAM location 40H
Addressing MOV 41H.A ;copy A to RAM location 41H
Mode (b)
MOV A,#55H ;load A with value 55H
(cont’) MOV R0,#40H ;load the pointer. R0=40H
MOV @R0,A ;copy A to RAM R0 points to
INC R0 ;increment pointer. Now R0=41h
MOV @R0,A ;copy A to RAM R0 points to
(c)
MOV A,#55H ;A=55H
MOV R0,#40H ;load pointer.R0=40H,
MOV R2,#02 ;load counter, R2=3
AGAIN: MOV @R0,A ;copy 55 to RAM R0 points to
INC R0 ;increment R0 pointer
DJNZ R2,AGAIN ;loop until counter = zero

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 ‰ The advantage is that it makes
ACCESSING
MEMORY
accessing data dynamic rather than
static as in direct addressing mode
Register ¾ Looping is not possible in direct
Indirect addressing mode
Addressing Example 5-4
Mode Write a program to clear 16 RAM locations starting at RAM address
(cont’) 60H
Solution:
CLR A ;A=0
MOV R1,#60H ;load pointer. R1=60H
MOV R7,#16 ;load counter, R7=16
AGAIN: MOV @R1,A ;clear RAM R1 points to
INC R1 ;increment R1 pointer
DJNZ R7,AGAIN ;loop until counter=zero

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 Example 5-5
ACCESSING
MEMORY Write a program to copy a block of 10 bytes of data from 35H to 60H
Solution:
Register MOV R0,#35H ;source pointer
Indirect MOV R1,#60H ;destination pointer
MOV R3,#10 ;counter
Addressing BACK: MOV A,@R0 ;get a byte from source
Mode MOV @R1,A ;copy it to destination
(cont’) INC R0 ;increment source pointer
INC R1 ;increment destination pointer
DJNZ R3,BACK ;keep doing for ten bytes

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 ‰ R0 and R1 are the only registers that
ACCESSING
MEMORY
can be used for pointers in register
indirect addressing mode
Register ‰ Since R0 and R1 are 8 bits wide, their
Indirect use is limited to access any
Addressing
information in the internal RAM
Mode
(cont’) ‰ Whether accessing externally
connected RAM or on-chip ROM, we
need 16-bit pointer
¾ In such case, the DPTR register is used

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 ‰ Indexed addressing mode is widely
ACCESSING
MEMORY
used in accessing data elements of
look-up table entries located in the
Indexed program ROM
Addressing ‰ The instruction used for this purpose is
Mode and MOVC A,@A+DPTR
On-chip ROM
¾ Use instruction MOVC, “C” means code
Access
¾ The contents of A are added to the 16-bit
register DPTR to form the 16-bit address
of the needed data

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 Example 5-6

ACCESSING In this program, assume that the word “USA” is burned into ROM
locations starting at 200H. And that the program is burned into ROM
MEMORY locations starting at 0. Analyze how the program works and state
where “USA” is stored after this program is run.
Indexed Solution:
AddressingA=0
ORG
0000H ;burn into ROM starting at 0
DPTR=200H, MOV
DPTR,#200H ;DPTR=200H look-up table addr
Mode and On-
DPTR=200H, A=55H
CLR
A
MOVC
;clear A(A=0)
A,@A+DPTR ;get the char from code space
chip ROM
DPTR=201H, A=55H
MOV
R0,A
INC
DPTR
;save it in R0
;DPTR=201 point to next char
Access CLR
A ;clear A(A=0)
MOVC A,@A+DPTR ;get the next char R0=55H
(cont’)
DPTR=201H, A=0
MOV R1,A ;save it in R1
DPTR=201H, A=53H INC DPTR ;DPTR=202 point to next char
CLR A ;clear A(A=0)
DPTR=202H, A=53H MOVC A,@A+DPTR ;get the next char R1=53H
MOV R2,A ;save it in R2
Here: SJMP HERE ;stay here
;Data is burned into code space starting at 200H
202 A
201 S ORG 200H R2=41H
MYDATA:DB “USA”
200 U END ;end of program
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 ‰ The look-up table allows access to
ACCESSING
elements of a frequently used table
MEMORY
with minimum operations
Look-up Table Example 5-8
Write a program to get the x value from P1 and send x2 to P2,
(cont’)
continuously
Solution:
ORG 0
MOV DPTR,#300H ;LOAD TABLE ADDRESS
MOV A,#0FFH ;A=FF
MOV P1,A ;CONFIGURE P1 INPUT PORT
BACK:MOV A,P1 ;GET X
MOV A,@A+DPTR ;GET X SQAURE FROM TABLE
MOV P2,A ;ISSUE IT TO P2
SJMP BACK ;KEEP DOING IT
ORG 300H
XSQR_TABLE:
DB 0,1,4,9,16,25,36,49,64,81
END

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 ‰ In many applications, the size of
ACCESSING program code does not leave any
MEMORY room to share the 64K-byte code
space with data
Indexed
¾ The 8051 has another 64K bytes of
Addressing
memory space set aside exclusively for
Mode and data storage
MOVX ƒ This data memory space is referred to as
external memory and it is accessed only by the
MOVX instruction
‰ The 8051 has a total of 128K bytes of
memory space
¾ 64K bytes of code and 64K bytes of data
¾ The data space cannot be shared between
code and data
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 ‰ In many applications we use RAM
ACCESSING
MEMORY
locations 30 – 7FH as scratch pad
¾ We use R0 – R7 of bank 0
RAM Locations ¾ Leave addresses 8 – 1FH for stack usage
30 – 7FH as ¾ If we need more registers, we simply use
Scratch Pad RAM locations 30 – 7FH
Example 5-10
Write a program to toggle P1 a total of 200 times. Use RAM
location 32H to hold your counter value instead of registers R0 –
R7
Solution:
MOV P1,#55H ;P1=55H
MOV 32H,#200 ;load counter value
;into RAM loc 32H
LOP1: CPL P1 ;toggle P1
ACALL DELAY
DJNZ 32H,LOP1 ;repeat 200 times
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 ‰ Many microprocessors allow program
BIT to access registers and I/O ports in
ADDRESSES byte size only
¾ However, in many applications we need to
check a single bit
‰ One unique and powerful feature of
the 8051 is single-bit operation
¾ Single-bit instructions allow the
programmer to set, clear, move, and
complement individual bits of a port,
memory, or register
¾ It is registers, RAM, and I/O ports that
need to be bit-addressable
ƒ ROM, holding program code for execution, is
not bit-addressable

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 ‰ The bit-addressable RAM location are
BIT 20H to 2FH
ADDRESSES ¾ These 16 bytes provide 128 bits of RAM
bit-addressability, since 16 × 8 = 128
Bit- ƒ 0 to 127 (in decimal) or 00 to 7FH
Addressable ¾ The first byte of internal RAM location 20H
RAM has bit address 0 to 7H
¾ The last byte of 2FH has bit address 78H
to 7FH
‰ Internal RAM locations 20-2FH are
both byte-addressable and bit-
addressable
¾ Bit address 00-7FH belong to RAM byte
addresses 20-2FH
¾ Bit address 80-F7H belong to SFR P0,
P1, …

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 7F

General purpose RAM

30

BIT 2F
2E
7F
77
7E
76
7D
75
7C
74
7B
73
7A
72
79
71
78
70
ADDRESSES 2D 6F 6E 6D 6C 6B 6A 69 68
2C 67 66 65 64 63 62 61 60

Bit-addressable 2B 5F 5E 5D 5C 5B 5A 59 58
Bit- locations 2A 57 56 55 54 53 52 51 50

Addressable 29
28
4F
47
4E
46
4D
45
4C
44
4B
43
4A
42
49
41
48
40
RAM 27 3F 3E 3D 3C 3B 3A 39 38

(cont’) Byte address 26 37 36 35 34 33 32 31 30

25 2F 2E 2D 2C 2B 2A 29 28
24 27 26 25 24 23 22 21 20
23 1F 1E 1D 1C 1B 1A 19 18
22 17 16 15 14 13 12 11 10
21 0F 0E 0D 0C 0B 0A 09 08
20 07 06 05 04 03 02 01 00
1F
18
Bank 3
17
10
Bank 2
0F
08
Bank 1
07
00
Default register bank for R0-R7

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 Example 5-11
BIT Find out to which by each of the following bits belongs. Give the
ADDRESSES address of the RAM byte in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH
(d) SETB 28H, (e) CLR 12, (f) SETB 05
Bit- Solution:
D7 D6 D5 D4 D3 D2 D1 D0
2F 7F 7E 7D 7C 7B 7A 79 78
Addressable 2E 77 76 75 74 73 72 71 70

RAM (a) D2 of RAM location 28H 2D 6F 6E 6D 6C 6B 6A 69 68

2C 67 66 65 64 63 62 61 60
(cont’) (b) D7 of RAM location 2CH 2B 5F 5E 5D 5C 5B 5A 59 58
2A 57 56 55 54 53 52 51 50

(c) D7 of RAM location 21H 29 4F 4E 4D 4C 4B 4A 49 48

28 47 46 45 44 43 42 41 40
27 3F 3E 3D 3C 3B 3A 39 38
(d) D0 of RAM location 25H
26 37 36 35 34 33 32 31 30
25 2F 2E 2D 2C 2B 2A 29 28
(e) D4 of RAM location 21H
24 27 26 25 24 23 22 21 20
23 1F 1E 1D 1C 1B 1A 19 18
(f) D5 of RAM location 20H 22 17 16 15 14 13 12 11 10
21 0F 0E 0D 0C 0B 0A 09 08
20 07 06 05 04 03 02 01 00

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 ‰ To avoid confusion regarding the
BIT
ADDRESSES
addresses 00 – 7FH
¾ The 128 bytes of RAM have the byte
Bit- addresses of 00 – 7FH can be accessed in
Addressable byte size using various addressing modes
RAM ƒ Direct and register-indirect
(cont’) ¾ The 16 bytes of RAM locations 20 – 2FH
have bit address of 00 – 7FH
ƒ We can use only the single-bit instructions and
these instructions use only direct addressing
mode

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 ‰ Instructions that are used for signal-bit
BIT
ADDRESSES
operations are as following
Single-Bit Instructions
Bit- Instruction Function
Addressable SETB bit Set the bit (bit = 1)
RAM CLR bit Clear the bit (bit = 0)
(cont’)
CPL bit Complement the bit (bit = NOT bit)
JB bit, target Jump to target if bit = 1 (jump if bit)
JNB bit, target Jump to target if bit = 0 (jump if no bit)
JBC bit, target Jump to target if bit = 1, clear bit
(jump if bit, then clear)

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 ‰ While all of the SFR registers are byte-
BIT addressable, some of them are also bit-
ADDRESSES addressable
¾ The P0 – P3 are bit addressable
I/O Port
Bit Addresses ‰ We can access either the entire 8 bits
or any single bit of I/O ports P0, P1, P2,
and P3 without altering the rest
‰ When accessing a port in a single-bit
manner, we use the syntax SETB X.Y
¾ X is the port number P0, P1, P2, or P3
¾ Y is the desired bit number from 0 to 7 for
data bits D0 to D7
¾ ex. SETB P1.5 sets bit 5 of port 1 high

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 ‰ Notice that when code such as
BIT SETB P1.0 is assembled, it becomes
ADDRESSES SETB 90H
¾ The bit address for I/O ports
I/O Port ƒ P0 are 80H to 87H
Bit Addresses ƒ P1 are 90H to 97H
(cont’) ƒ P2 are A0H to A7H
ƒ P3 are B0H to B7H

Single-Bit Addressability of Ports

P0 P1 P2 P3 Port Bit
P0.0 (80) P1.0 (90) P2.0 (A0) P3.0 (B0) D0
P0.1 P1.1 P2.1 P3.1 D1
P0.2 P1.2 P2.2 P3.2 D2
P0.3 P1.3 P2.3 P3.3 D3
P0.4 P1.4 P2.4 P3.4 D4
P0.5 P1.5 P2.5 P3.5 D5
P0.6 P1.6 P2.6 P3.6 D6
P0.7 (87) P1.7 (97) P2.7 (A7) P3.7 (B7) D7

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 Bit addresses 80 – F7H
SFR RAM Address (Byte and Bit) belong to SFR of P0,
BIT Byte Byte
TCON, P1, SCON, P2, etc

ADDRESSES address Bit address address Bit address

FF 98 9F 9E 9D 9C 9B 9A 99 98 SCON

F0 F7 F6 F5 F4 F3 F2 F1 F0 B
I/O Port 90 97 96 95 94 93 92 91 90 P1

Bit Addresses E0 E7 E6 E5 E4 E3 E2 E1 E0 ACC

8D not bit addressable TH1
(cont’) 8C not bit addressable TH0
D0 D7 D6 D5 D4 D3 D2 D1 D0 PSW
8B not bit addressable TL1
8A not bit addressable TL0
B8 -- -- -- BC BB BA B9 B8 IP 89 not bit addressable TMOD
88 8F 8E 8D 8C 8B 8A 89 88 TCON
B0 B7 B6 B5 B4 B3 B2 B1 B0 P3
87 not bit addressable PCON

A8 AF AE AD AC AB AA A9 A8 IE
83 not bit addressable DPH

A0 A7 A6 A5 A4 A3 A2 A1 A0 P2 82 not bit addressable DPL

81 not bit addressable SP
99 not bit addressable SBUF 80 87 86 85 84 83 82 81 80 P0

Special Function Register

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 ‰ Only registers A, B, PSW, IP, IE, ACC,
BIT SCON, and TCON are bit-addressable
ADDRESSES ¾ While all I/O ports are bit-addressable

Registers
‰ In PSW register, two bits are set aside
Bit- for the selection of the register banks
Addressability ¾ Upon RESET, bank 0 is selected
¾ We can select any other banks using the
bit-addressability of the PSW
CY AC -- RS1 RS0 OV -- P

RS1 RS0 Register Bank Address

0 0 0 00H - 07H
0 1 1 08H - 0FH
1 0 2 10H - 17H
1 1 3 18H - 1FH

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 Example 5-13
Write a program to save the accumulator in R7 of bank 2.
BIT Solution:
ADDRESSES CLR PSW.3
SETB PSW.4
MOV R7,A
Registers Example 5-14
Bit- While there are instructions such as JNC and JC to check the carry flag
Addressability bit (CY), there are no such instructions for the overflow flag bit (OV).
(cont’) How would you write code to check OV?
Solution:
JB PSW.2,TARGET ;jump if OV=1

CY AC -- RS1 RS0 OV -- P

Example 5-18
While a program to save the status of bit P1.7 on RAM address bit 05.
Solution:
MOV C,P1.7
MOV 05,C

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 Example 5-15
BIT Write a program to see if the RAM location 37H contains an even
ADDRESSES value. If so, send it to P2. If not, make it even and then send it to P2.
Solution:
MOV A,37H ;load RAM 37H into ACC
Registers JNB ACC.0,YES ;if D0 of ACC 0? If so jump
Bit- INC A ;it’s odd, make it even
YES: MOV P2,A ;send it to P2
Addressability
Example 5-17
(cont’)
The status of bits P1.2 and P1.3 of I/O port P1 must be saved before
they are changed. Write a program to save the status of P1.2 in bit
location 06 and the status of P1.3 in bit location 07
Solution:
CLR 06 ;clear bit addr. 06
CLR 07 ;clear bit addr. 07
JNB P1.2,OVER ;check P1.2, if 0 then jump
SETB 06 ;if P1.2=1,set bit 06 to 1
OVER: JNB P1.3,NEXT ;check P1.3, if 0 then jump
SETB 07 ;if P1.3=1,set bit 07 to 1
NEXT: ...

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 ‰ The BIT directive is a widely used
BIT
ADDRESSES
directive to assign the bit-addressable
I/O and RAM locations
Using BIT ¾ Allow a program to assign the I/O or RAM
bit at the beginning of the program,
making it easier to modify them
Example 5-22
A switch is connected to pin P1.7 and an LED to pin P2.0. Write a
program to get the status of the switch and send it to the LED.
Solution:
LED BIT P1.7 ;assign bit
SW BIT P2.0 ;assign bit
HERE: MOV C,SW ;get the bit from the port
MOV LED,C ;send the bit to the port
SJMP HERE ;repeat forever

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 Example 5-20
BIT
Assume that bit P2.3 is an input and represents the condition of an
ADDRESSES oven. If it goes high, it means that the oven is hot. Monitor the bit
continuously. Whenever it goes high, send a high-to-low pulse to port
P1.5 to turn on a buzzer.
Using BIT
Solution:
(cont’)
OVEN_HOT BIT P2.3
BUZZER BIT P1.5
HERE: JNB OVEN_HOT,HERE ;keep monitoring
ACALL DELAY
CPL BUZZER ;sound the buzzer
ACALL DELAY
SJMP HERE

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 ‰ Use the EQU to assign addresses
BIT
ADDRESSES ¾ Defined by names, like P1.7 or P2
¾ Defined by addresses, like 97H or 0A0H
Using EQU Example 5-24
A switch is connected to pin P1.7. Write a program to check the status
of the switch and make the following decision.
(a) If SW = 0, send “0” to P2
(b) If SW = 1, send “1“ to P2

Solution: SW EQU 97H

MYDATA EQU 0A0H
SW EQU P1.7
MYDATA EQU P2
HERE: MOV C,SW
JC OVER
MOV MYDATA,#’0’
SJMP HERE
OVER: MOV MYDATA,#’1’
SJMP HERE
END

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 ‰ The 8052 has another 128 bytes of on-
EXTRA 128
BYTE ON-CHIP
chip RAM with addresses 80 – FFH
RAM IN 8052 ¾ It is often called upper memory
ƒ Use indirect addressing mode, which uses R0
and R1 registers as pointers with values of 80H
or higher
– MOV @R0, A and MOV @R1, A
¾ The same address space assigned to the
SFRs
ƒ Use direct addressing mode
– MOV 90H, #55H is the same as
MOV P1, #55H

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 Example 5-27
EXTRA 128
Assume that the on-chip ROM has a message. Write a program to
BYTE ON-CHIP copy it from code space into the upper memory space starting at
RAM IN 8052 address 80H. Also, as you place a byte in upper RAM, give a copy to
P0.
(cont’)
Solution:
ORG 0
MOV DPTR,#MYDATA
MOV R1,#80H ;access the upper memory
B1: CLR A
MOVC A,@A+DPTR ;copy from code ROM
MOV @R1,A ;store in upper memory
MOV P0,A ;give a copy to P0
JZ EXIT ;exit if last byte
INC DPTR ;increment DPTR
INC R1 ;increment R1
SJMP B1 ;repeat until last byte
EXIT: SJMP $ ;stay here when finished
;---------------
ORG 300H
MYDATA: DB “The Promise of World Peace”,0
END

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 ARITHMETIC & LOGIC
INSTRUCTIONS AND
PROGRAMS

The 8051 Microcontroller and Embedded

Systems: Using Assembly and C
Mazidi, Mazidi and McKinlay

Chung-Ping Young
楊中平

Home Automation, Networking, and Entertainment Lab

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National Cheng Kung University, TAIWAN
 ADD A,source ;A = A + source
ARITHMETIC ‰ The instruction ADD is used to add two
INSTRUCTIONS operands
¾ Destination operand is always in register A
Addition of
¾ Source operand can be a register,
Unsigned immediate data, or in memory
Numbers
¾ Memory-to-memory arithmetic operations
are never allowed in 8051 Assembly
language
Show how the flag register is affected by the following instruction.
MOV A,#0F5H ;A=F5 hex CY =1, since there is a
ADD A,#0BH ;A=F5+0B=00 carry out from D7
PF =1, because the number
Solution:
of 1s is zero (an even
F5H 1111 0101 number), PF is set to 1.
+ 0BH + 0000 1011 AC =1, since there is a
100H 0000 0000 carry from D3 to D4

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 Assume that RAM locations 40 – 44H have the following values.
ARITHMETIC Write a program to find the sum of the values. At the end of the
INSTRUCTIONS program, register A should contain the low byte and R7 the high byte.
40 = (7D)
41 = (EB)
Addition of 42 = (C5)
Individual 43 = (5B)
44 = (30)
Bytes
Solution:
MOV R0,#40H ;load pointer
MOV R2,#5 ;load counter
CLR A ;A=0
MOV R7,A ;clear R7
AGAIN: ADD A,@R0 ;add the byte ptr to by R0
JNC NEXT ;if CY=0 don’t add carry
INC R7 ;keep track of carry
NEXT: INC R0 ;increment pointer
DJNZ R2,AGAIN ;repeat until R2 is zero

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 ‰ When adding two 16-bit data operands,
ARITHMETIC the propagation of a carry from lower
INSTRUCTIONS byte to higher byte is concerned
1 When the first byte is added
ADDC and 3C E7 (E7+8D=74, CY=1).
Addition of 16- + 3B 8D The carry is propagated to the
Bit Numbers 78 74 higher byte, which result in 3C
+ 3B + 1 =78 (all in hex)

Write a program to add two 16-bit numbers. Place the sum in R7 and
R6; R6 should have the lower byte.
Solution:
CLR C ;make CY=0
MOV A, #0E7H ;load the low byte now A=E7H
ADD A, #8DH ;add the low byte
MOV R6, A ;save the low byte sum in R6
MOV A, #3CH ;load the high byte
ADDC A, #3BH ;add with the carry
MOV R7, A ;save the high byte sum

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 ‰ The binary representation of the digits
ARITHMETIC 0 to 9 is called BCD (Binary Coded
INSTRUCTIONS Decimal) Digit BCD
0 0000
¾ Unpacked BCD 1 0001
BCD Number ƒ In unpacked BCD, the lower 4 2 0010
System bits of the number represent the 3 0011
BCD number, and the rest of the 4 0100
bits are 0 5 0101
6 0110
ƒ Ex. 00001001 and 00000101 are 7 0111
unpacked BCD for 9 and 5 8 1000

¾ Packed BCD 9 1001

ƒ In packed BCD, a single byte has

two BCD number in it, one in the
lower 4 bits, and one in the
upper 4 bits
ƒ Ex. 0101 1001 is packed BCD for
59H
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 ARITHMETIC ‰ Adding two BCD numbers must give a
INSTRUCTIONS BCD result Adding these two
numbers gives
Unpacked and MOV A, #17H 0011 1111B (3FH),
Which is not BCD!
Packed BCD ADD A, #28H

The result above should have been 17 + 28 = 45 (0100 0101).

To correct this problem, the programmer must add 6 (0110) to the
low digit: 3F + 06 = 45H.

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 DA A ;decimal adjust for addition
ARITHMETIC ‰ The DA instruction is provided to
INSTRUCTIONS correct the aforementioned problem
associated with BCD addition
DA Instruction
¾ The DA instruction will add 6 to the lower
nibble or higher nibble if need
Example: 6CH
MOV A,#47H ;A=47H first BCD operand
MOV B,#25H ;B=25H second BCD operand
ADD A,B ;hex(binary) addition(A=6CH)
DA A ;adjust for BCD addition
(A=72H)
72H
DA works only
after an ADD, The “DA” instruction works only on A. In other word, while the source
but not after INC can be an operand of any addressing mode, the destination must be in
register A in order for DA to work.

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 ‰ Summary of DA instruction
ARITHMETIC ¾ After an ADD or ADDC instruction
INSTRUCTIONS 1. If the lower nibble (4 bits) is greater than 9, or
if AC=1, add 0110 to the lower 4 bits
DA Instruction 2. If the upper nibble is greater than 9, or if
(cont’) CY=1, add 0110 to the upper 4 bits

Example:
HEX BCD
29 0010 1001
+ 18 + 0001 1000
41 0100 0001 AC=1
+ 6 + 0110
47 0100 0111

Since AC=1 after the

addition, ”DA A” will add 6 to the
lower nibble.
The final result is in BCD format.
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 Assume that 5 BCD data items are stored in RAM locations starting
at 40H, as shown below. Write a program to find the sum of all the
ARITHMETIC numbers. The result must be in BCD.
INSTRUCTIONS 40=(71)
41=(11)
42=(65)
DA Instruction 43=(59)
(cont’) 44=(37)
Solution:
MOV R0,#40H ;Load pointer
MOV R2,#5 ;Load counter
CLR A ;A=0
MOV R7,A ;Clear R7
AGAIN: ADD A,@R0 ;add the byte pointer
;to by R0
DA A ;adjust for BCD
JNC NEXT ;if CY=0 don’t
;accumulate carry
INC R7 ;keep track of carries
NEXT: INC R0 ;increment pointer
DJNZ R2,AGAIN ;repeat until R2 is 0

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 ‰ In many microprocessor there are two
ARITHMETIC different instructions for subtraction:
INSTRUCTIONS SUB and SUBB (subtract with borrow)
¾ In the 8051 we have only SUBB
Subtraction of
Unsigned ¾ The 8051 uses adder circuitry to perform
the subtraction
Numbers
SUBB A,source ;A = A – source – CY
‰ To make SUB out of SUBB, we have to
make CY=0 prior to the execution of
the instruction
¾ Notice that we use the CY flag for the
borrow

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 ‰ SUBB when CY = 0
ARITHMETIC 1. Take the 2’s complement of the
INSTRUCTIONS subtrahend (source operand)
2. Add it to the minuend (A)
Subtraction of 3. Invert the carry
Unsigned
CLR C
Numbers MOV A,#4C ;load A with value 4CH
(cont’) SUBB A,#6EH ;subtract 6E from A
JNC NEXT ;if CY=0 jump to NEXT
CPL A ;if CY=1, take 1’s complement
INC A ;and increment to get 2’s comp
NEXT: MOV R1,A ;save A in R1
c 2’s
Solution: complement
4C 0100 1100 0100 1100
CY=0, the result is positive; - 6E 0110 1110 1001 0010 d+
CY=1, the result is negative
-22 01101 1110
and the destination has the CY =1
2’s complement of the result e Invert carry

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 ‰ SUBB when CY = 1
ARITHMETIC
¾ This instruction is used for multi-byte
INSTRUCTIONS numbers and will take care of the borrow
of the lower operand
Subtraction of A = 62H – 96H – 0 = CCH
Unsigned
CLR C CY = 1
MOV A,#62H ;A=62H
Numbers SUBB A,#96H ;62H-96H=CCH with CY=1
(cont’) MOV R7,A ;save the result
MOV A,#27H ;A=27H
SUBB A,#12H ;27H-12H-1=14H
MOV R6,A ;save the result
A = 27H - 12H - 1 = 14H
Solution: CY = 0
We have 2762H - 1296H = 14CCH.

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 ‰ The 8051 supports byte by byte
ARITHMETIC multiplication only
INSTRUCTIONS
The byte are assumed to be unsigned data
¾

Unsigned MUL AB ;AxB, 16-bit result in B, A

Multiplication MOV A,#25H ;load 25H to reg. A
MOV B,#65H ;load 65H to reg. B
MUL AB ;25H * 65H = E99 where
;B = OEH and A = 99H

Unsigned Multiplication Summary (MUL AB)

Multiplication Operand1 Operand2 Result
Byte x byte A B B = high byte
A = low byte

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 ‰ The 8051 supports byte over byte
ARITHMETIC
INSTRUCTIONS
division only
The byte are assumed to be unsigned data
¾
Unsigned DIV AB ;divide A by B, A/B
Division
MOV A,#95 ;load 95 to reg. A
MOV B,#10 ;load 10 to reg. B
MUL AB ;A = 09(quotient) and
;B = 05(remainder)

Unsigned Division Summary (DIV AB)

Division Numerator Denominator Quotient Remainder
Byte / byte A B A B

CY is always 0
If B ≠ 0, OV = 0
If B = 0, OV = 1 indicates error

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 (a) Write a program to get hex data in the range of 00 – FFH from
port 1 and convert it to decimal. Save it in R7, R6 and R5.
ARITHMETIC (b) Assuming that P1 has a value of FDH for data, analyze program.
INSTRUCTIONS Solution:
(a)
Application for
MOV A,#0FFH
MOV P1,A ;make P1 an input port
DIV MOV
MOV
A,P1
B,#10
;read data from P1
;B=0A hex
DIV AB ;divide by 10
MOV R7,B ;save lower digit
MOV B,#10
DIV AB ;divide by 10 once more
MOV R6,B ;save the next digit
MOV R5,A ;save the last digit
(b) To convert a binary (hex) value to decimal, we divide it by 10
repeatedly until the quotient is less than 10. After each division the
remainder is saves.
Q R
FD/0A = 19 3 (low digit)
19/0A = 2 5 (middle digit)
2 (high digit)
Therefore, we have FDH=253.
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 ‰ D7 (MSB) is the sign and D0 to D6 are
SIGNED the magnitude of the number
ARITHMETIC
¾ If D7=0, the operand is positive, and if
INSTRUCTIONS D7=1, it is negative
D7 D6 D5 D4 D3 D2 D1 D0
Signed 8-bit
Operands
Sign Magnitude
‰ Positive numbers are 0 to +127
‰ Negative number representation (2’s
complement)
1. Write the magnitude of the number in 8-bit
binary (no sign)
2. Invert each bit
3. Add 1 to it
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 Show how the 8051 would represent -34H

SIGNED Solution:
0011 0100 34H given in binary
ARITHMETIC
1.

1100 1011 invert each bit

INSTRUCTIONS
2.

3. 1100 1100 add 1 (which is CC in hex)

Signed number representation of -34 in 2’s complement is CCH
Signed 8-bit
Operands Decimal Binary Hex
(cont’) -128 1000 0000 80
-127 1000 0001 81
-126 1000 0010 82
... ... ... ...
-2 1111 1110 FE
-1 1111 1111 FF
0 0000 0000 00
+1 0000 0001 01
+2 0000 0010 02
... ... ... ...
+127 0111 1111 7F
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 ‰ If the result of an operation on signed
SIGNED numbers is too large for the register
ARITHMETIC
INSTRUCTIONS ¾ An overflow has occurred and the
programmer must be noticed
Overflow Examine the following code and analyze the result.
Problem MOV A,#+96 ;A=0110 0000 (A=60H)
MOV R1,#+70 ;R1=0100 0110(R1=46H)
ADD A,R1 ;A=1010 0110
;A=A6H=-90,INVALID
Solution:
+96 0110 0000
+ +70 0100 0110
+ 166 1010 0110 and OV =1
According to the CPU, the result is -90, which is wrong. The CPU
sets OV=1 to indicate the overflow

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 ‰ In 8-bit signed number operations,
SIGNED
ARITHMETIC
OV is set to 1 if either occurs:
INSTRUCTIONS 1. There is a carry from D6 to D7, but no
carry out of D7 (CY=0)
OV Flag 2. There is a carry from D7 out (CY=1), but
no carry from D6 to D7
MOV A,#-128 ;A=1000 0000(A=80H)
MOV R4,#-2 ;R4=1111 1110(R4=FEH)
ADD A,R4 ;A=0111 1110(A=7EH=+126,INVALID)
-128 1000 0000
+ -2 1111 1110
-130 0111 1110 and OV=1

OV = 1
The result +126 is wrong

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 MOV A,#-2 ;A=1111 1110(A=FEH)
MOV R1,#-5 ;R1=1111 1011(R1=FBH)
SIGNED ADD A,R1 ;A=1111 1001(A=F9H=-7,
ARITHMETIC ;Correct, OV=0)
INSTRUCTIONS -2 1111 1110
+ -5 1111 1011
OV Flag -7 1111 1001 and OV=0

(cont’)
OV = 0
The result -7 is correct
MOV A,#+7 ;A=0000 0111(A=07H)
MOV R1,#+18 ;R1=0001 0010(R1=12H)
ADD A,R1 ;A=0001 1001(A=19H=+25,
;Correct,OV=0)
7 0000 0111
+ 18 0001 0010
25 0001 1001 and OV=0
OV = 0
The result +25 is correct
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 ‰ In unsigned number addition, we must
SIGNED
ARITHMETIC
monitor the status of CY (carry)
INSTRUCTIONS ¾ Use JNC or JC instructions
‰ In signed number addition, the OV
OV Flag (overflow) flag must be monitored by
(cont’)
the programmer
¾ JB PSW.2 or JNB PSW.2

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 ‰ To make the 2’s complement of a
SIGNED
ARITHMETIC
number
INSTRUCTIONS
CPL A ;1’s complement (invert)
ADD A,#1 ;add 1 to make 2’s comp.
2's
Complement

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 ANL destination,source
LOGIC AND ;dest = dest AND source
COMPARE
‰ This instruction will perform a logic
INSTRUCTIONS
AND on the two operands and place
AND
the result in the destination
¾ The destination is normally the
accumulator
¾ The source operand can be a register, in
memory, or immediate

X Y X AND Y Show the results of the following.

0 0 0 MOV A,#35H ;A = 35H
0 1 0 ANL A,#0FH ;A = A AND 0FH
1 0 0 35H 0 0 1 1 0 1 0 1 ANL is often used to
0FH 0 0 0 0 1 1 1 1 mask (set to 0) certain
1 1 1
05H 0 0 0 0 0 1 0 1 bits of an operand

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 ORL destination,source
LOGIC AND ;dest = dest OR source
COMPARE ‰ The destination and source operands
INSTRUCTIONS are ORed and the result is placed in
the destination
OR
¾ The destination is normally the
accumulator
¾ The source operand can be a register, in
memory, or immediate

X Y X OR Y Show the results of the following.

0 0 0 MOV A,#04H ;A = 04
0 1 1 ORL A,#68H ;A = 6C
ORL instruction can be
1 0 1 04H 0 0 0 0 0 1 0 0 used to set certain bits
1 1 1
68H 0 1 1 0 1 0 0 0 of an operand to 1
6CH 0 1 1 0 1 1 0 0

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 XRL destination,source
LOGIC AND ;dest = dest XOR source
COMPARE
INSTRUCTIONS
‰ This instruction will perform XOR
operation on the two operands and
XOR place the result in the destination
¾ The destination is normally the
accumulator
¾ The source operand can be a register, in
memory, or immediate
X Y X XOR Y Show the results of the following.
0 0 0 MOV A,#54H
0 1 1 XRL A,#78H
XRL instruction can be
1 0 1 54H 0 1 0 1 0 1 0 0 used to toggle certain
1 1 0 78H 0 1 1 1 1 0 0 0 bits of an operand
2CH 0 0 1 0 1 1 0 0
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 The XRL instruction can be used to clear the contents of a register by
LOGIC AND XORing it with itself. Show how XRL A,A clears A, assuming that
COMPARE AH = 45H.

INSTRUCTIONS 45H 0 1 0 0 0 1 0 1
45H 0 1 0 0 0 1 0 1
00H 0 0 0 0 0 0 0 0
XOR
(cont’) Read and test P1 to see whether it has the value 45H. If it does, send
99H to P2; otherwise, it stays cleared.
XRL can be used to
Solution: see if two registers
MOV P2,#00 ;clear P2 have the same value
MOV P1,#0FFH ;make P1 an input port
MOV R3,#45H ;R3=45H
MOV A,P1 ;read P1
XRL A,R3
JNZ EXIT ;jump if A is not 0
MOV P2,#99H
EXIT: ... If both registers have the same
value, 00 is placed in A. JNZ
and JZ test the contents of the
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 CPL A ;complements the register A
LOGIC AND
COMPARE ‰ This is called 1’s complement
INSTRUCTIONS MOV A, #55H
CPL A ;now A=AAH
Complement ;0101 0101(55H)
;becomes 1010 1010(AAH)
Accumulator
‰ To get the 2’s complement, all we
have to do is to to add 1 to the 1’s
complement

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 CJNE destination,source,rel. addr.
LOGIC AND
COMPARE ‰ The actions of comparing and jumping
INSTRUCTIONS are combined into a single instruction
called CJNE (compare and jump if not
Compare equal)
Instruction
¾ The CJNE instruction compares two
operands, and jumps if they are not equal
¾ The destination operand can be in the
accumulator or in one of the Rn registers
¾ The source operand can be in a register, in
memory, or immediate
ƒ The operands themselves remain unchanged
¾ It changes the CY flag to indicate if the
destination operand is larger or smaller
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 CJNE R5,#80,NOT_EQUAL ;check R5 for 80
LOGIC AND ... ;R5 = 80
COMPARE NOT_EQUAL:
INSTRUCTIONS JNC NEXT ;jump if R5 > 80
... ;R5 < 80
NEXT: ...
Compare
Instruction Compare Carry Flag
(cont’) destination ≥ source CY = 0
destination < source CY = 1
CY flag is always
checked for cases
of greater or less ‰ Notice in the CJNE instruction that any
than, but only after Rn register can be compared with an
it is determined that immediate value
they are not equal
¾ There is no need for register A to be
involved

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 ‰ The compare instruction is really a
LOGIC AND subtraction, except that the operands
COMPARE remain unchanged
INSTRUCTIONS ¾ Flags are changed according to the
execution of the SUBB instruction
Compare Write a program to read the temperature and test it for the value 75.
Instruction According to the test results, place the temperature value into the
registers indicated by the following.
(cont’) If T = 75 then A = 75
If T < 75 then R1 = T
If T > 75 then R2 = T
Solution:
MOV P1,#0FFH ;make P1 an input port
MOV A,P1 ;read P1 port
CJNE A,#75,OVER ;jump if A is not 75
SJMP EXIT ;A=75, exit
OVER: JNC NEXT ;if CY=0 then A>75
MOV R1,A ;CY=1, A<75, save in R1
SJMP EXIT ; and exit
NEXT: MOV R2,A ;A>75, save it in R2
EXIT: ...

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 RR A ;rotate right A
ROTATE
INSTRUCTION ‰ In rotate right
AND DATA ¾ The 8 bits of the accumulator are rotated
SERIALIZATION right one bit, and
¾ Bit D0 exits from the LSB and enters into
Rotating Right MSB, D7
and Left

MSB LSB

MOV A,#36H ;A = 0011 0110

RR A ;A = 0001 1011
RR A ;A = 1000 1101
RR A ;A = 1100 0110
RR A ;A = 0110 0011

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 RL A ;rotate left A
ROTATE
INSTRUCTION ‰ In rotate left
AND DATA ¾ The 8 bits of the accumulator are rotated
SERIALIZATION left one bit, and
¾ Bit D7 exits from the MSB and enters into
Rotating Right LSB, D0
and Left
(cont’)
MSB LSB

MOV A,#72H ;A = 0111 0010

RL A ;A = 1110 0100
RL A ;A = 1100 1001

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 RRC A ;rotate right through carry
ROTATE
INSTRUCTION ‰ In RRC A
AND DATA ¾ Bits are rotated from left to right
SERIALIZATION ¾ They exit the LSB to the carry flag, and
the carry flag enters the MSB
Rotating
through Carry
MSB LSB CY

CLR C ;make CY = 0
MOV A,#26H ;A = 0010 0110
RRC A ;A = 0001 0011 CY = 0
RRC A ;A = 0000 1001 CY = 1
RRC A ;A = 1000 0100 CY = 1

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 RLC A ;rotate left through carry
ROTATE
INSTRUCTION ‰ In RLC A
AND DATA ¾ Bits are shifted from right to left
SERIALIZATION ¾ They exit the MSB and enter the carry flag,
and the carry flag enters the LSB
Rotating
through Carry
(cont’) CY MSB LSB

Write a program that finds the number of 1s in a given byte.

MOV R1,#0
MOV R7,#8 ;count=08
MOV A,#97H
AGAIN: RLC A
JNC NEXT ;check for CY
INC R1 ;if CY=1 add to count
NEXT: DJNZ R7,AGAIN

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 ‰ Serializing data is a way of sending a
ROTATE
INSTRUCTION byte of data one bit at a time through
AND DATA a single pin of microcontroller
SERIALIZATION ¾ Using the serial port, discussed in Chapter
10
Serializing Data ¾ To transfer data one bit at a time and
control the sequence of data and spaces
in between them

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 ‰ Transfer a byte of data serially by
ROTATE
INSTRUCTION ¾ Moving CY to any pin of ports P0 – P3
AND DATA ¾ Using rotate instruction
SERIALIZATION Write a program to transfer value 41H serially (one bit at a time)
via pin P2.1. Put two highs at the start and end of the data. Send the
byte LSB first.
Serializing Data
Solution:
(cont’) MOV A,#41H
SETB P2.1 ;high
SETB P2.1 ;high
MOV R5,#8
AGAIN: RRC A
MOV P2.1,C ;send CY to P2.1
DJNZ R5,HERE
SETB P2.1 ;high
SETB P2.1 ;high
Pin
Register A CY P2.1
D7 D0
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 Write a program to bring in a byte of data serially one bit at a time
ROTATE via pin P2.7 and save it in register R2. The byte comes in with the
INSTRUCTION LSB first.
AND DATA Solution:
SERIALIZATION MOV R5,#8
AGAIN: MOV C,P2.7 ;bring in bit
RRC A
Serializing Data DJNZ R5,HERE
(cont’) MOV R2,A ;save it
Pin
P2.7 CY Register A
D7 D0

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 ‰ There are several instructions by which
ROTATE
INSTRUCTION the CY flag can be manipulated directly
AND DATA Instruction Function
SERIALIZATION SETB C Make CY = 1
CLR C Clear carry bit (CY = 0)
Single-bit CPL C Complement carry bit
Operations with MOV b,C Copy carry status to bit location (CY = b)
Copy bit location status to carry (b = CY)
CY
MOV C,b
JNC target Jump to target if CY = 0
JC target Jump to target if CY = 1
ANL C,bit AND CY with bit and save it on CY
ANL C,/bit AND CY with inverted bit and save it on CY
ORL C,bit OR CY with bit and save it on CY
ORL C,/bit OR CY with inverted bit and save it on CY

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 Assume that bit P2.2 is used to control an outdoor light and bit P2.5
ROTATE a light inside a building. Show how to turn on the outside light and
INSTRUCTION turn off the inside one.
AND DATA Solution:
SERIALIZATION SETB C ;CY = 1
ORL C,P2.2 ;CY = P2.2 ORed w/ CY
MOV P2.2,C ;turn it on if not on
Single-bit CLR C ;CY = 0
Operations with ANL
MOV
C,P2.5
P2.5,C
;CY = P2.5 ANDed w/ CY
;turn it off if not off
CY
(cont’) Write a program that finds the number of 1s in a given byte.
Solution:
MOV R1,#0 ;R1 keeps number of 1s
MOV R7,#8 ;counter, rotate 8 times
MOV A,#97H ;find number of 1s in 97H
AGAIN: RLC A ;rotate it thru CY
JNC NEXT ;check CY
INC R1 ;if CY=1, inc count
NEXT: DJNZ R7,AGAIN ;go thru 8 times

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 SWAP A
ROTATE
INSTRUCTION ‰ It swaps the lower nibble and the
AND DATA higher nibble
SERIALIZATION ¾ In other words, the lower 4 bits are put
into the higher 4 bits and the higher 4 bits
SWAP are put into the lower 4 bits
‰ SWAP works only on the accumulator
(A)
before : D7-D4 D3-D0

after : D3-D0 D7-D4

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 (a) Find the contents of register A in the following code.
ROTATE (b) In the absence of a SWAP instruction, how would you
INSTRUCTION exchange the nibbles? Write a simple program to show the
AND DATA process.
SERIALIZATION Solution:
(a)
SWAP MOV A,#72H ;A = 72H
(cont’) SWAP A ;A = 27H
(b)
MOV A,#72H ;A = 0111 0010
RL A ;A = 0111 0010
RL A ;A = 0111 0010
RL A ;A = 0111 0010
RL A ;A = 0111 0010

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