SDC Chapter 3
SDC Chapter 3
1. Establish the operating point in the centre of the active region of the characteristics,
so that on applying the input signal the instantaneous operating point does not move
either to the saturation region or to the cut-off region, even at the extreme values of
the input signal.
DC load line
The dc load line is the locus of IC and VCE at which BJT remains in active region i.e. it
represents all the possible combinations of IC and VCE for a given amplifier.
Procedure to draw DC load line
To draw DC load line of a transistor we need to find the saturation current and cutoff
voltage.
The saturation current is the maximum possible current through the transistor and occurs
at the point where the voltage across the collector is minimum. The DC equivalent of
Need for bias stabilization Only the fixing of a suitable operating point is not sufficient.
It must also be ensured that it remains where it was fixed. It is unfortunate that in the
transistor circuits the operating point shifts with the use of the circuit. Such a shift of
operating point may drive the transistor into an undesirable region. The amplifier then
becomes useless. There are two reasons for the operating point to shift. First, the transistor
parameters are temperature dependent. Secondly, the parameters (such as β ) change
from unit to unit. In spite of tremendous advancement in semiconductor technology, the
transistor parameters vary between wide limits even among different units of the same type.
Thus, when a transistor is replaced by another of the same type, the operating point may
shift.
When the operating point near A, positive portion is clipped. When the operating point
near C, negative portion is clipped.
When a distortion less output is needed, the operating point is near the middle of load line.
Methods of Biasing
In this circuit the end of base and collector resistor is connected to VCC supply.
Input Section: Let us first consider only the input section of the circuit.. We can apply
Kirchhoff’s voltage law (KVL) to this base–emitter loop and get
VCE = VCC − IC RC
IC = β IB + ICEO (3.5)
2. Calculate the collector current IC . Make sure that this value is not greater than Icsat .
Stability factor of Fixed-bias circuit we know in Common Emitter the input current is
base current and output current is collector current and are related by the following formula
IC = β IB + ICEO (3.6)
IC = β IB + (β + 1)ICO (3.7)
If we differentiate the above equation with respect to IC and consider β constant the above
equation is reduced to
∂ ICO ∂ IB
1 = (β + 1) + β (3.8)
∂ IC ∂ IC
∂ IC β +1
S= = (3.9)
∂ ICO ∂ IB
1−β
∂ IC
In fixed bias circuit IB is independent of IC . If β is 50, then the stability factor S is 51
which is very large value.
6 Transistor biasing and stabilization techniques
1. Simple circuit
3. The operating point can be fixed any where in the dc load line by simply changing
the value of RB .
Here, the base resistor RB is connected to the collector instead of connecting it to the
battery VCC . Writing the loop equation for the input circuit, we get
or
VCC − IC RC −VBE
IB = (3.12)
RC + RB
7
Or,
VCC = VBE + [RB + (β + 1)RC ] IB .
Hence,
VCC −VBE VCC
IB = ≈ . (3.16)
RB + (β + 1)RC RB + β RC
Since IC = β IB , we can determine the collector current. To determine the collector voltage
use Eq.3.10.
Calculation of stability factor of Collector to base bias circuit: Since VBE is almost inde-
pendent of IC , then
dIB Re
=− . (8.22)
dIC Re + Rb
dIB
Substituting for from Eq. (8.22) in Eq. (8.6), S can be expressed for the emitter-
dIC
feedback circuit as
1+β
S= . (8.23)
Re
1+β
Re + Rb
Since S is ≤ β + 1, a better stabilization is obtained in collector to base bias circuit.
8 Transistor biasing and stabilization techniques
Suppose the temperature increases, causing the leakage current (and also β ) to increase.
This increases the collector current (since
IC = β IB + ICEO .
VCE = VCC − IC RC .
As can be seen from Eq. (7.13), the reduced VCE causes a decrease in the base current IB .
The lowered base current, in turn, reduces the original increase in collector current. Thus,
a mechanism exists in the circuit because of which the collector current is not allowed
to increase rapidly. There is a tendency in the circuit to stabilise the operating point.
Advantages of collector-base feedback
VT h = IB RT h + IB RE + IC RE +VBE (3.19)
If we apply KVL to the collector–emitter junction,
β +1
S= (3.17)
∂ IC
1−β
∂ IB
Differentiating Eq. (3.14) with respect to IB ,
dIB dIC
0= (RB + RE ) + RE (3.21)
dIB dIB
dIB RE
=−
dIC RB + RE
Substituting Eq. (3.19) in Eq. (3.9), we obtain
(β + 1)(RB + RE )
S=
RB + RE + β RE
Dividing numerator and denominator by RE , we get
RB
(β + 1) 1 +
RE
S=
RB
+1+β
RE
RB
If is made much smaller, then S ≈ 1. Self-bias circuit is called β independent circuit.
RE
The voltage across the emitter resistor RE equals the voltage across R2 minus the base-to-
emitter voltage VBE . That is,
VE = VT h −VBE (7.24)
The current in the emitter is then calculated as
VE V2 −VBE
IE = = (3.22)
RE RE
The voltage at the collector (measured with respect to ground) VC equals the supply voltage
VCC minus the voltage drop across RC ,
VC = VCC − IC RC (7.24)
The collector-to-emitter voltage is then given as
1. The smaller the value of S, the better the stabilization. Since the self-bias circuit has
the lowest S value among all biasing circuits, it is widely used.
Stabilization techniques refers to the use of resistive biasing circuits which allows IB to
vary to keep IC relatively constant with variations of ICB0 , β ,VBE .
Stability factor S is defined as the rate of change of collector current IC with respect to
reverse saturation current, keeping β and VBE constant.
∂ IC ∆IC
S= ≈ (3.19)
∂ IC0 ∆IC0
′
Stability factor S is defined as the rate of change of collector current IC with respect to
VBE , keeping β and ICO constant.
′ ∂ IC ∆IC
S = ≈ (3.20)
∂VBE ∆VBE
′′
Stability factor S is defined as the rate of change of collector current IC with respect to β ,
keeping VBE and ICO constant.
′′ ∂ IC ∆IC
S = ≈ (3.21)
∂β ∆β
Out of the three stability factors, S is significant compared to S’ and S”.
12 Transistor biasing and stabilization techniques
Assignment 3
6. Draw the circuit diagram of a fixed– bias circuit. Calculate the operating point of the
fixed bias circuit by writing necessary KVL to input and output loop of the circuit?
8. Draw the circuit diagram of a Collector–to–base bias circuit. Calculate the operating
point of the Collector–to–base bias circuit by writing necessary KVL to input and
output loop of the circuit?
10. Draw the circuit diagram of a self bias circuit. Calculate the operating point of the self
bias circuit by writing necessary KVL to input and output loop of the circuit?
12. Prove mathematically that the operating point in a potential-divider biasing circuit is
independent of β . Make relevant assumptions.
13. Explain why the fixed-bias circuit, in spite of its simplicity, is not much used in
amplifiers.
13
No. Question
1 What is the suitable location of operating point? [c]
(a) At cut-off point
(b) At saturation point
(c) At the middle of a DC load line
(d) All of the above
2 The Q point in a voltage amplifier is selected in the middle of the
active region because [a]
No. Question
6 A transistor is operating in the active region. Under this condition:
[d]
(a) Both the junctions are forward biased
(b) Both the junctions are reverse biased
(c) Emitter–base junction is reverse biased, and collector–base junc-
tion is forward biased
(d) Emitter–base junction is forward biased, and collector–base junc-
tion is reverse biased
7 A transistor is operating in the saturation region. Under this condition:
[a]
(a) Both the junctions are forward biased
(b) Both the junctions are reverse biased
(c) Emitter–base junction is reverse biased, and collector–base junc-
tion is forward biased
(d) Emitter–base junction is forward biased, and collector–base junc-
tion is reverse biased
8 A transistor is operating in the cut off region. Under this condition:
[b]
(a) Both the junctions are forward biased
(b) Both the junctions are reverse biased
(c) Emitter–base junction is reverse biased, and collector–base junc-
tion is forward biased
(d) Emitter–base junction is forward biased, and collector–base junc-
tion is reverse biased
9 The signal handling capacity of an amplifier is high if [c]
(a) the operating point is selected near the cut off region.
(b) the operating point is selected near the saturation region.
(c) the operating point is selected in the middle of the active region
(d) an NPN transistor of similar characteristics is used instead of a
PNP one
10 The main purpose of transistor biasing is to: [b]
(a) Reduce power consumption.
(b) Set the operating point in the middle of a dc load line
(c) Increase output voltage
(d) Improve frequency response.
11 In a fixed bias circuit, the base current IB mainly depends on: [c]
(a) Collector resistor
(b) Emitter resistor
(c) Base resistor
(d) Load resistor
15
No. Question
12 The voltage-divider bias is also known as: [b]
(a) Beta-dependent biasing
(b) Self bias
(c) Collector to base bias
(d) Fixed bias
13 In collector to base bias, the negative feedback helps in: [b]
(a) Reducing collector current
(b) Stabilizing the operating point
(c) Increasing β
(d) Improving the cutoff frequency
14 Thermal runaway occurs when the collector current: [c]
(a) Remains constant
(b) Decreases with temperature
(c) Increases uncontrollably with temperature
(d) Is independent of β
15 The most effective way to prevent thermal runaway is to [b]
(a) Use a large base resistor
(b) Use a heat sink
(c) Use an emitter resistor RE for negative feedback
(d) Reduce supply voltage
16 The stability factor S indicates: [c]
(a) Input impedance of the transistor
(b) Variation of IB with temperature
(c) Sensitivity of IC to changes in ICBO
(d) Voltage gain of an amplifier
17 For a perfectly stable biasing circuit, the stability factor should be:
[b]
(a) Very high
(b) Exactly 1
(c) Equal to β
(d) Infinite
18 For a fixed bias circuit, the stability factor should be: [c]
(a)β
(b) Exactly 1
(c) β + 1
(d) None of the above
19 For a self bias circuit, the stability factor is [b]
(a)β
(b) very low
(c) β + 1
(d) None of the above