Ain Shams University 4th Year Electrical Eng.
Faculty of Engineering Analog Integrated Circuit Design
ECE Dept. ECE 412s
Fall 2023
Problem Set: 1
MOSFET Review
1. It is sometimes useful in analog circuits to use a transistor biased in triode as a voltage
controlled resistor. Use the following parameters to design a p-channel MOSFET with
a resistance of 100KΩ. μpCox=25μA/V2 VTp= -1V VGS=-1.2V VBS=0V
a) If the device has a width of 10μm, what is the necessary length?
b) What is the necessary width to get a 10KΩ resistor, if the length is 5μm?
2. The following measured transfer characteristics have been obtained for a MOS
transistor having a square gate area of 104 μm2. The gate oxide capacitance is found
from C-V measurements to be 2pF.
For VDS=1V, it was found that:
ID (μA) 0.0 0.54 3.84 15.6 21.6
VGS (V) 0.5 1 1.5 2 2.5
For VD=2V, it was found that:
ID (μA) 0.0 0.54 3.84 10.14 19.44
VGS (V) 0.5 1 1.5 2 2.5
a) Find the transistor threshold voltage VTh
b) Calculate the electronic surface mobility in the n-channel
c) Find the value of VGS at which the transistor enter in the linear region of operation
for VDS = 1V
d) Based on the transfer characteristics measurements at VDS=1V and VDS=2V for the
MOS transistor, find the three missing values for ID in the following table for VDS=3V
ID (μA) 0.0 0.54 ? ? ?
VGS (V) 0.5 1 1.5 2 2.5
3. The transit frequency, fT, is the frequency at which the current gain if the device drops
to unity while drain and source are at ac ground. Prove that the
gm
fT =
2 (CGD + CGS )
Also show, using the square law that
nVod
fT =
2L2
4. Suppose you received an NMOS transistor in a package with 4 unmarked describe the
minimum number of DC measurements using an ohmmeter necessary to determine the
gate source, drain and bulk terminals of the device. Repeat if the transistor type is
unknown.
5. The objective of this problem is to get familiar with some of the main BSIM model
parameters. For VGS= 1V VSB=0.3V, and W/L =10 μm /1μm, use BSIM model
parameters default values indicated in the following table to estimate the drain current
of an NMOS transistor in saturation. You may use the following oversimplified
Transistor model equations
U0 WCox
ID (VGS − VTh ) 2
[1 + (u d + 1 / E c L)(VGS − VT )] 2 L
where
u d = UA / TOX mobility degradation coefficient
Ec = 2VSAT/U0 critical E-field for velocity saturation
and
VTh = VTh0 + K1( ( s + VSB ) − s ) + K 2VSB
where Eg0 is the energy bandgap at temperature Tnom.