SiT9120 Datasheet
SiT9120 Datasheet
Features Applications
31 standard frequencies from 25 MHz to 212.5 MHz 10GB Ethernet, SONET, SATA, SAS, Fibre Channel,
LVPECL and LVDS output signaling types PCI-Express
0.6 ps RMS phase jitter (random) over 12 kHz Telecom, networking, instrumentation, storage, server
to 20 MHz bandwidth
Frequency stability as low as ±10 ppm
Industrial and extended commercial temperature ranges
Industry-standard packages: 3.2 x 2.5, 5.0 x 3.2 and
7.0 x 5.0 mm x mm
For any other frequencies between 1 to 625 MHz,
refer to SiT9121 and SiT9122 datasheet
Electrical Characteristics
Table 1. Electrical Characteristics
Parameters Symbol Min. Typ. Max. Unit Condition
LVPECL and LVDS, Common Electrical Characteristics
Supply Voltage Vdd 2.97 3.3 3.63 V
2.25 2.5 2.75 V
2.25 – 3.63 V Termination schemes in Figures 1 and 2 - XX ordering code
Output Frequency Range f 25 – 212.5 MHz See list of standard frequencies
Frequency Stability F_stab -10 – +10 ppm Inclusive of initial tolerance, operating temperature,
-20 – +20 ppm rated power supply voltage, and load variations
[1]
Table 4. Thermal Consideration
Package JA, 4 Layer Board (°C/W) JC, Bottom (°C/W)
7050, 6-pin 142 27
5032, 6-pin 97 20
3225, 6-pin 109 20
Note:
1. Refer to JESD51-7 for JA and JC definitions, and reference layout used to determine the JA and JC values in the above table.
70°C 90°C
85°C 105°C
Note:
2. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Waveform Diagrams
OUT-
80% 80%
OUT+
VOL
Tr Tf
GND
V_ Swing
0V
t
OUT-
80% 80%
VOD
20% 20%
OUT+
VOS
Tr Tf
GND
Termination Diagrams
LVPECL
VDD
OUT+ Z0 = 50 D+
OUT- Z0 = 50 D-
50 50
R1 R1
50 50
VTT
VDD R1 R3
OUT+ Z0 = 50 D+
OUT- Z0 = 50 D-
R2 R4
OUT+ Z0 = 50 D+
OUT- Z0 = 50 D-
2.25
3.2±0.05 2.20
#6 #5 #4 #4 #5 #6
2.5±0.05
0.9
1.6
YXXXX
YXXXX
0.7
1.00
#1 #2 #3 #3 #2 #1
0.6
0.65 1.05
0.75±0.05
5.0±0.10 2.54
#6 #5 #4 #4 #5 #6
3.2±0.10
1.20
YXXXX
YXXXX 0.90
#1 #2 #3 #3 #2 #1
0.64
0.75±0.05
7.0±0.10 5.08
5.08
#6 #5 #4 #4 #5 #6
5.0±0.10
2.60
1.10
3.80
YXXXX
YXXXX
#1 #2 #3 #3 #2 #1 1.60
1.40
1.60
0.90 ±0.10
Notes:
3. Top Marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of
the device.
4. A capacitor of value 0.1 F between Vdd and GND is recommended.
Ordering Information
SiT9120AC-1C2-33E125.000000T
Packaging:
Part Family “T”, “Y”, “X”, “D”, “E”, or “G”
“SiT9120” Refer to table below for
packing method
Leave Blank for Bulk
Revision Letter
“A” is the revision of Silicon Frequency
See Supported Frequency list
below
Temperature Range
“I” Industrial, -40 to 85°C Feature Pin
“C” Extended Commercial, -20 to 70°C “N” for No Connect
“E” for Output Enable
“S” for Standby
Signalling Type
“1” = LVPECL Voltage Supply
“2” = LVDS “25” for 2.5V ±10%
“33” for 3.3V ±10%
“XX” for 2.25V to 3.63V
Package Size
“B” 3.2 x 2.5 mm x mm Frequency Stability
“C” 5.0 x 3.2 mm x mm
“F” for ±10 ppm
“D” 7.0 x 5.0 mm x mm
“1” for ±20 ppm
“2” for ±25 ppm
“3” for ±50 ppm
Table 8. Ordering Codes for Supported Tape & Reel Packing Method
8 mm T&R 8 mm T&R 8 mm T&R 12 mm T&R 12 mm T&R 12 mm T&R 16 mm T&R 16 mm T&R 16 mm T&R
Device Size
(3ku) (1ku) (250u) (3ku) (1ku) (250u) (3ku) (1ku) (250u)
7.0 x 5.0 mm – – – – – – T Y X
5.0 x 3.2 mm – – – T Y X – – –
3.2 x 2.5 mm D E G T Y X – – –
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or defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect
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(iv) improper installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.
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Supplemental Information
The Supplemental Information section is not part of the datasheet and is for informational purposes only.
Why is SiTime Best in Class: Internal differential architecture for best common
mode noise rejection
SiTime’s MEMS resonators are vacuum sealed Electrostatically driven MEMS resonator is more
using an advanced EpiSeal™ process, which immune to EMS
eliminates foreign particles and improves long
term aging and reliability
World-class MEMS and CMOS design expertise
SiTime 1,140
IDT 38
EPSN 28
Figure 3. Electro Magnetic Susceptibility (EMS)[3]
8
8
Aging ( PPM)
4
3
3.5 Figure 4. Power Supply Noise Rejection[4]
2 1.5
0
1-Year 10-Year
TXC
TXC EPS CW KYCA
KYCA SLAB EpiSeal
SiTime MEMS
100.0
Vibration Sensitivity (ppb/g)
10.0
1.0
0.1
0.0
10 100 1000
Vibration Frequency (Hz) KYCA EPSN TXC CW SLAB SiTime
Figure labels:
TXC = TXC
Epson = EPSN
Connor Winfield = CW
Kyocera = KYCA
SiLabs = SLAB
SiTime = EpiSeal MEMS
Notes:
1. Data source: Reliability documents of named companies.
2. Data source: SiTime and quartz oscillator devices datasheets.
3. Test conditions for Electro Magnetic Susceptibility (EMS):
According to IEC EN61000-4.3 (Electromagnetic compatibility standard)
Field strength: 3V/m
Radiated signal modulation: AM 1 kHz at 80% depth
Carrier frequency scan: 80 MHz – 1 GHz in 1% steps
Antenna polarization: Vertical
DUT position: Center aligned to antenna
Devices used in this test: