CS302 - Digital Logic Design

Complete Study Guide - All Key Topics

Virtual University of Pakistan | Easy Wordings for Quick Learning

1. Digital vs Analogue Systems

Q: What is the difference between a Digital and Analogue system?
An Analogue system works with continuous signals — values that can be anything, like 1.5V, 2.7V,
3.1V. A Digital system works with only two values: 0 and 1 (OFF and ON).

Feature Analogue System Digital System

Signal type Continuous (any value) Discrete (only 0 or 1)
Example Old radio, thermometer Computer, calculator
Noise affected? Yes, badly Barely affected
Accuracy Can drift over time Always precise
Processing Harder to process Easy to process

2. Number Systems and Codes

2a. Signed and Unsigned Binary Numbers
Q: What are Signed and Unsigned Binary Numbers?
Unsigned: Only positive numbers. All bits represent the value. Example: 8-bit unsigned range is 0
to 255.
Signed: Can be positive OR negative. The leftmost bit (MSB) shows the sign: 0 = positive, 1 =
negative.
Most common signed representation is 2's Complement.
2's Complement rule: Flip all bits then add 1. Example: +5 is 0101, so -5 is 1010+1 = 1011.

2b. BCD Code

Q: What is BCD Code?
 BCD stands for Binary Coded Decimal. Each decimal digit (0 to 9) is stored as a 4-bit binary
number. It is used in calculators and digital displays.

Decimal BCD (4-bit)

0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001

Note: BCD codes 1010 to 1111 are invalid — they are never used.

2c. Gray Code

Q: What is Gray Code?
Gray Code is a special binary code where only ONE bit changes between consecutive numbers.
This reduces errors in digital systems, especially in rotating sensors and switches.

Decimal Binary Gray Code

0 000 000
1 001 001
2 010 011
3 011 010
4 100 110
5 101 111
6 110 101
7 111 100

2d. Excess-3 Code

Q: What is Excess-3 Code?
Excess-3 is a BCD code where you add 3 (0011) to every BCD digit. So decimal 0 becomes 0011,
decimal 5 becomes 1000. It is self-complementing which makes subtraction easier.
Decimal BCD Excess-3
0 0000 0011
1 0001 0100
2 0010 0101
3 0011 0110
4 0100 0111
5 0101 1000
6 0110 1001
7 0111 1010
8 1000 1011
9 1001 1100

2e. ASCII Code

Q: What is ASCII Code?
ASCII stands for American Standard Code for Information Interchange. It is a 7-bit code that assigns
a number to every letter, digit, and symbol on your keyboard.
• 'A' = 65, 'B' = 66, 'Z' = 90
• 'a' = 97, 'b' = 98, 'z' = 122
• '0' = 48, '1' = 49, '9' = 57
• Total: 128 characters (0 to 127)

2f. Extended ASCII

Q: What is Extended ASCII?
Extended ASCII uses 8 bits instead of 7. This allows 256 characters (0 to 255). The extra 128
characters include symbols like accented letters, drawing characters, and special signs.

2g. Alphanumeric Codes

Q: What are Alphanumeric Codes?
Alphanumeric codes represent both letters (A-Z, a-z) AND numbers (0-9) AND special characters (!,
@, #...) in binary form. ASCII is the most famous alphanumeric code.

3. Boolean Algebra
Q: What is Boolean Algebra?
 Boolean Algebra is the maths of logic. It only uses two values: 0 (FALSE) and 1 (TRUE). It is used
to design and simplify digital circuits. Invented by George Boole.

3a. Laws of Boolean Algebra

Q: What are the Laws of Boolean Algebra?

Law AND form OR form

Identity Law A.1=A A+0=A
Null / Dominance Law A.0=0 A+1=1
Idempotent Law A.A=A A+A=A
Complement Law A . A' = 0 A + A' = 1
Double Complement A'' = A A'' = A
Commutative Law A.B=B.A A+B=B+A
Associative Law (A.B).C = A.(B.C) (A+B)+C = A+(B+C)
Distributive Law A.(B+C) = A.B + A.C A+B.C = (A+B).(A+C)
Absorption Law A.(A+B) = A A + A.B = A

3b. Rules of Boolean Algebra

Q: What are the Rules of Boolean Algebra?
1. A + 0 = A (anything OR 0 stays the same)
2. A + 1 = 1 (anything OR 1 is always 1)
3. A . 0 = 0 (anything AND 0 is always 0)
4. A . 1 = A (anything AND 1 stays the same)
5. A + A = A (A OR A is just A)
6. A . A = A (A AND A is just A)
7. A + A' = 1 (A OR NOT-A is always 1)
8. A . A' = 0 (A AND NOT-A is always 0)
9. A'' = A (double NOT cancels out)

3c. De Morgan's Theorems

Q: What are De Morgan's Theorems?
De Morgan's Theorems tell us how to convert between AND and OR when dealing with NOT
(complement). Very useful for simplifying circuits.

Theorem Statement Meaning

First Theorem (A . B)' = A' + B' NOT(A AND B) = NOT-A OR NOT-B
Second Theorem (A + B)' = A' . B' NOT(A OR B) = NOT-A AND NOT-B

Note: Easy trick: Break the bar, change the sign (AND becomes OR, OR becomes AND).
3d. SOP and POS Forms
Q: What is Standard SOP Form?
SOP = Sum of Products. It is a Boolean expression written as OR of AND terms. Each AND term is
called a minterm. Output = 1 rows from truth table are used.
Example: F = A'B + AB' + AB (each term is ANDed, then all are ORed)

Q: What is Standard POS Form?

POS = Product of Sums. It is a Boolean expression written as AND of OR terms. Each OR term is
called a maxterm. Output = 0 rows from truth table are used.
Example: F = (A+B)(A+B')(A'+B) (each term is ORed, then all are ANDed)

4. Minterms and Maxterms

Q: What are Minterms and Maxterms?

Minterm Maxterm

Definition AND term where output = 1 OR term where output = 0

Symbol Small m (m0, m1, m2...) Capital M (M0, M1, M2...)
Form used in SOP (Sum of Products) POS (Product of Sums)
Variable form Normal or complemented, ANDed Normal or complemented, ORed

Minterm and Maxterm table for 2 variables A, B:

A B Minterm (output=1) Symbol Maxterm (output=0) Symbo

l
0 0 A'B' m0 A+B M0
0 1 A'B m1 A+B' M1
1 0 AB' m2 A'+B M2
1 1 AB m3 A'+B' M3
5. Karnaugh Maps (K-Maps)
Q: What is a Karnaugh Map?
A K-Map is a visual grid used to simplify Boolean expressions. Instead of using algebra rules, you
group 1s in the grid and read off the simplified expression. Faster and easier than Boolean algebra
for simple circuits.
Key rule: Group 1s in powers of 2 (groups of 1, 2, 4, 8...). Larger groups = simpler expression.

5a. 3-Variable K-Map

Q: What is a 3-Variable K-Map?
A 3-variable K-Map has 8 cells (2^3 = 8). Variables are usually A, B, C. The columns are arranged in
Gray Code order: 00, 01, 11, 10 so adjacent cells differ by only one variable.

BC=00 BC=01 BC=11 BC=10

A=0 m0 m1 m3 m2
A=1 m4 m5 m7 m6

Grouping rules:
• Groups must be rectangles of size 1, 2, or 4 cells
• Groups can wrap around edges (left to right, top to bottom)
• Each group of 2 eliminates 1 variable from the term
• Each group of 4 eliminates 2 variables from the term

5b. 4-Variable K-Map

Q: What is a 4-Variable K-Map?
A 4-variable K-Map has 16 cells (2^4 = 16). Variables are usually A, B, C, D. Both rows and columns
use Gray Code order.

CD=00 CD=01 CD=11 CD=10

AB=00 m0 m1 m3 m2
AB=01 m4 m5 m7 m6
AB=11 m12 m13 m15 m14
AB=10 m8 m9 m11 m10

Groups can be: 1, 2, 4, 8, or all 16 cells. Larger groups = fewer variables in final expression.
Note: Always look for the largest possible group first. A variable that does NOT change inside the group
is kept in the term.
6. Logic Gates
Q: What are Logic Gates?
Logic gates are the basic building blocks of all digital circuits. Each gate takes binary inputs (0 or 1)
and gives a binary output based on a rule. They are made from transistors inside chips.

6a. AND Gate

Symbol: A.B or A AND B
Rule: Output is 1 ONLY when ALL inputs are 1. If any input is 0, output is 0.

A B Output (A.B)
0 0 0
0 1 0
1 0 0
1 1 1

• Has 2 or more inputs, 1 output

• Like a series circuit - all switches must be ON
• Used to enable/disable signals

6b. OR Gate
Symbol: A+B or A OR B
Rule: Output is 1 when ANY input is 1. Only 0 when ALL inputs are 0.

A B Output (A+B)
0 0 0
0 1 1
1 0 1
1 1 1

• Has 2 or more inputs, 1 output

• Like a parallel circuit - any switch ON gives output
• Used in error detection and alarm systems

6c. NOT Gate (Inverter)

Symbol: A' or NOT A or A with a bar on top
Rule: Output is always the OPPOSITE of input. 0 becomes 1, 1 becomes 0.
A Output (A')
0 1
1 0

• Has only 1 input and 1 output

• Called an Inverter - flips the signal
• Used in complement operations and clock signals

6d. NAND Gate

Symbol: (A.B)' or NOT AND
Rule: Opposite of AND. Output is 0 ONLY when ALL inputs are 1. Otherwise output is 1.

A B Output (A.B)')
0 0 1
0 1 1
1 0 1
1 1 0

• Called a Universal Gate - can make ANY other gate using only NAND gates
• Most commonly used gate in real chips (cheaper to manufacture)
• Output is always opposite of AND gate

6e. NOR Gate

Symbol: (A+B)' or NOT OR
Rule: Opposite of OR. Output is 1 ONLY when ALL inputs are 0. Otherwise output is 0.

A B Output (A+B)')
0 0 1
0 1 0
1 0 0
1 1 0

• Also a Universal Gate - can make any other gate using only NOR gates
• Used in memory circuits (SR Latch is made of NOR gates)
• Output is always opposite of OR gate

6f. XOR Gate (Exclusive OR)

Symbol: A XOR B or A ⊕ B
Rule: Output is 1 when inputs are DIFFERENT. Output is 0 when inputs are the SAME.
A B Output (A⊕B)
0 0 0
0 1 1
1 0 1
1 1 0

• Key use: used in adders to compute the Sum bit

• Used in parity generators and checkers
• Easy memory trick: XOR = ODD number of 1s in input gives output 1

6g. XNOR Gate (Exclusive NOR)

Symbol: A XNOR B or (A ⊕ B)'
Rule: Output is 1 when inputs are the SAME. Output is 0 when inputs are DIFFERENT. Opposite of
XOR.

A B Output (A⊕B)'
0 0 1
0 1 0
1 0 0
1 1 1

• Used in comparators to check if two bits are equal

• Used in parity checkers
• Easy memory trick: XNOR = EVEN number of 1s gives output 1

6h. Logic Gate Summary Table

Gate Symbol Output is 1 when... Universal Key Use

?
AND A.B ALL inputs are 1 No Enable/disable
OR A+B ANY input is 1 No Alarm, OR conditions
NOT A' Input is 0 No Inverter, complement
NAND (A.B)' NOT all inputs are 1 YES Most common in chips
NOR (A+B)' ALL inputs are 0 YES SR Latch, memory
XOR A⊕B Inputs are DIFFERENT No Adders, parity
XNOR (A⊕B)' Inputs are SAME No Comparators

6i. Operational Characteristics of Logic Gates

Q: What are Logic Gate Operational Characteristics?

Characteristic What it means

Fan-in Maximum number of inputs a gate can accept
Fan-out Maximum number of gates one output can drive without signal loss
Propagation Delay Time taken for output to respond after input changes
Power Dissipation Amount of electrical power the gate uses (heat generated)
Noise Margin How much electrical noise the gate can handle without giving wrong output
Logic Levels Voltage ranges that represent valid 0 (LOW) and 1 (HIGH)
Speed How fast the gate can switch between 0 and 1
7. Parity Method
Q: What is the Parity Method?
Parity is a simple error-detection method. An extra bit called the parity bit is added to binary data
before sending it. The receiver checks this bit to see if any error occurred during transmission.

7a. Even Parity

Q: What is Even Parity?
In even parity, the parity bit is chosen so that the TOTAL number of 1s in the data (including the
parity bit) is an EVEN number.
Example: Data = 1011 (three 1s). To make total even, parity bit = 1. Sent data = 1011 1.

Data Number of 1s Parity Bit (Even) Transmitted

1010 2 (even) 0 10100
1011 3 (odd) 1 10111
1100 2 (even) 0 11000
1111 4 (even) 0 11110

7b. Odd Parity

Q: What is Odd Parity?
In odd parity, the parity bit is chosen so that the TOTAL number of 1s in the data (including the
parity bit) is an ODD number.
Example: Data = 1011 (three 1s). Already odd, so parity bit = 0. Sent data = 1011 0.

Data Number of 1s Parity Bit (Odd) Transmitted

1010 2 (even) 1 10101
1011 3 (odd) 0 10110
1100 2 (even) 1 11001
1111 4 (even) 1 11111

Note: Parity can only detect an ODD number of bit errors. It cannot detect 2-bit errors (they cancel out). It
also cannot CORRECT errors, only detect them.

8. Combinational and Sequential Circuits

Q: What is a Combinational Circuit?
 A combinational circuit is a digital circuit where the output depends ONLY on the current inputs. It
has no memory. The moment inputs change, the output changes. No clock is needed.
Examples: Adders, Decoders, Encoders, Multiplexers, Comparators

Q: What is a Sequential Circuit?

A sequential circuit is a digital circuit where the output depends on both the CURRENT inputs AND
the PAST state (memory). It uses flip-flops or latches to store previous state. A clock signal is
usually needed.
Examples: Latches, Flip-flops, Counters, Registers, State Machines

Feature Combinational Circuit Sequential Circuit

Memory No memory Has memory (flip-flops)
Output depends on Current inputs only Current inputs + past state
Clock needed? No Usually yes
Examples Adder, MUX, Decoder Counter, Register, Latch
Complexity Simpler More complex
9. Adder Circuits
9a. Half Adder
Q: What is a Half Adder?
A Half Adder adds two single bits A and B and gives two outputs: Sum and Carry Out. It is the
simplest adder but cannot accept a carry from a previous stage.

A B Sum Carry Out

0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Sum = A XOR B
Carry Out = A AND B
Built from: 1 XOR gate + 1 AND gate

9b. Full Adder

Q: What is a Full Adder?
A Full Adder adds THREE bits: A, B, and Carry In (from a previous adder). This allows multiple Full
Adders to be chained together to add multi-bit numbers.

A B Carry In Sum Carry Out

0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Sum = A XOR B XOR Cin

Carry Out = (A AND B) OR (Cin AND (A XOR B))
Built from: 2 Half Adders + 1 OR gate

9c. Parallel Binary Adder

Q: What are Parallel Binary Adders?
A Parallel Binary Adder connects multiple Full Adders to add multi-bit numbers all at once. Each Full
Adder handles one bit position. The carry output of each adder feeds into the carry input of the next.
• 4-bit adder: uses 4 Full Adders connected in a chain
• 8-bit adder: uses 8 Full Adders
• The Carry Out of adder N connects to Carry In of adder N+1

Problem: Carry Propagation delay — each adder waits for carry from the previous one.
Solution: Look-Ahead Carry Generator predicts all carries at once.

9d. BCD Adder

Q: What is a BCD Adder?
A BCD Adder adds two BCD digits (0-9 in 4-bit binary). Since BCD only allows values 0-9, if the
result is 10 or more, a correction of +6 (0110) is added to skip the invalid codes 1010 to 1111.

Condition Action Why?

Result 0 to 9 No correction needed Valid BCD, done
Result 10 to 15 Add 6 (0110) Skip invalid BCD codes
Carry out occurred Add 6 (0110) Result exceeded one BCD digit
Example: 7 + 6 = 13. Binary: 0111 + 0110 = 1101 (=13, invalid). Add 0110: 1101 + 0110 = 10011 =
BCD 1,3 = 13. Correct!

9e. Carry Propagation

Q: What is Carry Propagation?
In a parallel adder, each Full Adder must wait for the carry output from the previous adder before it
can produce its final sum. This chain of waiting is called Carry Propagation and it causes a speed
delay.
• Adder 0 computes first and passes carry to Adder 1
• Adder 1 waits for that carry, then passes to Adder 2
• This chain continues to the last adder
Fix: Look-Ahead Carry Adder calculates all carries simultaneously using extra logic — much faster.
10. Decoders
Q: What is a Decoder?
A decoder takes a binary code as input and activates exactly ONE of its output lines. It translates a
binary code into a specific action or selection. N input lines can select up to 2^N outputs.

10a. Binary Decoder

Q: What is a Binary Decoder?
A binary decoder converts an N-bit binary input into one of 2^N output lines. Only the output
matching the binary input value goes HIGH (active). All others stay LOW.

I1 I0 O0 O1 O2 O3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

10b. MSI Decoder

Q: What is an MSI Decoder?
MSI stands for Medium Scale Integration. An MSI Decoder is a decoder available as a ready-made
IC chip. You just connect it without building from scratch using individual gates. Saves space, time,
and cost.
Famous example: 74HC138 — a 3-to-8 line decoder with enable inputs. Give it a 3-bit code, one of
8 outputs goes active.

10c. BCD to Decimal Decoder

Q: What is a BCD to Decimal Decoder?
This decoder takes a 4-bit BCD code (representing 0-9) and activates one of 10 output lines. It has
10 outputs instead of 16 because only codes 0-9 are valid BCD.
• Input: 4-bit BCD code
• Output: 10 lines (one for each digit 0 to 9)
• Invalid BCD codes (1010-1111) activate no output

BCD Input Active Output

0000 Output 0
0001 Output 1
0010 Output 2
BCD Input Active Output
0011 Output 3
0100 Output 4
0101 Output 5
0110 Output 6
0111 Output 7
1000 Output 8
1001 Output 9

10d. MSI 7-Segment Decoder

Q: What is an MSI 7-Segment Decoder?
A 7-segment decoder takes a 4-bit BCD input and drives a 7-segment display to show the correct
decimal digit. A 7-segment display has 7 LED segments (a to g). The decoder decides which
segments to light up for each digit.

Digit Segments ON
0 a, b, c, d, e, f (all except g)
1 b, c
2 a, b, d, e, g
3 a, b, c, d, g
4 b, c, f, g
5 a, c, d, f, g
6 a, c, d, e, f, g
7 a, b, c
8 All segments
9 a, b, c, d, f, g

Note: Famous chip: 74HC4511 — BCD to 7-segment latch/decoder/driver.

11. Encoders
Q: What is an Encoder?
An encoder is the opposite of a decoder. It takes ONE active input line and converts it into a binary
code output. It has many inputs and fewer output lines (binary code).
11a. Primary (Basic) Encoder
Q: What is a Primary Encoder?
A basic encoder assumes only ONE input is active at a time. If two inputs are active simultaneously,
the output will be incorrect. It simply converts the active input number into binary.

11b. Priority Encoder

Q: What is a Priority Encoder?
A priority encoder handles the situation when multiple inputs are active at the same time. It gives
priority to the HIGHEST numbered active input and encodes that one. The others are ignored.
Extra output V: V = Valid bit. It is 1 when any input is active, 0 when no input is active.

D3 D2 D1 D0 Output A1 Output A0 Valid V

0 0 0 0 X X 0
0 0 0 1 0 0 1
0 0 1 X 0 1 1
0 1 X X 1 0 1
1 X X X 1 1 1

11c. Decimal to BCD Encoder

Q: What is a Decimal to BCD Encoder?
This encoder has 10 inputs (0 to 9). When one input is pressed, it outputs the 4-bit BCD code for
that decimal digit.

Input Active BCD Output (D C B A)

Input 0 0000
Input 1 0001
Input 2 0010
Input 3 0011
Input 4 0100
Input 5 0101
Input 6 0110
Input 7 0111
Input 8 1000
Input 9 1001
12. Comparator
Q: What is a Comparator?
A comparator is a circuit that compares two binary numbers A and B. It has three output lines to
show the result of the comparison.

Output Meaning When is it 1?

A>B A is greater than B When value A is larger
A=B A equals B When both numbers are identical
A<B A is less than B When value B is larger

2-bit comparator: A=B is 1 for inputs: 00-00, 01-01, 10-10, 11-11

A > B is 1 for inputs: 01-00, 10-00, 10-01, 11-00, 11-01, 11-10
A < B is 1 for inputs: 00-01, 00-10, 00-11, 01-10, 01-11, 10-11
Parallel comparator: All bits compared simultaneously (very fast).
Cascade: Two 2-bit comparators can be joined to make a 4-bit comparator.
13. Multiplexer (MUX)
Q: What is a Multiplexer?
A Multiplexer is a digital switch with many inputs but only ONE output. Select lines choose which
input to pass to the output. Also called a Data Selector.

MUX size Data Inputs Select Lines Outputs

2-to-1 2 1 1
4-to-1 4 2 1
8-to-1 8 3 1
16-to-1 16 4 1

Applications of Multiplexer
Q: What are the applications of a Multiplexer?
10. Data Routing: Routes data from any register to the ALU for calculations.
11. Telephone Networks: Multiple audio calls sent over one wire by rapid switching.
12. Memory Addressing: Row and column address share the same lines to save wires.
13. Serial Transmission: Converts parallel data to serial — sends 8 bits over 1 wire.
14. Logic Function Generator: Any Boolean function can be built using a MUX by connecting
inputs properly.

14. The 16-Bit ALU

Q: What is a 16-bit ALU?
ALU = Arithmetic Logic Unit. It is the computing heart of a processor — it does maths (add, subtract)
and logic (AND, OR, NOT). A 16-bit ALU works with 16-bit numbers.
It is built by connecting FOUR 4-bit ALU chips together:
• ALU 0 handles bits 0-3
• ALU 1 handles bits 4-7
• ALU 2 handles bits 8-11
• ALU 3 handles bits 12-15
• A Look-Ahead Carry Generator (74X182) links them for fast carry handling

Operation type Examples

Arithmetic Addition, Subtraction, Increment, Decrement
Logic AND, OR, NOT, XOR, NAND, NOR
Shift Left shift, Right shift
15. Integrated Circuit (IC) Technologies
Q: What are Integrated Circuit Technologies?
An IC (Integrated Circuit) is a miniature electronic circuit containing transistors, gates, and
connections all on a tiny silicon chip. IC technologies refer to how many components fit on one chip.

Level Full Name Gates per chip Examples

SSI Small Scale Integration 1 to 10 Single gates (AND, OR)
MSI Medium Scale Integration 10 to 100 Decoders, MUX, Adders
LSI Large Scale Integration 100 to 10,000 Simple CPUs
VLSI Very Large Scale 10,000 to millions Microprocessors
Integration
ULSI Ultra Large Scale Millions+ Modern CPUs, GPUs
Integration

IC Logic Families
Family Full Name Key Feature
TTL Transistor-Transistor Logic Older, fast, uses 5V, bipolar transistors
CMOS Complementary MOS Low power, modern, in all phones/computers
ECL Emitter Coupled Logic Extremely fast, high power, used in supercomputers

16. Quine-McCluskey Simplification

Q: What is the Quine-McCluskey Method?
Quine-McCluskey (QM) is a tabular (table-based) method to simplify Boolean expressions. It is an
alternative to K-Maps and works for ANY number of variables. A computer can use it automatically.

Feature K-Map Quine-McCluskey

Method Visual grid Table / algorithm
Best for Up to 4 variables 5+ variables
Done by computer? Hard Yes, easily
Guarantees minimum? Yes Yes
Feature K-Map Quine-McCluskey
Error-prone? Easy to miss groups Systematic, less error

Steps:
15. List all minterms where output = 1
16. Group them by the number of 1-bits in their binary code
17. Compare adjacent groups and combine terms differing by only one bit (mark with a dash)
18. Repeat until no more combinations are possible
19. Remaining uncombined terms form the minimal Boolean expression
Quick Reference — All Topics
# Topic One-Line Summary
1 Digital vs Analogue Digital = 0 or 1 only. Analogue = continuous values.
2 Signed Binary MSB = sign bit. 0 = positive, 1 = negative. Use 2s complement.
3 BCD Code Each decimal digit stored as 4-bit binary (0=0000, 9=1001).
4 Gray Code Only 1 bit changes between consecutive values. Reduces errors.
5 Excess-3 Code BCD + 3. Self-complementing. Helps in subtraction.
6 ASCII 7-bit code for all keyboard characters (128 total).
7 Extended ASCII 8-bit ASCII. 256 characters including special symbols.
8 Boolean Algebra Maths using only 0 and 1. Used to simplify logic circuits.
9 De Morgan's Theorem (AB)'=A'+B' and (A+B)'=A'.B'. Break bar, change sign.
1 SOP / POS SOP=OR of AND terms (minterms). POS=AND of OR terms (maxterms).
0
1 Minterms AND terms where output=1. Used in SOP. Symbol: m0, m1...
1
1 Maxterms OR terms where output=0. Used in POS. Symbol: M0, M1...
2
1 3-Variable K-Map 8-cell grid to simplify 3-variable Boolean expressions.
3
1 4-Variable K-Map 16-cell grid to simplify 4-variable Boolean expressions.
4
1 AND Gate Output 1 only when ALL inputs are 1.
5
1 OR Gate Output 1 when ANY input is 1.
6
1 NOT Gate Flips the input. 0 becomes 1, 1 becomes 0.
7
1 NAND Gate Opposite of AND. Universal gate.
8
1 NOR Gate Opposite of OR. Universal gate.
9
2 XOR Gate Output 1 when inputs are DIFFERENT.
0
2 XNOR Gate Output 1 when inputs are SAME.
1
2 Even Parity Add parity bit so total 1s in data are EVEN.
2
2 Odd Parity Add parity bit so total 1s in data are ODD.
3
2 Combinational Circuit Output depends only on current inputs. No memory.
# Topic One-Line Summary
4
2 Sequential Circuit Output depends on current inputs + past state. Has memory.
5
2 Half Adder Adds 2 bits. Gives Sum and Carry. No carry-in.
6
2 Full Adder Adds 3 bits (A+B+Cin). Gives Sum and Carry. Chain-able.
7
2 Parallel Binary Adder Multiple Full Adders chained to add multi-bit numbers.
8
2 BCD Adder Adds BCD digits. Adds correction of 6 if result exceeds 9.
9
3 Carry Propagation Each adder waits for carry from previous one. Causes delay.
0
3 Binary Decoder N inputs activate one of 2^N outputs.
1
3 MSI Decoder Ready-made decoder chip (e.g., 74HC138 — 3-to-8 decoder).
2
3 BCD to Decimal Decoder 4-bit BCD input activates one of 10 decimal outputs.
3
3 7-Segment Decoder BCD input drives 7-segment display to show digit 0-9.
4
3 Primary Encoder Basic encoder. One input at a time only.
5
3 Priority Encoder Smart encoder. Picks highest priority when multiple inputs active.
6
3 Decimal to BCD Encoder Press 0-9 button, output = 4-bit BCD code.
7
3 Multiplexer (MUX) Many inputs, one output. Select lines pick which input passes.
8
3 MUX Applications Data routing, phone networks, memory addressing, serial data.
9
4 Comparator Compares A and B. Gives A>B, A=B, A<B outputs.
0
4 16-bit ALU Four 4-bit ALUs joined together for 16-bit arithmetic and logic.
1
4 IC Technologies SSI/MSI/LSI/VLSI = levels of chip integration.
2
4 Quine-McCluskey Table method to simplify Boolean expressions. Works for any variable
3 count.

Best of luck in CS302! You've got this.

Virtual University of Pakistan - CS302 Digital Logic Design