The 8085 Microprocessor: A
Comprehensive Overview
The Intel 8085 is an 8-bit microprocessor introduced by Intel in 1976. It was a popular and
widely used processor in the 1980s, especially in educational settings, due to its simplicity and
the ability to build a minimal system with a few support chips. It is a refinement of its
predecessor, the 8080, offering better integration and a simpler hardware design.
Key Features
● 8-bit Processor: It can process 8 bits of data at a time.
● 16-bit Address Bus: This allows it to address 2^{16} or 64 KB of memory locations.
● 40-Pin DIP: The processor is packaged in a 40-pin Dual Inline Package.
● Multiplexed Address/Data Bus: The lower 8 bits of the address bus (A0-A7) and the
8-bit data bus (D0-D7) are multiplexed on the same pins (AD0-AD7) to reduce the pin
count.
● Single Power Supply: It requires a single +5V power supply, which simplified system
design compared to the 8080 which needed three different power supplies.
● Internal Clock Generator: An external crystal or RC network can be connected to the X1
and X2 pins, and an internal circuit generates the clock signal.
● Interrupts: It has a robust interrupt system with five interrupt pins: TRAP, RST 7.5, RST
6.5, RST 5.5, and INTR.
Architecture
The internal architecture of the 8085 is composed of several functional units that work together
to execute instructions.
● Arithmetic and Logic Unit (ALU): This is the core of the processor, performing
arithmetic operations (addition, subtraction, increment, decrement) and logical operations
(AND, OR, XOR, NOT).
● Registers: The 8085 has a set of registers for temporary data storage and program
control.
○ Accumulator (A): An 8-bit register used to store one of the operands for most
arithmetic and logical operations. The result is also stored in the accumulator.
○ General Purpose Registers (B, C, D, E, H, L): Six 8-bit registers that can be used
as individual registers or combined into three 16-bit register pairs: BC, DE, and HL.
The HL pair is often used as a memory pointer.
○ Program Counter (PC): A 16-bit register that holds the address of the next
instruction to be fetched from memory. It is automatically incremented after each
instruction fetch.
○ Stack Pointer (SP): A 16-bit register that points to the current top of the stack in
memory. The stack is used for temporary data storage and for managing subroutine
calls and returns.
○ Flag Register: An 8-bit register where 5 bits are used to store status flags (Sign,
Zero, Auxiliary Carry, Parity, Carry) that reflect the result of an ALU operation.
● Instruction Register and Decoder: The Instruction Register temporarily holds the
instruction fetched from memory. The Instruction Decoder then decodes the instruction to
determine what operation needs to be performed.
● Timing and Control Unit: This unit generates the timing and control signals required for
all internal and external operations of the microprocessor. It manages the flow of data
between the various components.
Pin Diagram
The 8085 microprocessor has 40 pins, each with a specific function. They can be broadly
classified into different groups.
Pin Number(s) Pin Name Type Function
1, 2 X1, X2 Input These pins are
connected to a crystal
or RC network to
provide the clock
signal.
40 V\_{CC} Power +5V power supply.
20 V\_{SS} Power Ground reference.
37 CLK OUT Output Provides a system
clock signal that can be
used to synchronize
other devices.
30 ALE Output Address Latch
Enable. A
positive-going pulse
that indicates that the
multiplexed AD0-AD7
lines are carrying the
lower-order address.
31, 32 WR̅, RD̅ Output Write and Read control
signals. Active low
signals to control
memory or I/O
read/write operations.
34 IO/M̅ Output A status signal that
distinguishes between
I/O (high) and memory
(low) operations.
29, 33 S0, S1 Output Status signals that
indicate the type of
machine cycle (e.g.,
Opcode Fetch, Memory
Read, Memory Write).
12-19 AD0-AD7 Bi-Dir Multiplexed
Address/Data Bus.
Pin Number(s) Pin Name Type Function
These pins carry the
lower 8 bits of the
address during the first
clock cycle and data in
subsequent cycles.
21-28 A8-A15 Output The higher 8 bits of the
address bus. These
lines are not
multiplexed.
6 TRAP Input A non-maskable,
highest priority
interrupt.
7, 8, 9 RST 7.5, 6.5, 5.5 Input Restart Interrupts.
These are vectored,
maskable interrupts
with predefined vector
addresses.
10 INTR Input General-purpose
interrupt request. It is
non-vectored and
maskable.
11 INTA̅ Output Interrupt
Acknowledge. An
active-low signal that
acknowledges an
interrupt request on the
INTR pin.
38, 39 HOLD, HLDA Input/Output Hold and Hold
Acknowledge. These
signals are used for
Direct Memory Access
(DMA).
35 READY Input Used to synchronize
the microprocessor with
slower peripheral
devices. The processor
waits if this pin is low.
36 RESET IN̅ Input Resets the PC to
0000H and resets all
other registers when
this pin is pulled low.
3 RESET OUT Output Indicates that the
microprocessor is being
reset.
4, 5 SID, SOD Input/Output Serial Input Data and
Serial Output Data.
Pin Number(s) Pin Name Type Function
These are for serial
communication.
Addressing Modes
The 8085 supports five main addressing modes to specify the location of the data (operand) for
an instruction.
1. Immediate Addressing: The data itself is provided in the instruction.
○ Example: MVI A, 32H (Move the value 32H into the Accumulator).
2. Register Addressing: The operand is a register.
○ Example: MOV B, C (Move the contents of register C to register B).
3. Direct Addressing: The address of the operand is explicitly specified in the instruction.
○ Example: LDA 2050H (Load the data from memory location 2050H into the
Accumulator).
4. Register Indirect Addressing: The address of the operand is specified by a register pair
(usually the HL pair).
○ Example: MOV A, M (Move the contents of the memory location pointed to by the
HL pair into the Accumulator).
5. Implied/Implicit Addressing: The operand is implicitly defined by the opcode itself. No
operand is required in the instruction.
○ Example: CMA (Complement the Accumulator's contents). RAL (Rotate the
Accumulator left).
Instruction Set
The instruction set of the 8085 is classified into five functional groups:
1. Data Transfer Instructions: Instructions that move data between registers, memory, and
I/O ports without affecting the original data. Examples include MOV, MVI, LDA, STA, LXI,
XCHG.
2. Arithmetic Instructions: Instructions that perform arithmetic operations like addition,
subtraction, increment, and decrement. Examples include ADD, ADI, SUB, SUI, INR,
DCR.
3. Logical Instructions: Instructions that perform logical operations such as AND, OR,
XOR, compare, and rotate. Examples include ANA, ORA, XRA, CMP, RAR, RAL.
4. Branch Instructions: Instructions that change the sequence of program execution, either
conditionally or unconditionally. Examples include JMP, CALL, RET, JNZ, JC.
5. Stack, I/O, and Machine Control Instructions: Instructions that deal with the stack, I/O
operations, and control the CPU. Examples include PUSH, POP, IN, OUT, HLT, NOP.