Heaven’s Light is Our Guide
Rajshahi University of Engineering & Technology
Department of Electronics & Telecommunication Engineering
ETE 3112 : Sessional Based on ETE 3111
Experiment No. 10
Experimental Study of BCH Encoder and Decoder.
Submitted by: Submitted to:
Talha Mahmud Siam Sharaf Tasnim
Roll: 2204007 Assistant Professor
Session: 2022-23 Dept. of ETE, RUET
Date of Experiment : 27/4/2026
Date of Submission : 09/06/2026
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Experiment No : 10
Experiment Name: Experimental Study of BCH Encoder and Decoder.
Objective:
• To grasp the foundational principles and theoretical concepts governing Bose–
Chaudhuri–Hocquenghem (BCH) codes.
• To analyze the operational mechanics of BCH encoding and decoding circuitry.
• To experimentally validate the error-detecting and error-correcting performance
of BCH codes through practical observation
Theory:
BCH Coding Technique
Bose–Chaudhuri–Hocquenghem (BCH) codes represent a robust class of binary cyclic error-
correcting codes engineered to handle multiple random bit errors. Developed using the algebraic
frameworks of finite field theory (specifically Galois Fields), BCH codes are widely deployed
across digital communication systems and storage media where data integrity is non-negotiable.
BCH codes are capable of correcting up to t errors in a codeword of n bits, and are denoted as:
(n, k, t )
Where:
• n = total number of bits in the codeword,
• k = number of message bits,
• t = number of correctable errors.
For a BCH code operating over the Galois Field GF(2^m), the maximum allowable codeword
length is determined by the formula:
n = 2m − 1
BCH Encoder
The encoding mechanism converts a k-bit message polynomial, m(x, into an expanded n-bit
codeword polynomial, $c(x)$, by factoring in a specific generator polynomial, g(x).
The encoded codeword is obtained by:
c(x) = m(x) · xn−k +r (x)
Where r (x) is the remainder when m(x) · xn−k is divided by g (x). The parity-check bits, represented
by r(x), are computed as the remainder of the shifted message polynomial divided by the generator
polynomial:
r(x) = [m(x) . x^{n-k}] mod(g(x))
Generator Polynomial
The generator polynomial g(x) dictates the code's error-correcting boundaries. It is built over
GF(2^m) as the Least Common Multiple (LCM) of a sequence of minimal polynomials:
2
g (x) = LCM(φ1(x), φ 2 (x),..., φ2t (x))
Here, φi(x) represents the minimal polynomial of the field element αi where α acts as the
primitive element of the field GF(2^m).
BCH Decoder
The decoder reverses the encoding process and corrects errors in the received word. The main
steps include:
[Link] Calculation: Compute syndromes S1, S2, . . . , S2t using:
S j = r (αj ), j = 1, 2,..., 2t
where r (x) is the received polynomial.
b. Error Locator Polynomial: Compute the error locator polynomial 𝜆(𝑥) using the
Berlekamp-Massey algorithm.
[Link] Error Locations: With 𝜆(𝑥) established, the decoder must find its mathematical roots,
which point directly to the corrupted bit positions. The Chien Search algorithm is used to
systematically test field elements and identify these roots.
d. Error Correction: Flip the bits at the identified error positions to recover the correct
codeword.
Figure 10.1: Block diagram of BCH encoding and decoding process
Required Appratus:
• DCS61 BCH encoder and decoder trainer kit.
• Digital pattern generator.
• Oscilloscope or logic analyzer.
• Power supply.
• Connecting wires.
3
Experimental Setup
Figure 10.2: Experimental Setup of BCH Encoder and Decoder
Output BCH Encoder:
Data Input Parity Bits Codewords
D0 D1 D2 D3 C0 C1 C2 D3D2D1C2D0C1C0
0 0 0 0 0 0 0 0000000
0 0 0 1 1 1 1 1001011
0 0 1 0 0 1 1 0101010
0 0 1 1 1 0 0 1100001
0 1 0 0 1 0 1 0011001
0 1 0 1 0 1 0 1010010
0 1 1 0 1 1 0 0110011
0 1 1 1 0 0 1 1111000
1 0 0 0 1 1 0 0000111
1 0 0 1 0 0 1 1001100
1 0 1 0 1 0 1 0101101
1 0 1 1 0 1 0 1100110
1 1 0 0 0 1 1 0011110
1 1 0 1 1 0 0 1010101
1 1 1 0 0 0 0 0110100
1 1 1 1 1 1 1 1111111
Table 10.1: Data input, parity bits, and corresponding BCH codewords
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BCH Decoder
Decoder Input State Output
B6 B5 B4 B3 B2 B1 B0 Decision
0 0 0 0 0 0 0 0
0 0 0 0 0 0 1 0
0 0 0 0 0 1 0 1
0 0 0 0 1 1 1 1
0 0 0 1 0 0 0 1
0 0 1 1 1 0 0 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
0 1 0 1 1 0 1 0
0 1 1 0 0 1 1 0
0 1 1 0 1 0 0 1
0 1 1 0 1 1 0 1
1 1 0 0 1 1 0 0
1 1 1 0 0 0 0 0
1 1 1 1 1 1 1 1
Table 10.2: BCH decoder experimental test results mapping input states to decisions
Discussion & conclusion:
The experiment successfully validated a (7, 4) BCH code, which appends 3 parity bits to
a 4-bit message. To evaluate performance, channel noise was simulated via manual bit
flips.
• Single-Bit Errors: The decoder calculated a 3-bit syndrome, identified the error
location, and perfectly restored the original data using an XOR operation.
• Double-Bit Errors: Because the code has a strict correction limit of t = 1, introducing
two errors caused decoding failure. This resulted in miscorrections or undetected
faults, as the errors exceeded the code's minimum distance boundaries.
This experiment demonstrates that while increasing codeword length and redundancy directly
enhances error-control capabilities, the BCH architecture provides a highly flexible and
mathematically rigorous framework. Its scalability makes it essential for maintaining data integrity
in critical digital applications, such as flash memory and satellite communications.