VLSI Technology
Uploaded by
Bhanu Pratap Singh BanaiVLSI Technology
Uploaded by
Bhanu Pratap Singh BanaiVLSI Technology: MEC402
SYLLABUS
Subject Title of the Course Credits Course Prerequisit
Code Structur e
e
MEC402 VLSI Technology 4 L-T-P Hardware
3-1-0 fundamentals
, Logic design
COURSE OUTCOMES (CO)
After completing the course, the students should be able to:
CO1: Understand the fundamental classifications of ICs and articulate the processes of
crystal growth, wafer preparation, and epitaxy.
CO2: Explain the theoretical and practical aspects of oxidation, lithography, and etching
in pattern transfer.
CO3: Analyze the mechanisms, equipment, and mathematical models of diffusion and ion
implantation for doping substrates.
CO4: Evaluate various thick/thin film deposition methods and solve physical vapour
deposition and metallization patterning issues.
CO5: Integrate individual fabrication steps to outline the complete process flow for
NMOS, CMOS, and BJT devices, alongside final packaging techniques.
Unit
No. Topics
Unit 1 Fundamentals of VLSI and Substrate Preparation
Introduction to VLSI Technology: Classification of ICs, features of ICs,
monolithic and hybrid ICs.
Crystal Growth and Wafer Preparation: Silicon Crystal Growth from the melt,
Crystal Orientations, Various defects in Crystal, Wafer Preparation, and Wafer
Specifications.
Epitaxy: Epitaxy and its concepts, growth kinetics of epitaxy, vapour phase
epitaxy, molecular beam epitaxy.
Unit 2 Oxidation and Patterning
Oxidation: Theory of growth of silicon dioxide layer, calculation of SiO2
thickness and oxidation kinetics.
Lithography: Photolithography and pattern transfer, optical and electron
photolithography, X-ray and ion beam lithography. photoresist, types of
photoresists.
Etching: Dry & wet etching.
Unit 3 Doping Technologies
Diffusion Process: Diffusion in solids, diffusion equation and diffusion
mechanisms.
Ion Implantation: Implantation equipment’s, high energy implantation, scattering
phenomenon, range of implanted ions, implantation damage, annealing.
Unit 4 Deposition and Interconnects
Film Deposition: Thick and thin film deposition.
Metallization: Metallization applications, Metallization Choices, Physical Vapour
Deposition, Patterning & Problems in Metallization.
.
Unit 5 Device Integration and Packaging
VLSI Process Integration: NMOS, CMOS, BJT.
Assembly and Packaging: Assembly Techniques, Packing of VLSI Devices.
Suggested Readings:
1. 1. S. K. Gandhi, “VLSI Fabrication Principles”, John Wiley Inc.
2. 2. S. M. Sze, “VLSI Technology”, McGraw Hill.
3. 3. C.Y. Chang and S. M. Sze, “ULSI Technology”, McGraw Hill.
4. 4. James D. Plummer, “Silicon VLSI Technology: Fundamentals, Practice and Modelling”,
Pearson Education.
CO-PO & CO-PSO MAPPING TABLE
CO\PO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PSO1 PSO2 PSO3
CO1 3 1 - - - - 1 - - - - 2 2 1
CO2 3 2 1 - - - 2 - - - - 2 2 1
CO3 3 3 2 1 1 - - - - - - 2 3 1
CO4 3 2 2 1 1 - 1 - - - - 2 2 1
CO5 3 3 3 2 2 - - - - - - 3 3 2