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Chapter 01

Chapter 1 of 'Computer Organization and Design' discusses the evolution of computer technology, highlighting the impact of domain-specific accelerators and the prevalence of computers in various applications. It categorizes computers into personal computers, servers, and embedded systems, and introduces the concept of the PostPC era with personal mobile devices and cloud computing. The chapter also covers performance metrics, the importance of abstraction in design, and the components and technologies that underpin modern computer architecture.

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0% found this document useful (0 votes)
3 views52 pages

Chapter 01

Chapter 1 of 'Computer Organization and Design' discusses the evolution of computer technology, highlighting the impact of domain-specific accelerators and the prevalence of computers in various applications. It categorizes computers into personal computers, servers, and embedded systems, and introduces the concept of the PostPC era with personal mobile devices and cloud computing. The chapter also covers performance metrics, the importance of abstraction in design, and the components and technologies that underpin modern computer architecture.

Uploaded by

fdaeafdffe
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd

COMPUTER ORGANIZATION AND DESIGN

The Hardware/Software Interface 6th


Edition

Chapter 1
Computer Abstractions
and Technology
§1.1 Introduction
The Computer Revolution
 Progress in computer technology
 Underpinned by domain-specific accelerators
 Makes novel applications feasible
 Computers in automobiles
 Cell phones
 Human genome project
 World Wide Web
 Search Engines
 Computers are pervasive

Chapter 1 — Computer Abstractions and Technology — 2


Classes of Computers
 Personal computers (PCs) A computer designed for use by an individual, usually
incorporating a graphics display, a keyboard, and a mouse
 Delivery of good performance to single users at low cost, a general
purpose computer
 Subject to cost/performance tradeoff
A computer used for running larger programs for multiple users, often
 Servers simultaneously, and typically accessed only via a network
 Network based and much larger computers for High capacity,
performance, and reliability
 Widest range in cost and capability
 Low-end servers for file storage vs. High-end servers (or supercomputers)
for scientific and engineering calculations
 Embedded computers A computer inside another device used for running one
predetermined application or collection of software
 Hidden as components of a system
 Stringent energy/performance/cost constraints and lower tolerance
for failure

Chapter 1 — Computer Abstractions and Technology — 3


The Trend of PostPC Era

Chapter 1 — Computer Abstractions and Technology — 4


The PostPC Era
 Personal Mobile Device (PMD)
 Battery operated 電腦基本架構

 Connects to the Internet Processor data


指令

 Hundreds of US dollars Memory


datapath

 Smart phones and tablets control

 Electronic glasses, AR/VR output

 Cloud computing input

 Warehouse Scale Computers (WSC)


 Amazon, google, ….

 Software as a Service (SaaS)


 Portion of software run on a PMD and a portion run in the Cloud

Chapter 1 — Computer Abstractions and Technology — 5


Understanding Performance
 Algorithm ⽤high level language 來描述

 Determine number of operations executed

 Programming language, compiler, and architecture


 Determine number of machine instructions executed per
algorithm/operation

 Processor and memory system


 Determine how fast instructions are executed

 I/O system (hardware and operating system (OS))


 Determine how fast I/O operations are executed

Chapter 1 — Computer Abstractions and Technology — 6


§1.2 Eight Great Ideas in Computer Architecture
Seven Great Ideas in CA
現今⼤約已經極限

 Design for Moore’s Law (1965)

 Use abstraction to simplify design

 Make the common case fast


分⼯處理(parallel)

 Performance via parallelism


單⼀測試所需時間相同 但
效能相關 分段執⾏(overlap)
效能效率提升

 Performance via pipelining

 Performance via prediction

 Hierarchy of memories

 Dependability via redundancy

Chapter 1 — Computer Abstractions and Technology — 7


§1.3 Below Your Program
Hierarchy Layers in HW/SW
 Application software
 Written in high-level language (HLL)
 System software
 Compiler:
 Translate HLL code to machine code
進⾏資源的控管
 Operating System: service code
 Handling basic input/output
 Allocating memory and storage
 Scheduling tasks & protected sharing
resources
 Hardware
 Processor, memory, I/O controllers

Chapter 1 — Computer Abstractions and Technology — 8


Levels of Program Code
 High-level language
 Level of abstraction closer to
problem domain

 Provide for productivity and


portability

 Assembly language
 Textual representation of
instructions

 Machine language
 Encoded instructions and data in
binary digits (bits)

Chapter 1 — Computer Abstractions and Technology — 9


§1.4 Under the Covers
Components of a Computer
The BIG Picture  Same components for
all kinds of computer/processor
 Inputting/outputting data, processing
data, and storing data

 Input/output includes
 User-interface devices
 Display, keyboard, mouse

 Storage devices
 Hard disk, CD/DVD, flash

 Network adapters
 For communicating with other computers
Input, output, control, datapath, and memory

Chapter 1 — Computer Abstractions and Technology — 10


Touchscreen
 PostPC device

 Supersedes keyboard and


mouse

 Resistive and Capacitive


types
 Most tablets, smart phones iPhone XS Max
use capacitive

 Capacitive allows multiple


touches simultaneously

Chapter 1 — Computer Abstractions and Technology — 11


Through the Looking Glass
Liquid Crystal Display

 LCD screen: picture elements (pixels)


 Mirrors content of frame buffer memory

Chapter 1 — Computer Abstractions and Technology — 12


Opening the Box Apple iPhone XS Max

Capacitive multitouch LCD screen

Logic board

Chapter 1 — Computer Abstractions and Technology — 13


Inside the Processor CPU/MCU:設計來控制 有如⼤腦
DSP/GPU:處理⼤量資料的運算 有如四肢

CPU Central Processor Unit


 Apple A12 RAM Random Access Memory

Chapter 1 — Computer Abstractions and Technology — 14


Inside the Processor (CPU)
 Datapath: performs arithmetic operations on data
 Control: tells datapath, memory, and I/O devices
what to do according to the wishes of the
The storage area in which programs are kept when they are
instruction running and that contains the data needed by the running
(main memory) programs
 Memory: data memory and instruction memory
 DRAM (dynamic random access memory)
main memory與processor之間的暫存memory空間
 Cache memory 為main memory的⼦集合
 Small fast SRAM memory for immediate access to
Static random access memory
data

Chapter 1 — Computer Abstractions and Technology — 15


Abstractions
The BIG Picture
 Abstraction helps us deal with complexity
指令數較多
 Hide lower-level detail
 Instruction set architecture (ISA)
指令數較少
比較依靠complier
 The hardware/software interface
 Application binary interface (ABI)
 The ISA plus system software interface
 Implementation
 The details underlying and interface

Chapter 1 — Computer Abstractions and Technology — 16


A Safe Place for Data
 Volatile main memory
 Loses instructions and data when power off
 Non-volatile secondary memory
 Magnetic disk
 Flash memory
 Optical disk (CDROM, DVD)

Chapter 1 — Computer Abstractions and Technology — 17


Networks (Communicating with Others)
 Communication, resource sharing, nonlocal access
 Local area network (LAN): Ethernet
 Wide area network (WAN): the Internet
 Wireless network: WiFi, Bluetooth

Chapter 1 — Computer Abstractions and Technology — 18


§1.5 Technologies for Building Processors and Memory
Technology Trends
 Electronics
technology
continues to evolve
 Increased capacity
and performance
 Reduced cost DRAM capacity

Year Technology Relative performance/cost


1951 Vacuum tube 1
1965 Transistor 35
1975 Integrated circuit (IC) 900
1995 Very large-scale IC (VLSI) 2,400,000
2013 Ultra large-scale IC 250,000,000,000
2020 Ultra large-scale IC 500,000,000,000

Chapter 1 — Computer Abstractions and Technology — 19


Chip Manufacturing Process
wafer: a slice from a silicon ingot no more than 0.1 inches thick,
used to create chip

die: the individual rectangular sections that are cut from a wafer,
more informally known as chips

 Yield: proportion of working dies per wafer


The percentage of good dies from the total number of dies on the wafer
defect: a microscopic flaw in a wafer or in patterning steps that can
result in the failure of the die containing that defect
Chapter 1 — Computer Abstractions and Technology — 20
10th Gen Intel Core Wafer

Ice Lake

 300mm (12 inch) wafer, 506 chips, 10 nm technology

 Each Ice Lake die is 11.4 x 10.7 mm2

Chapter 1 — Computer Abstractions and Technology — 21


Cost of a Chip Includes ...
 Die cost

 affected by wafer cost, number of dies per wafer, and


die yield (#good dies / #total dies)

 goes roughly with the cube of the die area

 Testing cost

 Packaging cost (depend on die cost,有幾個die就有幾個package)

 depends on pins, heat dissipation, ...

Chapter 1 — Computer Abstractions and Technology — 22


Cost of an IC
 A wafer is tested and chopped into dies
Cwafer 此項由製造公司決定

Cdie 
Die per wafer  Die yield
設計者僅能決定此項

  ( Wafer diameter/2 )2   Wafer diameter


Die per wafer  
Approximation Die area 2  Die area

 The die is still tested and packaged into IC

Cdie  Ctestingdie  Cpackagingand final test


CIC 
Final test yield

Chapter 1 — Computer Abstractions and Technology — 23


Three Equations for IC Cost
Cost per wafer
Cost per die  Exactly derived eq.
Dies per wafer  Yield
Dies per wafer  Wafer area Die area Approximation eq.

1
Yield  Statistical eq.
(1 (Defects per area  Die area/2)) 2

 Nonlinear relation to area and defect rate


 Wafer cost and area are fixed
 Defect rate determined by manufacturing process
 Die area determined by architecture and circuit design

Chapter 1 — Computer Abstractions and Technology — 24


§1.6 Performance
Defining Performance
 Which airplane has the best performance?

Chapter 1 — Computer Abstractions and Technology — 25


Response Time and Throughput
 Response time (aka execution time) 越⼩越好
The total time required for the computer to complete a
task, including disk accesses, memory accesses, I/O
 How long it takes to do a task activities, operating system overhead, CPU execution
time, and so on
 Throughput (aka bandwidth) 越⼤越好

 Total work done per unit time

 PMDs are more focused on response time, while servers are


more focused on throughput.
 Example: How are response time and throughput affected by
 Replacing the processor with a faster version?
 Adding more processors?

 We’ll focus on response time for now…

Chapter 1 — Computer Abstractions and Technology — 26


Relative Performance
 Define Performance = 1/Execution Time

 “X is n time faster than Y”


Performanc e X Performanc e Y
 Execution time Y Execution time X  n

 Example: time taken to run a program

 10s on A, 15s on B

 Execution TimeB / Execution TimeA


= 15s / 10s = 1.5

 So A is 1.5 times faster than B

Chapter 1 — Computer Abstractions and Technology — 27


Measuring Execution Time
 Elapsed time
 Total response time, including all aspects
 Processing, I/O, OS overhead, idle time, …
 Determines system performance
 CPU time (CPU execution time)

 Time spent by CPU for processing a given job


 Discounts I/O time, other jobs’ shares
 Comprises user CPU time and system CPU time
 User CPU time: the CPU time spent in a program itself
 System CPU time: the CPU time spent in OS performing tasks
on behalf of the program
 Different programs are affected differently by CPU and
system performance

Chapter 1 — Computer Abstractions and Technology — 28


Execution Time and CPU Clocking
 Operation of digital hardware governed by a constant-rate
clock
Clock period

Clock (cycles)

Data transfer
and computation
Update state

由IC製造者決定

 Clock period: duration of a clock cycle


 e.g., 250ps = 0.25ns = 250×10–12s
 Clock frequency (rate): cycles per second
 e.g., 4.0GHz = 4000MHz = 4.0×109Hz

Chapter 1 — Computer Abstractions and Technology — 29


CPU Time
數 量

CPU Time  CPU Clock Cycles  Clock Cycle Time


CPU Clock Cycles

Clock Rate
 Performance improved by CPU time 越⼩越好 因此CPU clock cycles與clock
cycle time皆越低越好 但CPU clock cycles較難降低
所以以提⾼clock rate 作為相對應的措施

 Reducing number of clock cycles (or cycle count)


 Increasing clock rate
 Hardware designer must often trade off clock rate
against cycle count

Chapter 1 — Computer Abstractions and Technology — 30


CPU Time Example
 Computer A: 2GHz clock, 10s CPU time
 Designing Computer B
 Aim for 6s CPU time
 Can do faster clock, but causes 1.2 × clock cycles
 How fast must Computer B clock be?
Clock CyclesB 1.2  Clock Cycles A
Clock Rate B  
CPU Time B 6s
Clock Cycles A  CPU Time A  Clock Rate A
 10s  2GHz  20  10 9
1.2  20  10 9 24  10 9
Clock Rate B    4GHz
6s 6s
Chapter 1 — Computer Abstractions and Technology — 31
Instruction Count and CPI
Clock Cycles  Instructio n Count  Cycles per Instructio n
CPU Time  Instructio n Count  CPI  Clock Cycle Time
Instructio n Count  CPI

Clock Rate
 Instruction Count for a program
 Determined by program, ISA, and compiler
 Average cycles per instruction
 Determined by CPU hardware
 If different instructions have different CPI
 Average CPI affected by instruction mix

Chapter 1 — Computer Abstractions and Technology — 32


CPI Example
 Computer A: Cycle Time = 250ps, CPI = 2.0
 Computer B: Cycle Time = 500ps, CPI = 1.2
 Same ISA
 Which is faster, and by how much?
CPU Time  Instructio n Count  CPI  Cycle Time
A A A
 I  2.0  250ps  I  500ps A is faster…
CPU Time  Instructio n Count  CPI  Cycle Time
B B B
 I  1.2  500ps  I  600ps

B  I  600ps  1.2
CPU Time
…by this much
CPU Time I  500ps
A
Chapter 1 — Computer Abstractions and Technology — 33
CPI in More Detail
 If different instruction classes take different
numbers of cycles
 Average CPI affected by instruction mix
n
Clock Cycles   (CPIi  Instructio n Count i )
i1

 Weighted average CPI

Clock Cycles n
 Instructio n Count i 
CPI     CPIi  
Instructio n Count i1  Instructio n Count 

Relative frequency

Chapter 1 — Computer Abstractions and Technology — 34


CPI Example
 Alternative compiled code sequences using
instructions in classes A, B, C

Class A B C
CPI for class 1 2 3
IC in sequence 1 2 1 2
IC in sequence 2 4 1 1

 Sequence 1: IC = 5  Sequence 2: IC = 6
 Clock Cycles  Clock Cycles
= 2×1 + 1×2 + 2×3 = 4×1 + 1×2 + 1×3
= 10 =9
 Avg. CPI = 10/5 = 2.0  Avg. CPI = 9/6 = 1.5
Chapter 1 — Computer Abstractions and Technology — 35
Performance Summary
The BIG Picture

Instructio ns Clock cycles Seconds


CPU Time   
Program Instructio n Clock cycle

 Performance depends on
 Algorithm: affects IC, possibly CPI
 Programming language: affects IC, CPI
 Compiler: affects IC, CPI
 Instruction set architecture: affects IC, CPI, Tc

Chapter 1 — Computer Abstractions and Technology — 36


§1.7 The Power Wall
Clock Rate and Power Trends

 In CMOS IC technology
1
Power   Capacitive load  Voltage 2  Frequency
2
×30 5V → 1V ×1000

Chapter 1 — Computer Abstractions and Technology — 37


Reducing Power
 Suppose a new CPU has
 85% of capacitive load of old CPU
 15% voltage and 15% frequency reduction
Pnew Cold  0.85  (Vold  0.85) 2  Fold  0.85
  0.85 4
 0.52
Cold  Vold  Fold
2
Pold

 The power wall


 We can’t reduce voltage further
 We can’t remove more heat
 How else can we improve performance?
Chapter 1 — Computer Abstractions and Technology — 38
§1.8 The Sea Change: The Switch to Multiprocessors
Uniprocessor Performance

Constrained by power, instruction-level parallelism,


memory latency

Chapter 1 — Computer Abstractions and Technology — 39


Multiprocessors
 Multicore microprocessors
 More than one processor per chip
 Requires explicitly parallel programming
 Compare with instruction level parallelism
 Hardware executes multiple instructions at once
 Hidden from the programmer
 Hard to do
 Programming for performance
 Load balancing
 Optimizing communication and synchronization

Chapter 1 — Computer Abstractions and Technology — 40


測試硬體程式

SPEC CPU Benchmark


 Benchmark: Programs used to measure performance
 Supposedly typical of actual workload
 Standard Performance Evaluation Corp (SPEC)
 Develops benchmarks for CPU, I/O, Web, …

 SPEC CPU2017
 Elapsed time to execute a selection of programs
 Negligible I/O, so focuses on CPU performance
 Normalize relative to reference machine
 Summarize as geometric mean of performance ratios
 10 INT benchmarks (SPECspeed 2017 Integer) and 13 FP benchmarks (SPECspeed
2017 Floating Point)

n
n
 Execution time ratio
i1
i

Chapter 1 — Computer Abstractions and Technology — 41


Performance Ratio (SPECratio)

ExecutionTimereference
SPECRatioA ExecutionTimeA
e.g. 1.25  
SPECRatioB ExecutionTimereference
ExecutionTimeB
ExecutionTimeB Performance A
 
ExecutionTimeA PerformanceB
 SPECratio is just a ratio rather than an absolute execution time
 Note that when comparing 2 computers as a ratio, execution times on
the reference computer drop out, so choice of reference computer is
irrelevant

Chapter 1 — Computer Abstractions and Technology — 42


SPECspeed 2017 Integer benchmarks on Intel
Xeon E5-2650L

Chapter 1 — Computer Abstractions and Technology — 43


SPEC Power Benchmark
 Power consumption of server at different workload
levels
 Performance: ssj_ops/sec
 Power: Watts (Joules/sec)

 10   10 
overall ssj_ops per watt    ssj_opsi    poweri 
 i0   i0 
server side Java operations per second per watt

Chapter 1 — Computer Abstractions and Technology — 44


SPECpower_ssj2008 for Xeon E5-2650L

Stand by

Chapter 1 — Computer Abstractions and Technology — 45


有關效能的另一個公式
0.5小時

從台北到高雄要多久?

4小時

如果改坐飛機,
台北到高雄只要1小時
全程可以加快多少?
0.5小時
由台北到高雄
 不能enhance的部份為在市區的時間: 0.5 + 0.5 = 1小時
 可以enhance的部份為在高速公路上的4小時
=> 佔總時間的 4/(4+1) = 0.8 = F
 現在改用飛機, 可以enhance的部份縮短為1小時
=> S = 4/1 = 4
 走高速公路所需時間 4 + 1
speedup = ----------------------- = ---------- = 2.5
坐飛機所需時間 1 + 1
 另一種算法 (Amdahl’s Law):
1 1
speedup = ------------------------ = -------------------------
((1 - 0.8) + 0.8/4) (1 – 0.8) + 0.8/4
 When S -> , speedup -> 5

Chapter 1 — Computer Abstractions and Technology — 47


Amdahl's Law
 Speedup due to enhancement E:
Execution Time without E Performance w/ E
Speedup(E)  
Execution Time with E Performance w/o E

 Suppose that enhancement E accelerates a fraction F of the task by


a factor S and the remainder of the task is unaffected then,

F
Execution Time(w/ E)  ((1  F)  )  Execution Time(w/o E)
S
1 1
Speedup(w/ E)  
F S 1  F
(1- F) 
S
F越⼤越好

Chapter 1 — Computer Abstractions and Technology — 48


§1.10 Fallacies and Pitfalls
Pitfall: Amdahl’s Law
 Improving an aspect of a computer and expecting a
proportional improvement in overall performance

Taffected
Timproved   Tunaffected
improvemen t factor

 Example: multiply accounts for 80s/100s


 How much improvement in multiply performance to

get 5× overall?
80  Can’t be done!
20   20
n
 Corollary: make the common case fast

Chapter 1 — Computer Abstractions and Technology — 49


Fallacy: Low utilization use little power ?
 Look back the power benchmark @ Intel Xeon E5-2650L
 At 100% load : 347 W

 At 50% load : 183 W (52%)

 At 10% load : 115 W (33%)

 Google data center


 Mostly operates at 10% – 50% load

 At 100% load less than 1% of the time

 Consider designing processors to make power proportional to


load (or energy-proportional computing).

Chapter 1 — Computer Abstractions and Technology — 50


Pitfall: MIPS as a Performance Metric
 MIPS: Millions of Instructions Per Second
Instructio n count
MIPS 
Execution time  10 6
Instructio n count Clock rate
 
Instructio n count  CPI CPI  10 6
 10 6

Clock rate

 Doesn’t account for


 Differences in ISAs between computers
 Differences in complexity between instructions

 CPI varies between programs on a given CPU


Chapter 1 — Computer Abstractions and Technology — 51
§1.9 Concluding Remarks
Concluding Remarks
 Cost/performance is improving
 Due to underlying technology development
 Hierarchical layers of abstraction
 In both hardware and software
 Instruction set architecture
 The hardware/software interface
 Execution time: the best performance
measure
 Power is a limiting factor
 Use parallelism to improve performance
Chapter 1 — Computer Abstractions and Technology — 52

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