EE4341 Lecture 8 – 2/3/2023

●
Interrupt Example – Core Timer
 Core Timer Example
Illustrate interrupts with an example that uses the
core timer to blink an LED
●
Using XC32
●
Configuring the PIC32MX470
●
Coding interrupts with XC32
●
Accessing CP0 registers
Implement this on a Microchip PIC32MX470
Curiosity Board (DM320103)
 The PIC32 Oscillator
●
The PIC32MX470 can be operated at speeds
up to 120 MHz
●
Configure the example to run at 80 MHz
●
Oscillator is discussed in section 8 of the data
sheet
 Oscillator Configuration
●
Use the the 20 MHz crystal onboard and the PLL in oscillator
●
Oscillator Configuration
POSCMOD and FNOSC in DEVCFG1
FPLLIDIV, FPLLMUL, and FPLLODIV in DEVCFG2

(List of configuration bit setting for the PIC32MX470F512H is

found in docs folder where the XC32 compiler was installed)
PIC32MX330/350/370/430/450/470
FIGURE 8-1: PIC32MX330/350/370/430/450/470 FAMILY CLOCK DIAGRAM

USB PLL(5)
USB Clock (48 MHz)

UFIN
div x PLL x24 div 2
UFRCEN
UFIN 4 MHz UPLLEN
UPLLIDIV<2:0> USBPLL (96 MHz)

REFCLKI ROTRIM<8:0>
POSC (M) OE
FRC
LPRC
SOSC REFCLKO
FPLLI (i.e., FIN)
System PLL PBCLK  2   N + ---------
M 
512
-
4 MHz FIN 5 MHz SYSCLK
FVCO System PLL
div x PLL RODIV<14:0> To SPI
(N)
FPLLIDIV<2:0> ROSEL<3:0>

COSC<2:0> PLLMULT<2:0> FPLL

(001 = FRC, div y
011 = POSC) XTPLL, HSPLL,
ECPLL, FRCPLL

Primary Oscillator PLLODIV<2:0>

(POSC)

C1(3) OSC1 FOSC

Postscaler Peripherals
To Internal POSC (XT, HS, EC)
div x
XTAL RF(2) Logic
PBCLK (TPB)
RP(1)
Enable FRC
RS(1) PBDIV<1:0>
C2(3)
OSC2(4) div 16
div 2 FRC/16
To ADC
CPU and Select Peripherals
FRC
Oscillator Postscaler SYSCLK
8 MHz typical FRCDIV

FRCDIV<2:0>
TUN<5:0>

LPRC
Oscillator 31.25 kHz typical LPRC

Secondary Oscillator (SOSC)

SOSCO 32.768 kHz
SOSC COSC<2:0>
SOSCEN and FSOSCEN
Clock Control Logic
Fail-Safe FSCM INT
SOSCI
Clock
Monitor FSCM Event

NOSC<2:0>
COSC<2:0>
FSCMEN<1:0> OSWEN
WDT, PWRT
Timer1, RTCC

Notes: 1. A series resistor, RS, may be required for AT strip cut crystals or eliminate clipping. Alternately, to increase oscillator circuit gain,
add a parallel resistor, RP, with a value of 1 M
2. The internal feedback resistor, RF, is typically in the range of 2 M to 10 M
3. Refer to Section 6. “Oscillator Configuration” (DS60001112) in the “PIC32 Family Reference Manual” for help in determining the
best oscillator components.
4. PBCLK out is available on the OSC2 pin in certain clock modes.
5. USB PLL is available on PIC32MX4XX devices only.

DS60001185H-page 76  2012-2019 Microchip Technology Inc.

 For the core timer example:
●
Demo board as a 20 MHz crystal for the clock
source
#pragma config POSCMOD=HS, FNOSC=PRIPLL

●
To generate an 80 MHz SYSCLK
#pragma config FPLLIDIV=DIV_4, FPLLMUL=MUL_16, FPLLODIV=DIV_1

( Note the input to the PLL must be between 4 MHz and 5MHz )
 Check this...

1
20 MHz× ×16×1=80 MHz
4

Crystal Frequency Output Divider

Input Divider PLL Multiplier
 TABLE 28-1: DEVCFG: DEVICE CONFIGURATION WORD SUMMARY
DS60001185H-page 264

PIC32MX330/350/370/430/450/470
Virtual Address

Bits

All Resets
Bit Range
(BFC0_#)

Register
Name
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0

31:16 FVBUSONIO FUSBIDIO IOL1WAY PMDL1WAY — — — — — — — — — FSRSSEL<2:0> xxxx

2FF0 DEVCFG3
15:0 USERID<15:0> xxxx
31:16 — — — — — — — — — — — — — FPLLODIV<2:0> xxxx
2FF4 DEVCFG2
15:0 UPLLEN(1) — — — — UPLLIDIV<2:0>(1) — FPLLMUL<2:0> — FPLLIDIV<2:0> xxxx
31:16 — — — — — — FWDTWINSZ<1:0> FWDTEN WINDIS — WDTPS<4:0> xxxx
2FF8 DEVCFG1
15:0 FCKSM<1:0> FPBDIV<1:0> — OSCIOFNC POSCMOD<1:0> IESO — FSOSCEN — — FNOSC<2:0> xxxx
31:16 — — — CP — — — BWP — — — — PWP<7:4> xxxx
2FFC DEVCFG0
15:0 PWP<3:0> — — — — — — — ICESEL<1:0> JTAGEN DEBUG<1:0> xxxx
Legend: x = unknown value on Reset; — = reserved, write as ‘1’. Reset values are shown in hexadecimal.
Note 1: This bit is only available on devices with a USB module.

TABLE 28-2: DEVICE ID, REVISION, AND CONFIGURATION SUMMARY

Virtual Address

Bits

All Resets
Bit Range
(BF80_#)

Register
Name

31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0

31:16 — — — — — — — — — — — — — — — — 0000
F200 CFGCON
15:0 — — IOLOCK PMDLOCK — — — — — — — — JTAGEN TROEN — TDOEN 000B
31:16 VER<3:0> DEVID<27:16> xxxx(1)
F220 DEVID
15:0 DEVID<15:0> xxxx(1)
31:16 0000
F230 SYSKEY SYSKEY<31:0>
15:0 0000
 2012-2019 Microchip Technology Inc.

Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: Reset values are dependent on the device variant.
 Where are the configuration bit
settings?
●
Configuration settings are in
/opt/microchip/xc32/v4.00/docs/config_docs/
[Link]
Installed with the XC32 compiler and has a file for
every PIC32 device ([Link] is
shown)
32-Bit Language Tools Master Index file:///opt/microchip/xc32/v2.10/docs/[Link]

32-Bit Language Tools Master Index

Microchip 32-Bit devices consist of PIC32 microcontrollers (MCUs). Data sheets, application notes and
other documentation concerning these devices may be found at the Microchip website. The language
tools that support these devices are:

MPLAB® XC32 C Compiler

MPLAB® XC32 Assembler (part of compiler)
MPLAB® XC32 Object Linker (part of compiler)
32-Bit Utilities, including MPLAB® XC32 Archiver/Librarian

Documentation for these language tools is described below. Documentation is available in several
formats:

HTML files may be viewed in your web browser window.

CHM (compiled HTML) files may be launched from your browser window. Internet Explorer v5 or
higher is required to view these files. (Components of IE are used to by the Help viewer.)
PDF documents will require the use of the free Adobe Acrobat Reader to view. PDF documentation
may be older than electronic documentation, so view electronic files for the latest information.

32-Bit License Manager

Installing and Licensing MPLAB® XC C Compilers (DS52059) - PDF
MPLAB® XC License Server Manual (DS50002334) - PDF
Release Notes for MPLAB® XC License Server - HTML

32-Bit Language Tools Readme and Reference

Readme File for 32-Bit Language Tools - HTML
Configuration Settings Reference - HTML

32-Bit C Compiler, Assembler and Linker User's

Guides
MPLAB® XC32 C Compiler User's Guide (DS51686) - PDF
MPLAB® XC32 Assembler, Linker and Utilites User's Guide (DS50002186) - PDF

32-Bit Libraries Documentation

32-Bit Standard Libraries and Math Functions for C projects linked with xc32-gcc (DS51685) - PDF
Dinkum® Compleat Standard C and Standard C++ Libraries for C++ projects linked with xc32-g++
- HTML

1 of 1 1/31/21, 12:18 PM
Config-Bit Settings for PIC32MX470F512H file:///opt/microchip/xc32/v2.10/docs/config_docs/32mx4...

[ Documentation Index | Device index ]

Configuration-Bit Settings for

PIC32MX470F512H
(Data Sheet # DS-60001185)

Usage:
#pragma config SETTING = VALUE

USERID
USERID = 00000000 Range is from 0 to 0xffff

FSRSSEL Shadow Register Set Priority Select

FSRSSEL = PRIORITY_0 SRS Priority 0
FSRSSEL = PRIORITY_1 SRS Priority 1
FSRSSEL = PRIORITY_2 SRS Priority 2
FSRSSEL = PRIORITY_3 SRS Priority 3
FSRSSEL = PRIORITY_4 SRS Priority 4
FSRSSEL = PRIORITY_5 SRS Priority 5
FSRSSEL = PRIORITY_6 SRS Priority 6
FSRSSEL = PRIORITY_7 SRS Priority 7

PMDL1WAY Peripheral Module Disable Configuration

PMDL1WAY = ON Allow only one reconfiguration
PMDL1WAY = OFF Allow multiple reconfigurations

IOL1WAY Peripheral Pin Select Configuration

IOL1WAY = ON Allow only one reconfiguration
IOL1WAY = OFF Allow multiple reconfigurations

FUSBIDIO USB USID Selection

FUSBIDIO = OFF Controlled by Port Function
FUSBIDIO = ON Controlled by the USB Module

FVBUSONIO USB VBUS ON Selection

FVBUSONIO = OFF Controlled by Port Function
FVBUSONIO = ON Controlled by USB Module

FPLLIDIV PLL Input Divider

1 of 9 1/31/21, 12:21 PM
Config-Bit Settings for PIC32MX470F512H file:///opt/microchip/xc32/v2.10/docs/config_docs/32mx4...

FPLLIDIV = DIV_1 1x Divider

FPLLIDIV = DIV_2 2x Divider

FPLLIDIV = DIV_3 3x Divider

FPLLIDIV = DIV_4 4x Divider

FPLLIDIV = DIV_5 5x Divider

FPLLIDIV = DIV_6 6x Divider

FPLLIDIV = DIV_10 10x Divider

FPLLIDIV = DIV_12 12x Divider

FPLLMUL PLL Multiplier

FPLLMUL = MUL_15 15x Multiplier
FPLLMUL = MUL_16 16x Multiplier
FPLLMUL = MUL_17 17x Multiplier
FPLLMUL = MUL_18 18x Multiplier
FPLLMUL = MUL_19 19x Multiplier
FPLLMUL = MUL_20 20x Multiplier
FPLLMUL = MUL_21 21x Multiplier
FPLLMUL = MUL_24 24x Multiplier

UPLLIDIV USB PLL Input Divider

UPLLIDIV = DIV_1 1x Divider

UPLLIDIV = DIV_2 2x Divider

UPLLIDIV = DIV_3 3x Divider

UPLLIDIV = DIV_4 4x Divider

UPLLIDIV = DIV_5 5x Divider

UPLLIDIV = DIV_6 6x Divider

UPLLIDIV = DIV_10 10x Divider

UPLLIDIV = DIV_12 12x Divider

UPLLEN USB PLL Enable

UPLLEN = ON Enabled
UPLLEN = OFF Disabled and Bypassed

FPLLODIV System PLL Output Clock Divider

FPLLODIV = DIV_1 PLL Divide by 1

FPLLODIV = DIV_2 PLL Divide by 2

FPLLODIV = DIV_4 PLL Divide by 4

FPLLODIV = DIV_8 PLL Divide by 8

FPLLODIV = DIV_16 PLL Divide by 16

2 of 9 1/31/21, 12:21 PM
Config-Bit Settings for PIC32MX470F512H file:///opt/microchip/xc32/v2.10/docs/config_docs/32mx4...

FPLLODIV = DIV_32 PLL Divide by 32

FPLLODIV = DIV_64 PLL Divide by 64

FPLLODIV = DIV_256 PLL Divide by 256

FNOSC Oscillator Selection Bits

FNOSC = FRC Fast RC Osc (FRC)

FNOSC = FRCPLL Fast RC Osc with PLL

FNOSC = PRI Primary Osc (XT,HS,EC)

FNOSC = PRIPLL Primary Osc w/PLL (XT+,HS+,EC+PLL)

FNOSC = SOSC Low Power Secondary Osc (SOSC)

FNOSC = LPRC Low Power RC Osc (LPRC)

FNOSC = FRCDIV16 Fast RC Osc w/Div-by-16 (FRC/16)

FNOSC = FRCDIV Fast RC Osc w/Div-by-N (FRCDIV)

FSOSCEN Secondary Oscillator Enable

FSOSCEN = OFF Disabled
FSOSCEN = ON Enabled

IESO Internal/External Switch Over

IESO = OFF Disabled
IESO = ON Enabled

POSCMOD Primary Oscillator Configuration

POSCMOD = EC External clock mode

POSCMOD = XT XT osc mode

POSCMOD = HS HS osc mode

POSCMOD = OFF Primary osc disabled

OSCIOFNC CLKO Output Signal Active on the OSCO Pin

OSCIOFNC = OFF Disabled
OSCIOFNC = ON Enabled

FPBDIV Peripheral Clock Divisor

FPBDIV = DIV_1 Pb_Clk is Sys_Clk/1
FPBDIV = DIV_2 Pb_Clk is Sys_Clk/2
FPBDIV = DIV_4 Pb_Clk is Sys_Clk/4
FPBDIV = DIV_8 Pb_Clk is Sys_Clk/8

FCKSM Clock Switching and Monitor Selection

FCKSM = CSECME Clock Switch Enable, FSCM Enabled

3 of 9 1/31/21, 12:21 PM
 LED
Choose the Red LED to blink, initialize as digital
output
 Code the ISR
●
The core timer increments every 2 SYSCLKs, or
with frequency of 40 MHz
●
Blink the LED with a 1.0 second period which is
40,000,000 SYSCLKs
●
Toggle every 0.5 seconds or 20,000,000 SYSCLKs
=> Interrupt every 20,000,000 timer increments
Use compiler built ins to read and right the CP0
registers associated with the Core Timer

__builtin_mtc0 is used to write CPO

__builtin_mfc0 is used to read CPO
 XC32 ISR Coding
●
Interrupts for the XC32 compiler are discussed
in chapter 15 of the (current) XC32 user’s guide

●
Section 15.2 and 15.3 in that chapter discuss,
and gives examples, for coding an ISR with the
XC32 compiler
 Initialize the ISR
●
Use the sys/attribs header file for macros
●
Set the priority to 2 and subpriority to 0
●
Relevant registers and bit fields for the Core
Timer interrupt are found in table 7-1 in the
datasheet
 Where are the interrupt names and
macros?
●
Interrupt vector macros (such as _ISR) are in the header file
/opt/microchip/xc32/v4.00/pic32mx/include/sys/attribs.h

●
Interrupt Vector definitions (such as _CORE_TIMER_VECTOR)
are in the header file
/opt/microchip/xc32/v4.00/pic32mx/include/proc/PIC32MX/
p32mx470f512.h

(these are for my linux machine)

PIC32MX330/350/370/430/450/470
TABLE 7-1: INTERRUPT IRQ, VECTOR AND BIT LOCATION
Vector Interrupt Bit Location Persistent
Interrupt Source(1) IRQ #
# Flag Enable Priority Sub-priority Interrupt

Highest Natural Order Priority

CT – Core Timer Interrupt 0 0 IFS0<0> IEC0<0> IPC0<4:2> IPC0<1:0> No
CS0 – Core Software Interrupt 0 1 1 IFS0<1> IEC0<1> IPC0<12:10> IPC0<9:8> No
CS1 – Core Software Interrupt 1 2 2 IFS0<2> IEC0<2> IPC0<20:18> IPC0<17:16> No
INT0 – External Interrupt 3 3 IFS0<3> IEC0<3> IPC0<28:26> IPC0<25:24> No
T1 – Timer1 4 4 IFS0<4> IEC0<4> IPC1<4:2> IPC1<1:0> No
IC1E – Input Capture 1 Error 5 5 IFS0<5> IEC0<5> IPC1<12:10> IPC1<9:8> Yes
IC1 – Input Capture 1 6 5 IFS0<6> IEC0<6> IPC1<12:10> IPC1<9:8> Yes
OC1 – Output Compare 1 7 6 IFS0<7> IEC0<7> IPC1<20:18> IPC1<17:16> No
INT1 – External Interrupt 1 8 7 IFS0<8> IEC0<8> IPC1<28:26> IPC1<25:24> No
T2 – Timer2 9 8 IFS0<9> IEC0<9> IPC2<4:2> IPC2<1:0> No
IC2E – Input Capture 2 10 9 IFS0<10> IEC0<10> IPC2<12:10> IPC2<9:8> Yes
IC2 – Input Capture 2 11 9 IFS0<11> IEC0<11> IPC2<12:10> IPC2<9:8> Yes
OC2 – Output Compare 2 12 10 IFS0<12> IEC0<12> IPC2<20:18> IPC2<17:16> No
INT2 – External Interrupt 2 13 11 IFS0<13> IEC0<13> IPC2<28:26> IPC2<25:24> No
T3 – Timer3 14 12 IFS0<14> IEC0<14> IPC3<4:2> IPC3<1:0> No
IC3E – Input Capture 3 15 13 IFS0<15> IEC0<15> IPC3<12:10> IPC3<9:8> Yes
IC3 – Input Capture 3 16 13 IFS0<16> IEC0<16> IPC3<12:10> IPC3<9:8> Yes
OC3 – Output Compare 3 17 14 IFS0<17> IEC0<17> IPC3<20:18> IPC3<17:16> No
INT3 – External Interrupt 3 18 15 IFS0<18> IEC0<18> IPC3<28:26> IPC3<25:24> No
T4 – Timer4 19 16 IFS0<19> IEC0<19> IPC4<4:2> IPC4<1:0> No
IC4E – Input Capture 4 Error 20 17 IFS0<20> IEC0<20> IPC4<12:10> IPC4<9:8> Yes
IC4 – Input Capture 4 21 17 IFS0<21> IEC0<21> IPC4<12:10> IPC4<9:8> Yes
OC4 – Output Compare 4 22 18 IFS0<22> IEC0<22> IPC4<20:18> IPC4<17:16> No
INT4 – External Interrupt 4 23 19 IFS0<23> IEC0<23> IPC4<28:26> IPC4<25:24> No
T5 – Timer5 24 20 IFS0<24> IEC0<24> IPC5<4:2> IPC5<1:0> No
IC5E – Input Capture 5 Error 25 21 IFS0<25> IEC0<25> IPC5<12:10> IPC5<9:8> Yes
IC5 – Input Capture 5 26 21 IFS0<26> IEC0<26> IPC5<12:10> IPC5<9:8> Yes
OC5 – Output Compare 5 27 22 IFS0<27> IEC0<27> IPC5<20:18> IPC5<17:16> No
AD1 – ADC1 Convert done 28 23 IFS0<28> IEC0<28> IPC5<28:26> IPC5<25:24> Yes
FSCM – Fail-Safe Clock Monitor 29 24 IFS0<29> IEC0<29> IPC6<4:2> IPC6<1:0> No
RTCC – Real-Time Clock and Calendar 30 25 IFS0<30> IEC0<30> IPC6<12:10> IPC6<9:8> No
FCE – Flash Control Event 31 26 IFS0<31> IEC0<31> IPC6<20:18> IPC6<17:16> No
CMP1 – Comparator Interrupt 32 27 IFS1<0> IEC1<0> IPC6<28:26> IPC6<25:24> No
CMP2 – Comparator Interrupt 33 28 IFS1<1> IEC1<1> IPC7<4:2> IPC7<1:0> No
USB – USB Interrupts 34 29 IFS1<2> IEC1<2> IPC7<12:10> IPC7<9:8> Yes
SPI1E – SPI1 Fault 35 30 IFS1<3> IEC1<3> IPC7<20:18> IPC7<17:16> Yes
SPI1RX – SPI1 Receive Done 36 30 IFS1<4> IEC1<4> IPC7<20:18> IPC7<17:16> Yes
SPI1TX – SPI1 Transfer Done 37 30 IFS1<5> IEC1<5> IPC7<20:18> IPC7<17:16> Yes
U1E – UART1 Fault 38 31 IFS1<6> IEC1<6> IPC7<28:26> IPC7<25:24> Yes
U1RX – UART1 Receive Done 39 31 IFS1<7> IEC1<7> IPC7<28:26> IPC7<25:24> Yes
U1TX – UART1 Transfer Done 40 31 IFS1<8> IEC1<8> IPC7<28:26> IPC7<25:24> Yes
I2C1B – I2C1 Bus Collision Event 41 32 IFS1<9> IEC1<9> IPC8<4:2> IPC8<1:0> Yes
I2C1S – I2C1 Slave Event 42 32 IFS1<10> IEC1<10> IPC8<4:2> IPC8<1:0> Yes
I2C1M – I2C1 Master Event 43 32 IFS1<11> IEC1<11> IPC8<4:2> IPC8<1:0> Yes
CNA – PORTA Input Change Interrupt 44 33 IFS1<12> IEC1<12> IPC8<12:10> IPC8<9:8> Yes
Note 1: Not all interrupt sources are available on all devices. See TABLE 1: “PIC32MX330/350/370/430/450/470 Controller
Family Features” for the list of available peripherals.

DS60001185H-page 66  2012-2019 Microchip Technology Inc.

/opt/microchip/xc32/v4.00/pic32mx/include/proc/PIC32MX/p32mx460f512l.h

/* Vector Numbers */
#define _CORE_TIMER_VECTOR 0
#define _CORE_SOFTWARE_0_VECTOR 1
#define _CORE_SOFTWARE_1_VECTOR 2
#define _EXTERNAL_0_VECTOR 3
#define _TIMER_1_VECTOR 4
#define _INPUT_CAPTURE_1_VECTOR 5
#define _OUTPUT_COMPARE_1_VECTOR 6
#define _EXTERNAL_1_VECTOR 7
#define _TIMER_2_VECTOR 8
#define _INPUT_CAPTURE_2_VECTOR 9
#define _OUTPUT_COMPARE_2_VECTOR 10
#define _EXTERNAL_2_VECTOR 11
#define _TIMER_3_VECTOR 12
#define _INPUT_CAPTURE_3_VECTOR 13
#define _OUTPUT_COMPARE_3_VECTOR 14
#define _EXTERNAL_3_VECTOR 15
#define _TIMER_4_VECTOR 16
#define _INPUT_CAPTURE_4_VECTOR 17
#define _OUTPUT_COMPARE_4_VECTOR 18
#define _EXTERNAL_4_VECTOR 19
#define _TIMER_5_VECTOR 20
#define _INPUT_CAPTURE_5_VECTOR 21
#define _OUTPUT_COMPARE_5_VECTOR 22
#define _ADC_VECTOR 23
#define _FAIL_SAFE_MONITOR_VECTOR 24
#define _RTCC_VECTOR 25
#define _FCE_VECTOR 26
#define _COMPARATOR_1_VECTOR 27
#define _COMPARATOR_2_VECTOR 28
#define _USB_1_VECTOR 29
#define _SPI_1_VECTOR 30
#define _UART_1_VECTOR 31
#define _I2C_1_VECTOR 32
#define _CHANGE_NOTICE_VECTOR 33
#define _PMP_VECTOR 34
#define _SPI_2_VECTOR 35
#define _UART_2_VECTOR 36
#define _I2C_2_VECTOR 37
#define _UART_3_VECTOR 38
#define _UART_4_VECTOR 39
#define _CTMU_VECTOR 41
#define _DMA_0_VECTOR 42
#define _DMA_1_VECTOR 43
#define _DMA_2_VECTOR 44
#define _DMA_3_VECTOR 45
●
Complete the rest of the code
●
Use a “forever” loop to wait for interrupts
 Build the Project
●
Use MPLAB X and the XC32 compiler and
download the hex file to the demo board, or
●
Use the XC32 compiler with the command line
and download the hex file with IPE
Demo the Project

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