BASIC ELECTRICAL AND ELECTRONICS

ENGINEERING
(BE23C01) — CSE Dept. | Year/Sem: I/II | Regulation 2025

COMPLETE EXAM STUDY GUIDE

Part A (2 Marks) | Part B (13 Marks) | Part C (15 Marks)

Unit Topic CO

1 DC Fundamentals CO1

2 AC Fundamentals CO2

3 Electrical Machines CO3

4 Semiconductor Devices CO4

5 Digital Electronics & Microcontrollers CO5

UNIT 1: DC FUNDAMENTALS
PART A — 2 MARKS
Q1. State Ohm's Law.
Ohm's Law states that the current flowing through a conductor is directly proportional to the voltage across
it, provided temperature remains constant. Formula: V = IR, where V = Voltage (Volts), I = Current
(Amperes), R = Resistance (Ohms)
KEY POINT: Ohm's Law is valid only for linear/passive elements at constant temperature.

Q2. State Kirchhoff's Current Law (KCL).

KCL: The algebraic sum of all currents meeting at a node (junction) is zero. ∑I(entering) = ∑I(leaving)
Example: If I1=5A and I2=3A enter a node, then the current leaving = 8A.
KEY POINT: KCL is based on the principle of conservation of charge.

Q3. State Kirchhoff's Voltage Law (KVL).

KVL: The algebraic sum of all voltages around any closed loop in a circuit is zero. ∑V = 0 (around a closed
loop) Sign convention: Voltage rise is positive; voltage drop is negative.
KEY POINT: KVL is based on the principle of conservation of energy.

Q4. Define Power Factor.

Power factor is the ratio of active (real) power to apparent power. PF = P/S = cos φ For DC circuits, PF = 1.
For AC circuits, 0 ≤ PF ≤ 1.
KEY POINT: A low power factor means poor utilization of electrical supply.

Q5. Define RMS Value and Average Value of AC signal.

RMS Value (Vrms): The equivalent DC value that produces the same heating effect. Vrms = Vm/√2 (for
sinusoidal signal) Average Value: Vavg = 0.637 × Vm (for full-wave rectified signal) Form Factor =
Vrms/Vavg = 1.11
KEY POINT: RMS is used for power calculations; average is used in rectifier analysis.

Q6. What is the difference between series and parallel circuits?

Series Circuit: Same current flows; total R = R1+R2+...+Rn; voltages divide. Parallel Circuit: Same voltage;
1/R_total = 1/R1 + 1/R2 +...; currents divide.
KEY POINT: Parallel connection is used in household wiring for independent control.

PART B — 13 MARKS
Q1. Verify Kirchhoff's Current and Voltage Laws with a typical circuit example.
KCL Verification:
Consider a node A where three branches meet:
• Branch 1: I1 = 5A (entering)
• Branch 2: I2 = 3A (entering)
• Branch 3: I3 = ? (leaving)
By KCL: I1 + I2 = I3 → I3 = 8A ✓ (Conservation of charge verified)

KVL Verification:
Consider a series circuit: 20V battery, R1=4Ω, R2=6Ω
Total resistance: R = 4+6 = 10Ω
Current: I = V/R = 20/10 = 2A
Voltage across R1: VR1 = 2×4 = 8V
Voltage across R2: VR2 = 2×6 = 12V
KVL check: 20 - 8 - 12 = 0 ✓
Conclusion: Sum of voltage drops = Source voltage (KVL verified)
KEY POINT: KCL → Node; KVL → Loop. These are universal laws for circuit analysis.
Q2. Explain Star and Delta Connection for three-phase circuits.
Star (Y) Connection:
• Three windings connected at a common neutral point (N)
• Line voltage VL = √3 × Phase voltage Vph
• Line current IL = Phase current Iph
• Example: VL = 415V → Vph = 415/√3 = 240V

Delta (∆) Connection:

• Three windings connected end-to-end forming a triangle
• Line voltage VL = Phase voltage Vph
• Line current IL = √3 × Phase current Iph
• No neutral wire; used for loads needing higher voltage

Power: P = √3 × VL × IL × cosφ (both connections)

KEY POINT: Star is used for generation/distribution; Delta for industrial motors.

Q3. Describe Kirchhoff's Laws and determine current through 6Ω resistor (circuit with 18V
battery, 4Ω, 6Ω, 10Ω resistors in series-parallel).
Given: 18V source, Series part: 4Ω, Parallel combination: 6Ω ■ (10Ω+2Ω)
Step 1: Parallel combination: (6 × 12)/(6+12) = 72/18 = 4Ω
Step 2: Total resistance: 4Ω + 4Ω = 8Ω
Step 3: Total current: IT = 18/8 = 2.25A (from KVL)
Step 4: Voltage across parallel: V = 2.25 × 4 = 9V
Step 5: Current through 6Ω: I = 9/6 = 1.5A
Answer: Current through 6Ω = 1.5A
KEY POINT: Apply KVL for each loop and KCL at each node to solve any circuit.

PART C — 15 MARKS
Q1. Using Mesh Analysis, determine currents through all branches of a circuit with 200V, 100V,
150V sources and 30Ω, 20Ω, 60Ω, 80Ω, 50Ω resistors.
Mesh Analysis Method:
Step 1: Identify independent meshes and assign mesh currents I1, I2, I3.
Step 2: Write KVL equation for each mesh:
Mesh 1: 200 = 80I1 + 30(I1-I2)
→ 200 = 110I1 - 30I2 ...(1)
Mesh 2: 0 = 30(I2-I1) + 20I2 + 60(I2-I3)
→ 0 = -30I1 + 110I2 - 60I3 ...(2)
Mesh 3: -100+150 = 60(I3-I2) + 50I3
→ 50 = -60I2 + 110I3 ...(3)
Step 3: Solve equations simultaneously:
From (1): I1 = (200 + 30I2)/110
Substituting and solving: I1 ≈ 2.2A, I2 ≈ 1.2A, I3 ≈ 1.1A
Step 4: Branch currents = difference of mesh currents at each branch.
Result: Current in 30Ω = I1-I2 = 1.0A; in 60Ω = I2-I3 = 0.1A
KEY POINT: Mesh Analysis uses KVL; Node Analysis uses KCL. Choose based on circuit structure.
UNIT 2: AC FUNDAMENTALS
PART A — 2 MARKS
Q1. Define Self-Inductance and Mutual Inductance.
Self-Inductance (L): EMF induced in a coil due to change in its own current. e = -L (dI/dt). Unit: Henry (H).
Mutual Inductance (M): EMF induced in one coil due to changing current in a nearby coil. e2 = -M (dI1/dt).
Unit: Henry (H).
KEY POINT: Mutual inductance is the basis of transformer operation.

Q2. Define MMF and Flux Density.

MMF (Magneto-Motive Force): The driving force that establishes magnetic flux in a circuit. MMF = NI
(Ampere-turns) Flux Density (B): Magnetic flux per unit area. B = Φ/A (Wb/m² or Tesla)
KEY POINT: MMF in magnetic circuits is analogous to EMF in electric circuits.

Q3. State Faraday's Laws of Electromagnetic Induction.

1st Law: Whenever the magnetic flux linked with a coil changes, an EMF is induced. 2nd Law: The
magnitude of induced EMF = rate of change of flux linkage. e = -N (dΦ/dt) Volts
KEY POINT: The negative sign indicates Lenz's Law — induced EMF opposes the change causing it.

Q4. Define Lenz's Law and Fleming's Right-Hand Rule.

Lenz's Law: The induced current flows in a direction to oppose the change in flux that causes it. Fleming's
Right-Hand Rule: For generators — Thumb=Motion, Index=Flux, Middle=Induced EMF (current).
KEY POINT: Lenz's Law ensures conservation of energy.

Q5. Define Permeability and Relative Permeability.

Permeability (µ): Ability of a material to allow magnetic flux to pass through it. Absolute permeability: µ = µo
× µr µo = 4π × 10■■ H/m (free space) Relative Permeability (µr): Ratio of permeability of medium to free
space.
KEY POINT: Iron has µr ≈ 200-5000, making it ideal for transformer cores.

PART B — 13 MARKS
Q1. Explain Self and Mutual Inductance with equations and examples.
Self-Inductance:
When current in a coil changes, the changing magnetic field induces an EMF in the same coil.
• Formula: e = -L(dI/dt)
• Energy stored: W = ½LI²
• L = µ■µ■N²A/l, where N=turns, A=area, l=length

Mutual Inductance:
EMF induced in coil 2 due to changing current in coil 1.
• e■ = -M(dI■/dt)
• M = k√(L1×L2), where k = coefficient of coupling (0 to 1)
• k=1: perfect coupling; k=0: no coupling

Numerical: Two coils: L1=4H, L2=9H, k=0.6

M = 0.6 × √(4×9) = 0.6 × 6 = 3.6H
KEY POINT: Coefficient of coupling k indicates how effectively two coils are magnetically linked.

Q2. Explain Pipe Earthing — its function and need. (Nov/Dec 2022)
Earthing: Connecting the metallic parts of electrical equipment to earth (ground) to prevent electric shock.

Pipe Earthing:
• A GI (galvanized iron) pipe of 38mm diameter, 2m long is buried vertically in moist earth.
 • The pipe is perforated to allow moisture to seep in, maintaining low resistance.
• Charcoal and salt layers surround the pipe to improve conductivity.
• An earthing wire connects the equipment frame to the pipe.

Purpose:
• Provides low-resistance path for fault currents
• Protects personnel from electric shock
• Stabilizes voltage levels
• Enables fuse/breaker to operate during faults

Earth resistance: Should not exceed 1Ω for good earthing.

KEY POINT: Earthing = Safety. Pipe earthing is most common for residential and industrial installations.

Q3. Explain Circuit Breakers — MCB, MCCB, and ELCB.

Circuit Breaker: An automatic switching device that interrupts the circuit under fault conditions.

1. MCB (Miniature Circuit Breaker):

• For low-current applications (up to 100A)
• Trips on overload (thermal) and short circuit (magnetic)
• Used in homes and small offices
• Can be reset after tripping (reusable)

2. MCCB (Moulded Case Circuit Breaker):

• For medium to heavy loads (up to 1000A)
• Adjustable trip settings
• Used in industrial distribution boards

3. ELCB (Earth Leakage Circuit Breaker):

• Detects leakage current to earth (as low as 30mA)
• Protects against electrocution and earth faults
• Trips within 30ms for personal protection
KEY POINT: MCB protects wiring; ELCB protects people. Both are essential in modern wiring.

PART C — 15 MARKS
Q1. A solenoid 1.5m long with 5000 turns, outer diameter 0.038m, flux produced = 56.481×10■■
Wb. Calculate current and flux density at centre.
Given: l = 1.5m, N = 5000, d = 0.038m, Φ = 56.481×10■■ Wb
Step 1: Area A = π(d/2)² = π(0.019)² = π × 3.61×10■■ = 1.134×10■³ m²
Step 2: Flux Density B = Φ/A = (56.481×10■■)/(1.134×10■³) = 0.0498 T
Step 3: Using B = µ■(NI/l)
0.0498 = 4π×10■■ × (5000 × I / 1.5)
0.0498 = 4π×10■■ × 3333.3 × I
0.0498 = 4.19×10■³ × I
I = 0.0498/4.19×10■³ = 11.9 A ≈ 12A
Step 4: Flux density at centre = 0.0498 T ≈ 49.8 mT
KEY POINT: Always convert diameter to radius. Use µ■ = 4π × 10■■ H/m for air-core solenoid.
UNIT 3: ELECTRICAL MACHINES
PART A — 2 MARKS
Q1. State Faraday's Law of Electromagnetic Induction (for machines).
The EMF induced in a conductor is proportional to the rate of change of magnetic flux linkage. e =
-N(dΦ/dt) In machines: EMF is generated when conductors move in a magnetic field (generators) or when
AC is applied to stationary coils (transformers).
KEY POINT: This law is the operating principle of all AC/DC generators and transformers.

Q2. Define Voltage Transformation Ratio of a Transformer.

The ratio of secondary voltage to primary voltage. k = V2/V1 = N2/N1 = I1/I2 Step-up transformer: k > 1
(N2 > N1) Step-down transformer: k < 1 (N2 < N1)
KEY POINT: An ideal transformer conserves power: V1I1 = V2I2.

Q3. What is the difference between a Motor and a Generator?

Motor: Converts electrical energy to mechanical energy. (Input = Electrical; Output = Mechanical)
Generator: Converts mechanical energy to electrical energy. (Input = Mechanical; Output = Electrical) Both
work on electromagnetic induction principles.
KEY POINT: Same machine can work as motor or generator — principle of reversibility.

Q4. List types of DC generators and DC motors.

DC Generators: (i) Separately excited (ii) Shunt (iii) Series (iv) Compound (cumulative/differential) DC
Motors: (i) Shunt motor (ii) Series motor (iii) Compound motor Shunt motor: constant speed; Series motor:
high starting torque.
KEY POINT: Series motor has highest starting torque — used in traction, cranes, elevators.

Q5. Write the EMF equation of a DC generator.

E = (ΦZNP)/(60A) Where: Φ = flux per pole (Wb), Z = total armature conductors, N = speed (RPM), P =
number of poles, A = number of parallel paths For Lap winding: A = P; For Wave winding: A = 2
KEY POINT: EMF is proportional to flux and speed — reducing either lowers output voltage.

Q6. Define slip in an induction motor.

Slip (s) = (Ns - Nr)/Ns × 100% Where Ns = synchronous speed, Nr = rotor speed At no load: s ≈ 0-1%; At
full load: s ≈ 3-5%; At standstill: s = 1 (100%) Ns = 120f/P (RPM)
KEY POINT: Induction motor can never reach synchronous speed — slip is always > 0 under load.

PART B — 13 MARKS
Q1. Explain the construction and working principle of a single-phase transformer.
Construction:
• Core: Laminated silicon steel (reduces eddy current loss)
• Primary Winding: Connected to AC supply (N1 turns)
• Secondary Winding: Connected to load (N2 turns)
• Types: Core type (windings on two limbs) and Shell type (core surrounds windings)

Working Principle (Faraday's Law):

1. AC supply to primary winding creates alternating flux in core
2. Alternating flux links with secondary winding
3. EMF induced in secondary: e2 = -N2(dΦ/dt)
4. EMF Equation: E1 = 4.44fN1Φm and E2 = 4.44fN2Φm
5. Turns ratio: E1/E2 = N1/N2

Losses in Transformer:
• Iron losses (core losses) = Hysteresis + Eddy current losses (constant)
 • Copper losses = I²R in windings (variable with load)
Efficiency: η = Output/(Output + Core losses + Copper losses) × 100%
KEY POINT: Transformer works ONLY on AC — DC would cause core saturation and winding burnout.

Q2. Derive the Torque Equation of a DC motor.

DC Motor Torque Derivation:
The back EMF in DC motor: Eb = (ΦZNP)/(60A)
Power developed: P = Eb × Ia
Also: P = T × ω = T × (2πN/60)
Therefore: T × (2πN/60) = Eb × Ia
T = (Eb × Ia × 60)/(2πN)
Substituting Eb: T = (ΦZNP × Ia)/(60A) × 60/(2πN)
T = (1/2π) × (ΦZIaP/A)
T = 0.159 × ΦZIaP/A (N-m)

Since Z, P, A are constant: T ∝ Φ × Ia

• Shunt motor: Φ = constant → T ∝ Ia
• Series motor: Φ ∝ Ia → T ∝ Ia²
KEY POINT: Series motor torque ∝ Ia² — hence VERY high starting torque but dangerous at no load.

PART C — 15 MARKS
Q1. A 250V, 4-pole wave-wound DC series motor has 782 conductors, armature resistance
0.752Ω, current 40A, flux 25mWb. Find speed and gross torque. (April/May 2022)
Given: V=250V, P=4, Z=782, Ra=0.752Ω, Ia=40A, Φ=25mWb=0.025Wb, Wave wound → A=2
Step 1: Back EMF: Eb = V - Ia×Ra = 250 - (40×0.752) = 250 - 30.08 = 219.92V
Step 2: EMF equation: Eb = ΦZNP/(60A)
219.92 = (0.025 × 782 × N × 4)/(60 × 2)
219.92 = (78.2N)/120
219.92 = 0.6517N
N = 219.92/0.6517 = 337.5 RPM ≈ 338 RPM

Step 3: Gross Torque: T = (Eb × Ia × 60)/(2πN)

T = (219.92 × 40 × 60)/(2π × 338)
T = 527808/2123.7
T = 248.6 N-m
KEY POINT: For wave winding A=2; for lap winding A=P. Always find Eb before calculating speed.
UNIT 4: SEMICONDUCTOR DEVICES
PART A — 2 MARKS
Q1. What are P-type and N-type semiconductors?
N-type: Formed by doping with pentavalent impurity (Phosphorus, Arsenic). Majority carriers = electrons;
Minority carriers = holes. P-type: Formed by doping with trivalent impurity (Boron, Aluminium). Majority
carriers = holes; Minority carriers = electrons.
KEY POINT: Doping increases conductivity by ~10■ times compared to intrinsic semiconductor.

Q2. What is a PN Junction diode? What is barrier potential?

PN Junction: Formed by joining P-type and N-type semiconductor materials. At the junction, electrons and
holes recombine forming a Depletion Region. Barrier Potential: The built-in voltage across depletion layer.
Silicon: 0.7V | Germanium: 0.3V
KEY POINT: Diode conducts in forward bias (applied voltage > barrier potential); blocks in reverse bias.

Q3. Why is FET called a unipolar device?

FET (Field Effect Transistor) uses only ONE type of charge carrier (either electrons in N-channel or holes
in P-channel) for conduction. In contrast, BJT uses BOTH majority and minority carriers (bipolar). FET is
voltage-controlled; BJT is current-controlled.
KEY POINT: FET has very high input impedance (~MΩ) — ideal for amplifiers requiring high impedance.

Q4. Why is transistor called a bipolar device?

BJT (Bipolar Junction Transistor) uses BOTH electrons and holes (two types of charge carriers) for current
conduction. Current flow involves both majority carriers (from emitter) and minority carriers crossing
junctions. Types: NPN and PNP
KEY POINT: In NPN transistor, current flows from Collector to Emitter; conventional current: E→B→C.

Q5. What is a Zener diode? Why is it called a voltage regulator?

Zener diode is a heavily doped PN junction diode designed to operate in reverse breakdown without
damage. When reverse voltage exceeds Zener voltage (Vz), it conducts and maintains constant voltage.
Used as: Voltage regulator, reference voltage source, clipper circuits.
KEY POINT: Zener operates in reverse breakdown — normal diodes must NOT be used this way.

Q6. List the three modes of operation of BJT.

1. Active Region: EB junction forward biased, CB junction reverse biased → used as amplifier 2. Saturation
Region: Both junctions forward biased → transistor fully ON (switch closed) 3. Cutoff Region: Both
junctions reverse biased → transistor fully OFF (switch open)
KEY POINT: Active=Amplifier; Saturation=ON; Cutoff=OFF. Digital circuits use saturation and cutoff.

PART B — 13 MARKS
Q1. Explain the working principle of MOSFET and sketch V-I characteristics of Enhancement
type MOSFET. (April/May 2022)
MOSFET (Metal Oxide Semiconductor FET):
Types: N-channel and P-channel; Enhancement mode and Depletion mode

Enhancement MOSFET (N-channel) Working:

• Structure: Metal gate insulated by SiO■ layer over P-type substrate
• Source (S) and Drain (D) are N+ regions
• With VGS = 0: No channel → no drain current
• When VGS > VTH (threshold ~2V): Electric field attracts electrons, forms N-channel
• Increasing VGS increases channel width → more ID

V-I Characteristics Regions:

1. Ohmic/Linear Region: VDS < VGS - VTH → ID increases with VDS
 2. Saturation Region: VDS ≥ VGS - VTH → ID constant (≈ pinch-off)
ID(sat) = k(VGS - VTH)²
3. Cutoff: VGS < VTH → ID = 0

Advantages over BJT: High input impedance, no gate current, faster switching, lower power
KEY POINT: MOSFET is voltage-controlled device. Enhancement type is normally OFF; Depletion type is
normally ON.

Q2. Draw and explain full-wave rectifier without filter and its input-output waveforms. (April/May
2023)
Full-Wave Bridge Rectifier:
Components: 4 diodes (D1, D2, D3, D4), transformer, load resistance RL

Working:
Positive half cycle: D1 and D3 conduct → current flows through RL (top to bottom)
Negative half cycle: D2 and D4 conduct → current still flows through RL (top to bottom)
→ Both half cycles appear as positive at output

Parameters:
• Average output voltage: Vavg = 2Vm/π = 0.637Vm
• RMS output voltage: Vrms = Vm/√2 = 0.707Vm
• Ripple factor: γ = 0.482 (less than half-wave's 1.21)
• Ripple frequency = 2f (100Hz for 50Hz supply)
• Efficiency: 81.2% (vs 40.6% for half-wave)

Conclusion: Full-wave rectifier is superior — better efficiency, lower ripple, higher average voltage.
KEY POINT: Full-wave rectifier efficiency is twice that of half-wave. PIV = 2Vm for bridge rectifier.

PART C — 15 MARKS
Q1. Explain working of BJT in Common Emitter (CE) configuration with neat sketch,
characteristic curves, and parameters. (April/May 2022)
CE Configuration: Input between Base-Emitter; Output between Collector-Emitter; Emitter common to
both.

Input Characteristics (IB vs VBE at constant VCE):

• For VBE < 0.7V (Si): IB ≈ 0 (cutoff)
• For VBE > 0.7V: IB increases rapidly (like a diode curve)
• Input resistance: hie = ∆VBE/∆IB ≈ 1-2 kΩ

Output Characteristics (IC vs VCE at constant IB):

1. Active region: IC = β×IB = hFE×IB (constant for given IB)
2. Saturation region: VCE < 0.2V, IC reaches maximum
3. Cutoff: IB=0, only leakage current ICEO flows

Current Relationships:
• IE = IB + IC
• β (hFE) = IC/IB (current gain, typically 50-300)
• α = IC/IE = β/(β+1)

Numerical: IE=10mA, IC=9.8mA → IB = IE-IC = 10-9.8 = 0.2mA; β = 9.8/0.2 = 49

CE vs CB vs CC:
CE: High voltage & current gain → most used for amplification
CB: High voltage gain, current gain <1 → used at high freq
CC (Emitter follower): High current gain, voltage gain ≈1 → impedance matching
KEY POINT: CE configuration gives highest power gain (β×voltage gain) — most common amplifier
configuration.
UNIT 5: DIGITAL ELECTRONICS & MICROCONTROLLERS
PART A — 2 MARKS
Q1. List the four possible elementary operations in simple binary addition.
0 + 0 = 0 (Sum=0, Carry=0) 0 + 1 = 1 (Sum=1, Carry=0) 1 + 0 = 1 (Sum=1, Carry=0) 1 + 1 = 10 (Sum=0,
Carry=1) Note: 1+1+1 = 11 (Sum=1, Carry=1) — used in full adder.
KEY POINT: These four rules form the basis of all binary arithmetic operations.

Q2. What is a Multiplexer? How many selection inputs for 16×1 MUX?
Multiplexer (MUX): A combinational circuit that selects one of 2■ input lines and routes it to a single output
based on n selection lines. 16×1 MUX: 16 data inputs, 4 selection lines (2■=16), 1 output. Also called Data
Selector.
KEY POINT: MUX can implement any Boolean function — n-variable function needs 2■:1 MUX.

Q3. What is a combinational circuit?

A combinational circuit is a digital circuit where the output depends only on the current inputs (no
memory/feedback). Examples: Adder, Subtractor, Encoder, Decoder, MUX, DEMUX, Comparator.
Opposite: Sequential circuit (has memory — flip-flops).
KEY POINT: Combinational circuits have no clock. Sequential circuits require clock signals.

Q4. What is a data flip-flop (D flip-flop)?

D flip-flop (Data/Delay FF): Has single input D and clock. On rising edge of clock: Q = D (output follows
input) Characteristic equation: Q(n+1) = D Eliminates the 'invalid state' of SR flip-flop (when S=R=1).
KEY POINT: D FF is simplest and most widely used — found in registers and memory circuits.

Q5. What is a shift register? List its types.

Shift Register: A cascade of flip-flops that shifts data left or right on each clock pulse. Types: 1. SISO
(Serial In Serial Out) 2. SIPO (Serial In Parallel Out) 3. PISO (Parallel In Serial Out) 4. PIPO (Parallel In
Parallel Out) Bidirectional shift registers can shift both ways.
KEY POINT: Shift registers are used for serial-parallel conversion and data storage.

Q6. What is a decade counter (BCD counter)? How many flip-flops needed?
Decade counter counts from 0 to 9 (10 states) and resets on the 10th pulse. Number of flip-flops: n = 4
(since 2³=8 < 10 ≤ 2■=16) Also called BCD (Binary Coded Decimal) counter. Modulus = 10 (counts 10
states)
KEY POINT: For MOD-N counter, number of FFs = ■log■N■. BCD counter needs 4 FFs.

Q7. Write excitation table of JK flip-flop.

JK Flip-Flop Excitation Table: Q→Q+1: J K 0 → 0 : 0 X 0 → 1 : 1 X 1 → 0 : X 1 1 → 1 : X 0 (X = don't care)
Characteristic equation: Q(n+1) = JQ' + K'Q
KEY POINT: JK FF is most versatile — no invalid state; J=K=1 gives toggle operation.

PART B — 13 MARKS
Q1. Present the graphic symbol, algebraic expression, and truth table for AND, OR, NOT, NAND,
NOR, XOR, XNOR gates. (Nov/Dec 2022)
Gate Expression Truth Table Function

AND Y = A·B 00→0, 01→0, 10→0, 11→1 Output 1 only if all inputs 1

OR Y = A+B 00→0, 01→1, 10→1, 11→1 Output 1 if any input 1

NOT Y = A' 0→1, 1→0 Inverts the input

NAND Y = (A·B)' 00→1, 01→1, 10→1, 11→0 Universal gate; AND+NOT

NOR Y = (A+B)' 00→1, 01→0, 10→0, 11→0 Universal gate; OR+NOT

 XOR Y = A⊕B 00→0, 01→1, 10→1, 11→0 Output 1 if inputs differ

XNOR Y = (A⊕B)' 00→1, 01→0, 10→0, 11→1 Output 1 if inputs same

KEY POINT: NAND and NOR are Universal Gates — any logic function can be implemented using only
NAND or only NOR gates.

Q2. Design a full adder using two half adders.

Half Adder:
Inputs: A, B | Outputs: Sum (S), Carry (C)
S = A ⊕ B (XOR gate)
C = A · B (AND gate)
Truth Table: 00→S=0,C=0 | 01→S=1,C=0 | 10→S=1,C=0 | 11→S=0,C=1

Full Adder (two half adders + OR gate):

Inputs: A, B, Cin | Outputs: Sum (S), Carry (Cout)
Half Adder 1: S1 = A⊕B, C1 = A·B
Half Adder 2: S = S1⊕Cin, C2 = S1·Cin
Output Carry: Cout = C1 + C2

Sum equation: S = A⊕B⊕Cin

Carry equation: Cout = AB + BCin + ACin

Truth Table (partial):

A=0,B=0,Cin=0 → S=0, Cout=0
A=1,B=1,Cin=1 → S=1, Cout=1
A=1,B=0,Cin=1 → S=0, Cout=1
KEY POINT: Full adder = 2 Half adders + 1 OR gate. Full adder handles the carry-in from previous bit.

Q3. What is K-Map? Simplify: F(w,x,y,z) = Σ(0,1,2,4,5,6,8,9,12,13,14) using K-Map. (Nov/Dec

2022)
K-Map (Karnaugh Map): A graphical method to simplify Boolean expressions by grouping adjacent 1s.
Rules: Groups must be powers of 2 (1,2,4,8...); Wrap-around is allowed; Largest groups preferred.

4-variable K-Map for given function:

Minterms: 0,1,2,4,5,6,8,9,12,13,14 (mark these as 1s)

wx\yz | 00 01 11 10
-------|-------------------
00 | 1 1 0 1
01 | 1 1 0 1
11 | 1 1 0 1
10 | 1 1 0 1

Groups identified:
• Group 1 (8-cell column): yz=00 → covers 0,4,12,8 and yz=01 → 1,5,13,9 → gives z'=0 or z=0...
• Actually: Column yz=11 has all 0s (minterms 3,7,15,11 absent)
• Large group of 8 (all yz≠11): y'z' + yz' grouping →
Simplified: F = y' + z' (by observing pattern — output is 0 only when y=1,z=1)
Verification: F=0 when yz=11, i.e., minterms 3,7,11,15 → these are not in Σ ✓
KEY POINT: K-Map groups: 1 cell=4 literals, 2 cells=3 literals, 4 cells=2 literals, 8 cells=1 literal.

PART C — 15 MARKS
Q1. Outline the design of a 3-to-8 line decoder using inverters and AND gates. Present the truth
table. (Nov/Dec 2022)
3-to-8 Decoder:
• 3 input lines (A, B, C) → 8 output lines (D0 to D7)
• Only ONE output is HIGH (1) at any time, corresponding to the binary input
• Uses 3 inverters (for A', B', C') and 8 three-input AND gates

Boolean Expressions:
D0 = A'B'C' (0→000) | D1 = A'B'C (1→001)
D2 = A'BC' (2→010) | D3 = A'BC (3→011)
D4 = AB'C' (4→100) | D5 = AB'C (5→101)
D6 = ABC' (6→110) | D7 = ABC (7→111)

Truth Table:
A B C D0 D1 D2 D3 D4 D5 D6 D7

0 0 0 1 0 0 0 0 0 0 0

0 0 1 0 1 0 0 0 0 0 0

0 1 0 0 0 1 0 0 0 0 0

0 1 1 0 0 0 1 0 0 0 0

1 0 0 0 0 0 0 1 0 0 0

1 0 1 0 0 0 0 0 1 0 0

1 1 0 0 0 0 0 0 0 1 0

1 1 1 0 0 0 0 0 0 0 1

Circuit Design:
Step 1: Pass inputs A, B, C through 3 NOT gates to get A', B', C'
Step 2: Connect appropriate combinations to 8 AND gates as per expressions above
Step 3: Each AND gate output = one decoder output line
KEY POINT: 3-to-8 decoder has 3 inputs, 8 outputs, 3 inverters, 8 AND gates (3-input each). Used in
memory address decoding.

Q2. Implement Boolean function f(A,B,C,D) = AB' + BD + B'CD using 8×1 MUX with D as input,
A,B,C as selection lines. (April/May 2023)
8×1 MUX Implementation:
Selection lines: A=S2, B=S1, C=S0 (MSB to LSB)
Expand function for all combinations of A,B,C:

ABC=000: f = 0·1+0·D+1·0·D = 0 → I0 = 0
ABC=001: f = 0·1+0·D+1·1·D = D → I1 = D
ABC=010: f = 0·0+1·D+0·1·D = D → I2 = D
ABC=011: f = 0·0+1·D+0·0·D = D → I3 = D
ABC=100: f = 1·1+0·D+0·0·D = 1 → I4 = 1
ABC=101: f = 1·1+0·D+0·1·D = 1 → I5 = 1
ABC=110: f = 1·0+1·D+0·1·D = D → I6 = D
ABC=111: f = 1·0+1·D+0·0·D = D → I7 = D

MUX connections: I0=0, I1=D, I2=D, I3=D, I4=1, I5=1, I6=D, I7=D
Selection: S2=A, S1=B, S0=C; Variable input: D
KEY POINT: For 2■:1 MUX with n+1 variables, use n variables as select lines and expand for remaining
variable.
Q3. Explain in detail 8051 Microcontroller Architecture.
8051 Microcontroller Overview:
• 8-bit microcontroller by Intel (1980); Harvard architecture
• On-chip: CPU, RAM (128B), ROM (4KB), I/O ports, Timers, Serial port, Interrupts

Key Components:
1. CPU: 8-bit ALU, Accumulator (A), B register, PC (16-bit), SP (8-bit)
2. Memory: Internal RAM 128B (addresses 00H-7FH) + SFR (80H-FFH)
Internal ROM: 4KB (0000H-0FFFH); External: up to 64KB each for code and data
3. I/O Ports: 4 bidirectional ports (P0, P1, P2, P3), each 8-bit
P3 has alternate functions: serial comm, external interrupts, timers
4. Timers/Counters: Two 16-bit timers (T0, T1) — modes 0,1,2,3
5. Serial Port: Full duplex UART; TXD=P3.1, RXD=P3.0
6. Interrupts: 5 interrupt sources — INT0, INT1 (external), TF0, TF1 (timers), RI/TI (serial)
7. Oscillator: Crystal (12MHz) → Machine cycle = 1 µs at 12MHz

Applications: Embedded systems, automation, robotics, consumer electronics, automotive control

KEY POINT: 8051 has separate program and data memory spaces (Harvard architecture) — faster
execution than Von Neumann.
 QUICK FORMULA & CONCEPT REFERENCE

DC Fundamentals
• Ohm's Law: V = IR
• Power: P = VI = I²R = V²/R
• Series: R_total = R1+R2+...+Rn
• Parallel: 1/R_total = 1/R1 + 1/R2 + ...
• KCL: ΣI_in = ΣI_out at any node
• KVL: ΣV = 0 around any closed loop

AC Fundamentals
• Vrms = Vm/√2 | Vavg = 2Vm/π (full wave)
• Impedance: Z = √(R² + (XL-XC)²)
• XL = 2πfL | XC = 1/(2πfC)
• Power factor: PF = cosφ = R/Z
• Active power P = VI cosφ (Watts)
• Reactive power Q = VI sinφ (VAR)
• EMF induced: e = -N(dΦ/dt)

Electrical Machines
• Transformer: E1/E2 = N1/N2 = I2/I1
• EMF eq: E = 4.44fNΦm (transformer)
• DC Generator EMF: E = ΦZNP/(60A)
• DC Motor: Eb = V - IaRa
• Torque: T ∝ ΦIa | T = EbIa×60/(2πN)
• Slip: s = (Ns-Nr)/Ns | Ns = 120f/P

Semiconductors
• Diode: Forward bias > 0.7V (Si), 0.3V (Ge)
• Zener: Operates in reverse breakdown
• BJT: IE = IB + IC | β = IC/IB | α = IC/IE
• Full-wave rectifier: Vavg = 2Vm/π
• Ripple factor (FW): γ = 0.482
• FET: ID = k(VGS - VTH)² (saturation)

Digital Electronics
• Half Adder: S = A⊕B, C = AB
• Full Adder: S = A⊕B⊕Cin, Cout = AB+BCin+ACin
• JK FF: Q+ = JQ' + K'Q
• D FF: Q+ = D
• T FF: Q+ = T⊕Q
• 3-to-8 decoder: Di = minterm i
• K-Map: Group sizes = 1,2,4,8,16...

ALL THE BEST FOR YOUR EXAMS!