Computer Organization &

Architecture
Module – 1

Sangeeth N,
AP, CSE, GEC Idukki
Syllabus – Module 1
Basic Structure of computers :– Functional units - Basic operational concepts;
Memory map; Endianness.

CISC vs RISC architectures:- RISC Introduction - Assembly Language, Assembler

directives, Assembling.

Programming concepts - Program flow, Branching, Conditional statements, Loops,

Arrays, Function calls; Instruction execution cycle.

Machine language - Instructions, addressing modes, Stored program concept.

Evolution of the RISC Architecture.
 Describes what a computer does and
serves as the blueprint for designing
computer systems.

Computer The functional design and structure of a

Architecture computer system.

Focuses on how a computer’s hardware

components, like the CPU and memory,
work together to execute instructions
efficiently.
 Computer Architecture Computer Organization

Architecture describes what the computer

The Organization describes how it does it.
does.
Computer Architecture deals with the Computer Organization deals with a structural
functional behavior of computer systems. relationship.

Deals with high-level design issues. Deals with low-level design issues.

Architecture indicates its hardware. An organization indicates its performance.

Architecture Vs Organization
 Computer Architecture Computer Organization

Computer Architecture is also called Computer Organization is frequently called

Instruction Set Architecture (ISA). microarchitecture.

Organizational qualities include hardware

Examples- Intel and AMD created the x86
elements that are invisible to the programmer,
processor. Sun Microsystems and others
such as interfacing of computer and
created the SPARC processor. Apple, IBM, and
peripherals, memory technologies, and control
Motorola created the PowerPC.
signals.

Architecture Vs Organization
Functional Units of Computer
Arithmetic and Logical Unit
- Most operations in a computer are carried out by the Arithmetic and
Logic Unit (ALU).
- The ALU performs arithmetic operations like addition, subtraction,
multiplication, and division, and logical operations like comparison.
- To perform an operation, the required data (operands) are taken from
memory into the processor.
- Inside the processor, operands are kept in very fast storage locations
called registers.
- Each register holds one word of data and is faster to access than even
the processor’s cache memory.
 Output Unit

The output unit is the opposite of the input unit and is

used to send processed information to the outside world.
Functional Units
A common output device is a printer, which uses laser or
of Computer ink-jet technology to produce printed pages.

Some devices, like graphic displays, can both show output

and accept input through touchscreens.

Because some devices perform both input and output

functions, they are often referred to as I/O units.
Functional Unit of Computer
Control Unit
The CPU control unit is a component of the computer’s CPU
(central processing unit) that directs the processor’s operation.
The control unit’s job is to instruct the computer’s
arithmetic/logic unit, memory, and input and output devices on
how to respond to the instructions supplied to the processor.
Control circuits create timing signals that decide when each
action should happen.
The control unit also manages data transfers between the
processor and memory using these timing signals.
Quiz 1
Computer Architecture mainly describes:
A. How hardware components are connected
B. What a computer does
C. Physical structure of the system
D. Speed of the processor
Quiz 1
Computer Architecture mainly describes:
A. How hardware components are connected
B. What a computer does
C. Physical structure of the system
D. Speed of the processor

Ans: B. What a computer does

Quiz 2
Computer Organization mainly focuses on:
A. Functional behavior
B. How a task is executed
C. Physical implementation
D. Instruction formats
Quiz 2
Computer Organization mainly focuses on:
A. Functional behavior
B. How a task is executed
C. Physical implementation
D. Instruction formats

Ans: C. Physical implementation

Quiz 3
Which is an architectural design issue?
A. Number of registers
B. Multiply instruction availability
C. Cache size
D. Memory technology
Quiz 3
Which is an architectural design issue?
A. Number of registers
B. Multiply instruction availability
C. Cache size
D. Memory technology

Ans: B. Multiply instruction availability

Quiz 4
Primary memory is also called:
A. External memory
B. Main memory
C. Virtual memory
D. Auxiliary storage

Ans: B. Main memory

Quiz 4
Primary memory is also called:
A. External memory
B. Main memory
C. Virtual memory
D. Auxiliary storage
Quiz 5
Which unit accepts data from external devices?

A. ALU
B. Memory Unit
C. Input Unit
D. Control Unit
Quiz 5
Which unit accepts data from external devices?

A. ALU
B. Memory Unit
C. Input Unit
D. Control Unit

Ans: C. Input Unit

Quiz 6
Which is TRUE about secondary memory?
A. Faster than RAM
B. Loses data on power off
C. Permanent large storage
D. More expensive than RAM
Quiz 6
Which is TRUE about secondary memory?
A. Faster than RAM
B. Loses data on power off
C. Permanent large storage
D. More expensive than RAM

Ans: C. Permanent large storage

Quiz 7
ALU is responsible for:

A. Storing instructions
B. Arithmetic & logic operations
C. Managing timing signals
D. Handling I/O
Quiz 7
ALU is responsible for:

A. Storing instructions
B. Arithmetic & logic operations
C. Managing timing signals
D. Handling I/O

Ans: B. Arithmetic & logic operations

Quiz 8
Registers are used to:
A. Store long-term data
B. Provide slow operand storage
C. Hold one word of fast data
D. Replace cache
Quiz 8
Registers are used to:
A. Store long-term data
B. Provide slow operand storage
C. Hold one word of fast data
D. Replace cache

Ans: C. Hold one word of fast data

Quiz 9
Which device works as both input and output?

A. Printer
B. Mouse
C. Touchscreen display
D. Scanner
Quiz 9
Which device works as both input and output?

A. Printer
B. Mouse
C. Touchscreen display
D. Scanner
Ans: C. Touchscreen display
Quiz 10
Control unit mainly:

A. Performs arithmetic
B. Generates timing & coordinates units
C. Stores instructions
D. Converts signals
Quiz 10
Control unit mainly:

A. Performs arithmetic
B. Generates timing & coordinates units
C. Stores instructions
D. Converts signals

Ans: B. Generates timing & coordinates units

Review

The computer accepts information in the form of programs and data through
an input unit and stores it in the memory.

Information stored in the memory is fetched into an arithmetic and logic unit,
where it is processed.

Processed information leaves the computer through an output unit.

All activities in the computer are directed by the control unit.

 The instruction register (IR) holds
the instruction that is currently being
executed.
Connection
Between Output of IR is available to the control
circuits.
Processor
and
Memory The Control Unit generates the timing
signals that control the various
processing elements involved in executing
the instruction.
Connection Between Processor and Memory

General-purpose registers R0 through Rn−1, often called processor registers.

They hold operands that have been loaded from the memory for processing.

The MAR (Memory Address Register) holds the address of the location to or
from which data are to be transferred.

The connection of the MAR to the main memory is one-way or

unidirectional.
 The MDR (Memory Data Register)
contains the data to be written or read
out of the addressed location.
Connection
Between During the fetch operation, the MDR
contains the instruction to be executed
Processor or the data needed during execution.
and
Memory In write operation, MDR the data to be
written into the main memory.
Connection Between Processor and
Memory

The contents of MDR are transferred to the IR.

The instruction is ready to be decoded and executed.

During execution, the contents of the PC are

incremented or updated to point to the next instruction.
Quiz - 01

According to the basic structure of computers, which functional

unit is responsible for directing all activities in the computer?

A. Control Unit

B. Input Unit

C. Memory Unit

D. Arithmetic and Logic Unit (ALU)

Quiz - 02

Considering the instruction Load R2, LOC, which operation is

correctly described after the instruction has been fully executed?

A. The content of memory location LOC is overwritten.

B. The original contents of location LOC are preserved.

C. The content of the register R2 is preserved.

D. The content of R2 is transferred to LOC.

Quiz - 02

Considering the instruction Load R2, LOC, which operation is

correctly described after the instruction has been fully executed?

A. The content of memory location LOC is overwritten.

B. The original contents of location LOC are preserved.

C. The content of the register R2 is preserved.

D. The content of R2 is transferred to LOC.

Quiz - 03

In the execution of the instruction Add R4, R2, R3 (R4 ← R2 +

R3), what happens to the operands in registers R2 and R3?

A. The operands in R2 and R3 are not altered.

B. The content of R3 is altered, but R2 is preserved.

C. The content of R2 is altered, but R3 is preserved.

D. The content of R4 is added back to R2 and R3.

Quiz - 03

In the execution of the instruction Add R4, R2, R3 (R4 ← R2 +

R3), what happens to the operands in registers R2 and R3?

A. The operands in R2 and R3 are not altered.

B. The content of R3 is altered, but R2 is preserved.

C. The content of R2 is altered, but R3 is preserved.

D. The content of R4 is added back to R2 and R3.

Quiz - 04

During the execution phase of an instruction, what register holds

the instruction that is currently being processed?

A. Memory Data Register (MDR)

B. Instruction Register (IR)

C. Memory Address Register (MAR)

D. Program Counter (PC)

Quiz - 04

During the execution phase of an instruction, what register holds

the instruction that is currently being processed?

A. Memory Data Register (MDR)

B. Instruction Register (IR)

C. Memory Address Register (MAR)

D. Program Counter (PC)

Quiz - 05
What is the primary role of the Program Counter (PC) in the
connection between the processor and memory?
A. It holds the address of the location to or from which data are to
be transferred.
B. It contains the data to be written or read out of the addressed
location.
C. It contains the memory address of the next instruction to be
fetched and executed.
D. It temporarily stores the operand data to be processed.
Quiz - 05
What is the primary role of the Program Counter (PC) in the
connection between the processor and memory?
A. It holds the address of the location to or from which data are to
be transferred.
B. It contains the data to be written or read out of the addressed
location.
C. It contains the memory address of the next instruction to be
fetched and executed.
D. It temporarily stores the operand data to be processed.
Quiz - 06
Which register holds the address of the location being accessed and is
connected to the main memory via a one-way (unidirectional)
connection?
A. Instruction Register (IR)
B. Program Counter (PC)
C. Memory Address Register (MAR)
D. Memory Data Register (MDR)
Quiz - 06
Which register holds the address of the location being accessed and is
connected to the main memory via a one-way (unidirectional)
connection?
A. Instruction Register (IR)
B. Program Counter (PC)
C. Memory Address Register (MAR)
D. Memory Data Register (MDR)
Quiz - 07
What are the next two steps in the instruction fetch process after
the contents of the Program Counter (PC) are transferred to the
Memory Address Register (MAR) and a Read signal is sent to the
Main Memory (MM)?
A. The addressed word is read out of MM and loaded into the MDR;
then the contents of MDR are transferred to the IR.
B. The operand is stored in a general-purpose register, and the
Control Unit generates timing signals.
C. The instruction is decoded, and the PC is incremented.
D. The PC is set to point to the first instruction of the program, and
the MDR is set to zero.
Quiz - 07
What are the next two steps in the instruction fetch process after
the contents of the Program Counter (PC) are transferred to the
Memory Address Register (MAR) and a Read signal is sent to the
Main Memory (MM)?
A. The addressed word is read out of MM and loaded into the
MDR; then the contents of MDR are transferred to the IR.
B. The operand is stored in a general-purpose register, and the
Control Unit generates timing signals.
C. The instruction is decoded, and the PC is incremented.
D. The PC is set to point to the first instruction of the program, and
the MDR is set to zero.
Quiz - 08
What is the primary role of the general-purpose registers (R0
through Rn-1) in the CPU?
A. They temporarily hold operands that have been loaded from the
memory for processing.
B. They hold the instruction that is currently being executed.
C. They hold the addresses of data that need to be transferred to or
from memory.
D. They generate the timing signals that control the processing
elements.
Quiz - 08
What is the primary role of the general-purpose registers (R0
through Rn-1) in the CPU?
A. They temporarily hold operands that have been loaded from
memory for processing.
B. They hold the instruction that is currently being executed.
C. They hold the addresses of data that need to be transferred to or
from memory.
D. They generate the timing signals that control the processing
elements.
Quiz - 09
During a memory read operation (fetch), what information does the
Memory Data Register (MDR) contain?
A. The memory address of the next instruction to be fetched.
B. The instruction that is currently being decoded by the Control
Unit.
C. The data that is being written into the main memory.
D. The data or instruction read out of the addressed location.
Quiz - 09
During a memory read operation (fetch), what information does the
Memory Data Register (MDR) contain?
A. The memory address of the next instruction to be fetched.
B. The instruction that is currently being decoded by the Control
Unit.
C. The data that is being written into the main memory.
D. The data or instruction read out of the addressed location.
Byte Addressability

Bit: Smallest unit of information (0 or 1).

Byte: Always 8 bits.

Word: Group of bits; word length typically 16 to 64 bits.

Assigning addresses to individual bits is impractical.

Modern computers use byte-addressable memory:

Successive addresses refer to successive bytes.

Byte addresses: 0, 1, 2, …

Example: For a 32-bit word (4 bytes), words are at addresses 0, 4, 8, …

Memory Map

• With 32 bits address, the address space span 232

byte = 4GB.

• The address space is divided into five segments

o Text
o Global Data
o Dynamic Data – Stack & Heap
o Segment for Exception handler
o Operating system & I/O
Memory Map – Text Segment

• The text segment stores the machine language user

program.

• In addition to code, it may include literals

(constants) and read-only data.
Memory Map – Global Data
Segment

• The global data segment stores global variables

that can be accessed by all functions in a
program.

• Global variables are typically accessed using the

global pointer register gp that points to the
middle of the global data segment.
Memory Map – Dynamic
Data Segment

• The dynamic data segment holds the stack

and the heap.

• The data in this segment is not known at start-

up but is dynamically allocated and
deallocated throughout the execution of the
program.
Memory Map – Dynamic
Data Segment

• The operating system sets up the stack

pointer (sp) to point to the top of the stack.

• The stack typically grows downward.

• The stack includes temporary storage and

local variables, such as arrays, that do not fit
in the registers.
Memory Map
• The lowest part of the memory map is reserved
for the exception handlers and boot code that is
run at start-up.

• The highest part of the memory map is reserved

for the operating system and memory-mapped
I/O
Quiz - 01
In computer architecture, what is defined as the 'word length' of a
processor?
A. The number of address bits required to access a memory location.
B. The number of bits stored or retrieved in a single basic memory
operation.
C. The total size of the dynamic data segment in the memory map.
D. The total number of storage cells in the main memory.
Quiz - 01
In computer architecture, what is defined as the 'word length' of a
processor?
A. The number of address bits required to access a memory location.
B. The number of bits stored or retrieved in a single basic memory
operation.
C. The total size of the dynamic data segment in the memory map.
D. The total number of storage cells in the main memory.
Quiz - 02

If a computer has k address bits, what is the maximum number of

addressable locations it can have?

A. 2k

B. 2k−1

C. 2k

D. k2
Quiz - 02

If a computer has k address bits, what is the maximum number of

addressable locations it can have?

A. 2k

B. 2k−1

C. 2k

D. k2
Quiz - 03
In a 32-bit word-length computer that uses byte-addressable memory,
what would be the address of the third consecutive word if the first
word is at address 0?
A. 8
B. 12
C. 2
D. 4
Quiz - 03
In a 32-bit word-length computer that uses byte-addressable memory,
what would be the address of the third consecutive word if the first
word is at address 0?
A. 8
B. 12
C. 2
D. 4
Quiz - 04

Which segment of the memory map is specifically responsible for

storing variables that can be accessed by all functions?

A. Text Segment

B. Global Data Segment

C. Exception Handler Segment

D. Stack
Quiz - 04

Which segment of the memory map is specifically responsible for

storing variables that can be accessed by all functions?

A. Text Segment

B. Global Data Segment

C. Exception Handler Segment

D. Stack
Quiz - 05
What is the primary role of the Program Counter (PC) in the
connection between the processor and memory?
A. It holds the address of the location to or from which data are to
be transferred.
B. It contains the data to be written or read out of the addressed
location.
C. It contains the memory address of the next instruction to be
fetched and executed.
D. It temporarily stores the operand data to be processed.
Quiz - 05
What is the primary role of the Program Counter (PC) in the
connection between the processor and memory?
A. It holds the address of the location to or from which data are to
be transferred.
B. It contains the data to be written or read out of the addressed
location.
C. It contains the memory address of the next instruction to be
fetched and executed.
D. It temporarily stores the operand data to be processed.
Quiz - 06

Regarding the Dynamic Data Segment, how does the stack typically
grow in the memory map?

A. It grows downward toward lower addresses.

B. It grows into the Text segment.

C. It remains at a fixed size determined at start-up.

D. It grows upward toward higher addresses.

Quiz - 06

Regarding the Dynamic Data Segment, how does the stack typically
grow in the memory map?

A. It grows downward toward lower addresses.

B. It grows into the Text segment.

C. It remains at a fixed size determined at start-up.

D. It grows upward toward higher addresses.

Quiz - 07
Which part of the memory map is reserved for the operating system
and memory-mapped I/O?

A. The highest part of the memory map.

B. The Text segment.

C. The middle part (Global Data).

D. The lowest part of the memory map.

Quiz - 07
Which part of the memory map is reserved for the operating system
and memory-mapped I/O?

A. The highest part of the memory map.

B. The Text segment.

C. The middle part (Global Data).

D. The lowest part of the memory map.

Quiz - 08
What is the role of the 'Global Pointer' (gp) in the memory map?

A. It points to the memory-mapped I/O area.

B. It points to the top of the stack for local variables.

C. It points to the next instruction in the Text segment.

D. It points to the middle of the global data segment to facilitate

access to global variables.
Quiz - 08
What is the role of the 'Global Pointer' (gp) in the memory map?

A. It points to the memory-mapped I/O area.

B. It points to the top of the stack for local variables.

C. It points to the next instruction in the Text segment.

D. It points to the middle of the global data segment to facilitate

access to global variables.
Quiz - 09
Consider a byte addressable 32bit system. The memory size of the
system is 4GB. Then what is the size of the address bit.

A. 30 bits

B. 32 bits

C. 34 bits

D. 36 bits
Quiz - 09
Consider a byte addressable 32bit system. The memory size of the
system is 4GB. Then what is the size of the address bit.

A. 30 bits

B. 32 bits

C. 34 bits

D. 36 bits
Quiz - 10
Besides the machine language user program, what other types of
information are typically stored in the 'Text' segment of the memory
map?

A. Dynamic data such as the heap.

B. Global variables and the global pointer.

C. Literals (constants) and read-only data.

D. The operating system and I/O maps.

Quiz - 10
Besides the machine language user program, what other types of
information are typically stored in the 'Text' segment of the memory
map?

A. Dynamic data such as the heap.

B. Global variables and the global pointer.

C. Literals (constants) and read-only data.

D. The operating system and I/O maps.

Endianness

• Byte-addressable memories are

organized in a big-endian or
little-endian fashion.

• In big-endian machines, bytes

are numbered starting with 0 at
the big (most significant) end.
Endianness
• In little-endian machines, bytes
are numbered starting with 0 at
the little (least significant) end.

• In both formats, a 32-bit word’s

most significant byte (MSB) is on
the left and the least significant
byte (LSB) is on the right.
Endianness

• Word addresses are the same in

both formats and refer to the same
four bytes.

• RISC-V and Intel’s x86 architecture

typically use little-endian, and
IBM’s PowerPC uses big-endian
addressing.
Endianness

• Little Endian
• Address Byte stored
o0x1000 0x78 ← LSB
o0x1001 0x56
o0x1002 0x34
o0x1003 0x12 ← MSB
Endianness

• Big Endian

• Address Byte stored

o 0x1000 0x12 ← MSB

o 0x1001 0x34

o 0x1002 0x56

o 0x1003 0x78 ← LSB

RISC

RISC - Reduced Instruction Set Computer

Includes simple instructions and takes one cycle.

The fundamental goal of RISC is to make hardware simpler by

employing an instruction set that consists of only a few basic steps
used for evaluating, loading, and storing operations.
RISC - Sample Example

• Add two number from LOC1 and LOC2 and save to LOC3
LOAD R1, LOC1
LOAD R2, LOC2
ADD R3, R1, R2
STORE R3, LOC3
CISC - Sample Example

• Add two number from LOC1 and LOC2 and save to LOC3
ADD LOC3, LOC1, LOC2
Assembly Language

• Assembly language is the human-readable representation of the

computer’s native language.

• Each assembly language instruction specifies both the operation

to perform and the operands on which to operate.

• An instructions contain two parts: mnemonic and operands

Assembly Language
• Mnemonic in the instruction specifies which operation to be
performed.

• Operands provides the data on which operation needs to be

performed.

• Operands can be classified into

o Source operands
o Destination operand
Design 1: Regularity Supports Simplicity

add and sub --> mnemonics

b and c are the source operands
a is the destination operand
Design 1: Regularity Supports Simplicity

• In RISC-V assembly language, only single-line comments

are used.
• They begin with a hash symbol (#) and continue until the
end of the line.
 Quiz - 01
What is the fundamental goal of a CISC (Complex Instruction Set Computer)
architecture?

A) To use only a single clock cycle for every instruction.

B) To have a single instruction handle all evaluating, loading, and storing operations.

C) To maximize the number of general-purpose registers available.

D) To ensure all instructions are of a fixed length

Quiz - 01
What is the fundamental goal of a CISC (Complex Instruction Set Computer)
architecture?

A) To use only a single clock cycle for every instruction.

B) To have a single instruction handle all evaluating, loading, and storing operations.

C) To maximize the number of general-purpose registers available.

D) To ensure all instructions are of a fixed length

Quiz - 02

Which of the following is a characteristic of CISC instructions?

A) They are typically one-word in size.

B) They use simple addressing modes.

C) They may take more than one clock cycle to execute.

D) They are always inexpensive to manufacture.

Quiz - 02

Which of the following is a characteristic of CISC instructions?

A) They are typically one-word in size.

B) They use simple addressing modes.

C) They may take more than one clock cycle to execute.

D) They are always inexpensive to manufacture.

Quiz - 03
In a RISC architecture, how would you typically perform the operation "Add two
numbers from LOC1 and LOC2 and save to LOC3"?

A) By using a single ADD LOC3, LOC1, LOC2 instruction.

B) By using a combination of LOAD, ADD, and STORE instructions.

C) By performing the operation directly in memory without registers.

D) RISC architectures cannot perform additions between memory locations.

Quiz - 03
In a RISC architecture, how would you typically perform the operation "Add two
numbers from LOC1 and LOC2 and save to LOC3"?

A) By using a single ADD LOC3, LOC1, LOC2 instruction.

B) By using a combination of LOAD, ADD, and STORE instructions.

C) By performing the operation directly in memory without registers.

D) RISC architectures cannot perform additions between memory locations.

Quiz - 04
Which of these is an example of a RISC chip?

A) Intel architecture

B) AMD

C) POWER PC

D) All of the above

Quiz - 04
Which of these is an example of a RISC chip?

A) Intel architecture

B) AMD

C) POWER PC

D) All of the above

Quiz - 05
What is the term used for the "vocabulary" of words that a specific computer's
hardware understands?

A) Mnemonics

B) Assembly Language

C) Instruction Set

D) Machine Language
Quiz - 05
What is the term used for the "vocabulary" of words that a specific computer's
hardware understands?

A) Mnemonics

B) Assembly Language

C) Instruction Set

D) Machine Language
Quiz - 06
Because computer hardware only understands 1’s and 0’s, instructions are encoded in
a format called:

A) Machine language

B) Assembly language

C) Mnemonics

D) Symbolic format
Quiz - 06
Because computer hardware only understands 1’s and 0’s, instructions are encoded in
a format called:

A) Machine language

B) Assembly language

C) Mnemonics

D) Symbolic format
Quiz - 07
In Assembly Language, which part of the instruction specifies the operation to be
performed?

A) Source operand

B) Destination operand

C) Mnemonic

D) Hash symbol (#)

Quiz - 07
In Assembly Language, which part of the instruction specifies the operation to be
performed?

A) Source operand

B) Destination operand

C) Mnemonic

D) Hash symbol (#)

Quiz - 08

How are comments represented in RISC-V assembly language?

A) Using a semicolon (;) at the start of the line.

B) Using a hash symbol (#) at the beginning of the comment.

C) Using double slashes (//) like in high-level code.

D) RISC-V does not support single-line comments.

Quiz - 08

How are comments represented in RISC-V assembly language?

A) Using a semicolon (;) at the start of the line.

B) Using a hash symbol (#) at the beginning of the comment.

C) Using double slashes (//) like in high-level code.

D) RISC-V does not support single-line comments.

Quiz - 09
Which of the following is a characteristic of RISC (Reduced Instruction Set Computer)
architecture?

A) It uses complex instructions of variable length.

B) Instructions are executed in one clock cycle.

C) It features fewer general-purpose registers than CISC.

D) It relies on complex addressing modes.

Quiz - 09
Which of the following is a characteristic of RISC (Reduced Instruction Set Computer)
architecture?

A) It uses complex instructions of variable length.

B) Instructions are executed in one clock cycle.

C) It features fewer general-purpose registers than CISC.

D) It relies on complex addressing modes.

Quiz - 10

In an assembly language instruction, operands can be classified as:

A) Logic and Arithmetic operands.

B) Mnemonics and Source operands.

C) Source operands and Destination operands.

D) Binary and Hexadecimal operands.

Quiz - 10

In an assembly language instruction, operands can be classified as:

A) Logic and Arithmetic operands.

B) Mnemonics and Source operands.

C) Source operands and Destination operands.

D) Binary and Hexadecimal operands.

 • The number of instructions is kept small so that
the hardware required to decode the
instruction and its operands can be simple,
small, and fast.
Design 2:
o Consider a “string move” instruction in CISC that
Make the copies a string (a series of characters) from one part
common of memory to another.

case fast o Requires hundreds of simple instructions in a RISC

machine.
o The cost of implementing complex instructions in a
CISC architecture is added hardware and overhead
that slows down the simple instructions.
Operands

An instruction operates on operands.

Operands can be stored in registers or memory, or they may be constants

stored in the instruction itself.

Operands stored as constants or in registers are accessed quickly, but they

hold only a small amount of data.

Additional data must be accessed from memory, which is large but slow.
Design 3: Smaller is fast

Most architectures specify a small number of registers that hold

commonly used operands.

The RISC-V architecture has 32 registers, called the register set,

stored in a small multiported memory called a register file.

The fewer the registers, the faster they can be accessed.

Register Set
Register Set
 • Write a RISC-V code to implement
Program a = b − c;
f = (g + h) − (i + j);
 # s0 = a, s1 = b, s2 = c, s3 = f, s4 = g, s5 = h,
s6 = i, s7 = j
sub s0, s1, s2 # a = b − c
Program add t0, s4, s5 # t0 = g + h
add t1, s6, s7 # t1 = i + j
sub s3, t0, t1 # f = (g + h) − (i + j)
Constant

RISC-V instructions can use constant or

immediate operands.

These constants are called immediates because

their values are immediately available from the
instruction and do not require a register or memory
access.

Immediates can be written in decimal,

hexadecimal, or binary.
Constant

Instructions that put the decimal value 109 into s5:

addi s5,x0,0b1101101

addi s5,x0,0x6D

addi s5,x0,109
 Quiz - 01
According to the 'Make the common case fast' design principle, why is the number
of instructions in a RISC architecture kept small?

A) To allow hardware to be simple, small, and fast for decoding.

B) To increase the cost of implementing simple instructions.

C) To ensure that string move operations can be completed in a single cycle.

D) To mimic the behavior of CISC architectures.

 Quiz - 01
According to the 'Make the common case fast' design principle, why is the number
of instructions in a RISC architecture kept small?

A) To allow hardware to be simple, small, and fast for decoding.

B) To increase the cost of implementing simple instructions.

C) To ensure that string move operations can be completed in a single cycle.

D) To mimic the behavior of CISC architectures.

Quiz - 02
What is the primary trade-off mentioned regarding operands stored in memory versus those in
registers?

A) Registers are slow but can hold a massive amount of data.

B) There is no speed difference between register and memory access.

C) Memory is large but slow, while registers are fast but hold limited data.

D) Memory is faster but holds less data than registers.

Quiz - 02
What is the primary trade-off mentioned regarding operands stored in memory versus those in
registers?

A) Registers are slow but can hold a massive amount of data.

B) There is no speed difference between register and memory access.

C) Memory is large but slow, while registers are fast but hold limited data.

D) Memory is faster but holds less data than registers.

Quiz - 03

How many registers are typically found in the RISC-V register set?

A) 64 registers

B) 16 registers

C) 32 registers

D) 128 registers
Quiz - 03

How many registers are typically found in the RISC-V register set?

A) 64 registers

B) 16 registers

C) 32 registers

D) 128 registers
Quiz - 04

In RISC-V assembly, what is the purpose of 'temporary' registers like t0 and t1?

A) To keep track of the stack pointer.

B) To hold intermediate results of an expression during calculation.

C) To store constant values that never change.

D) To store the final return value of a function.

Quiz - 04

In RISC-V assembly, what is the purpose of 'temporary' registers like t0 and t1?

A) To keep track of the stack pointer.

B) To hold intermediate results of an expression during calculation.

C) To store constant values that never change.

D) To store the final return value of a function.

Quiz - 05
Which RISC-V instruction would you use to perform the operation a=b−c, assuming the variables are
in registers s0, s1, and s2?

A) lw s0, s1, s2

B) sub s0, s1, s2

C) subi s0, s1, s2

D) add s0, s1, s2

Quiz - 05
Which RISC-V instruction would you use to perform the operation a=b−c, assuming the variables are
in registers s0, s1, and s2?

A) lw s0, s1, s2

B) sub s0, s1, s2

C) subi s0, s1, s2

D) add s0, s1, s2

 Quiz - 06

Why are constant operands in RISC-V called 'immediates'?

A) Because their values are immediately available within the instruction itself.

B) Because they must be processed immediately before any other instruction.

C) Because they disappear immediately after the program ends.

D) Because they are only used for immediate branching.

 Quiz - 06

Why are constant operands in RISC-V called 'immediates'?

A) Because their values are immediately available within the instruction itself.

B) Because they must be processed immediately before any other instruction.

C) Because they disappear immediately after the program ends.

D) Because they are only used for immediate branching.

Quiz - 07
Which of the following is a valid way to write the decimal value 109 as an immediate in a RISC-V addi
instruction?

A) 0x6D

B) 0b1101101

C) 109

D) All of the above

Quiz - 07
Which of the following is a valid way to write the decimal value 109 as an immediate in a RISC-V addi
instruction?

A) 0x6D

B) 0b1101101

C) 109

D) All of the above

Quiz - 08

How does RISC-V handle data stored in memory that needs to be processed?

A) It converts the memory address into an immediate operand.

B) It uses the 'sw' instruction to read the data into the ALU.

C) It processes the data directly in the memory location.

D) It moves the data to a register before processing.

Quiz - 08

How does RISC-V handle data stored in memory that needs to be processed?

A) It converts the memory address into an immediate operand.

B) It uses the 'sw' instruction to read the data into the ALU.

C) It processes the data directly in the memory location.

D) It moves the data to a register before processing.

Quiz - 09

RISC-V memory is described as 'byte addressable.' What does this mean?

A) Only one byte can be stored in the entire register file.

B) Each byte (8 bits) in memory has its own unique address.

C) Every 32 bits of memory has a unique address.

D) Instructions can only be one byte long.

Quiz - 09

RISC-V memory is described as 'byte addressable.' What does this mean?

A) Only one byte can be stored in the entire register file.

B) Each byte (8 bits) in memory has its own unique address.

C) Every 32 bits of memory has a unique address.

D) Instructions can only be one byte long.

Quiz - 10

Which instruction is used to write a data word from a register into memory?

A) sub (subtract)

B) lw (load word)

C) addi (add immediate)

D) sw (store word)
Quiz - 10

Which instruction is used to write a data word from a register into memory?

A) sub (subtract)

B) lw (load word)

C) addi (add immediate)

D) sw (store word)
 • Assembler directives guide the assembler
in

Assembly oallocating and initializing global

Directive variables,

odefining constants, and

odifferentiating between code and data.
 • .data directive places data in the global
data segment.

• .text directive places code in the text

Assembly (code) segment.
Directive • .bss directive places variables in the BSS
segment, which is zero-initialized.

• .section .rodata places constant data in

the read-only data segment (.rodata).
 • BSS stands for block started symbol, and it
was initially a keyword to allocate a block
of uninitialized data.

• Now, most operating systems initialize

Assembly data in the BSS segment to zero.
Directive
• The BSS segment is located in the global
data segment but is initialized to zero.

• The read-only data segment is constant data

that is placed in the text segment.
Assembly Directive - Example

.globl main # make the main label global

.equ N, 5 # N = 5

A: .word 5, 42

str1: .string "RISC-V"

Assembly Directive - Example

.align 2 # align next data on 2^2-byte boundary

B: .word 0x32A
 • An assembler turns the assembly language
code into an object file containing machine
language code.

• The assembler makes two passes through the

Assembling assembly code.

• During the first pass, the assembler assigns

instruction addresses and finds all of the
symbols, such as labels and global variable
names.
 • The names and addresses of the symbols are
kept in a symbol table.

• On the second pass through the code, the

assembler produces the machine language
Assembling code.

• Addresses for labels are taken from the

symbol table.

• The machine language code and symbol table

are stored in the object file.
 Quiz - 01
What is the primary function of assembler directives in a program?

A) To convert high-level C++ code directly into machine language.

B) To guide the assembler in allocating variables and differentiating between code and
data.

C) To execute complex mathematical calculations in the CPU.

D) To manage the power consumption of the processor during idle cycles.

 Quiz - 01
What is the primary function of assembler directives in a program?

A) To convert high-level C++ code directly into machine language.

B) To guide the assembler in allocating variables and differentiating between code

and data.

C) To execute complex mathematical calculations in the CPU.

D) To manage the power consumption of the processor during idle cycles.

Quiz - 02

In modern operating systems, what is the specific characteristic of the BSS segment?

A) It contains the machine language instructions of the program.

B) It is located inside the CPU's register file.

C) It is initialized to zero by the operating system.

D) It stores read-only constant data.

Quiz - 02

In modern operating systems, what is the specific characteristic of the BSS segment?

A) It contains the machine language instructions of the program.

B) It is located inside the CPU's register file.

C) It is initialized to zero by the operating system.

D) It stores read-only constant data.

Quiz - 03

What happens during the first pass of a two-pass assembler?

A) The assembler links multiple object files into an executable.

B) The assembler assigns instruction addresses and creates a symbol table.

C) The assembler executes the program to check for logic errors.

D) The assembler produces the final machine language code.

Quiz - 03

What happens during the first pass of a two-pass assembler?

A) The assembler links multiple object files into an executable.

B) The assembler assigns instruction addresses and creates a symbol table.

C) The assembler executes the program to check for logic errors.

D) The assembler produces the final machine language code.

Quiz - 04

Where are the machine language code and the symbol table stored after assembly?

A) In the BIOS

B) In the object file

C) In the source file (.s)

D) In the CPU cache

Quiz - 04

Where are the machine language code and the symbol table stored after assembly?

A) In the BIOS

B) In the object file

C) In the source file (.s)

D) In the CPU cache

Quiz - 05

Which directive would you use to define a constant value, such as N = 5?

A) .align

B) .globl

C) .word

D) .equ
Quiz - 05

Which directive would you use to define a constant value, such as N = 5?

A) .align

B) .globl

C) .word

D) .equ
 Quiz - 06

How does the assembler handle labels during the second pass?

A) It deletes all labels to save memory.

B) It prompts the user to manually enter the address for each label.

C) It renames all labels to random numbers for security.

D) It takes the addresses for the labels from the symbol table to produce machine code.
 Quiz - 06

How does the assembler handle labels during the second pass?

A) It deletes all labels to save memory.

B) It prompts the user to manually enter the address for each label.

C) It renames all labels to random numbers for security.

D) It takes the addresses for the labels from the symbol table to produce machine code.
Quiz - 07

The .rodata directive is used for constant data. In which segment is this data typically placed?

A) Stack segment

B) Text (code) segment

C) BSS segment

D) Register segment
Quiz - 07

The .rodata directive is used for constant data. In which segment is this data typically placed?

A) Stack segment

B) Text (code) segment

C) BSS segment

D) Register segment
Programming Concept

High-Level Language: A programming language that uses human-

readable syntax to describe operations, such as a = b - c;, which are
later translated into machine-specific code.

Assembly Language: A low-level language that uses mnemonics

(symbolic names like add or sub) to represent the specific
instructions understood by a computer's hardware
Programming Concept

Assembly Language: Move

High-Level Language: Make
left arm 10 inches, grip the
me a peanut butter
jar lid, rotate 90 degrees
sandwich.
counter-clockwise.

Example Courtesy: Google Gemini

Program Flow

Each instruction is 32 bits (4 bytes) long, so consecutive instruction

addresses increase by four.

The Program Counter (PC) serves as a tracker that holds the memory
address of the instruction currently being executed by the processor.

To move through a program, the PC automatically increments its value by

four after each instruction to fetch the next one from memory.
Multiply Instruction

The RISC-V architecture provides various multiply instructions that result

in 32- or 64-bit products.

The multiply instruction (mul) multiplies two 32-bit numbers and produces
a 32-bit product.

mul s1, s2, s3 multiplies the values in s2 and s3 and places the least
significant 32 bits of the product in s1; the most significant 32 bits of the
product are discarded.
Multiply Instruction

Three versions of the “multiply high” operation

exist:
• mulh (multiply high signed signed) treats both operands as
signed,
• mulhsu (multiply high signed unsigned) treats the first
operand as signed and the second as unsigned, and
• mulhu (multiply high unsigned unsigned) treats both
operands as unsigned.

These instructions put the high 32 bits of the

multiplication result in the destination register.
Branching

Branch instructions modify the flow of the program so that the processor can
fetch instructions that are not in sequential order in memory.

They modify the PC to skip over sections of code or to repeat previous code.

Conditional branch instructions perform a test and branch only if the test is
TRUE.

Unconditional branch instructions, called jumps, always branch.

Conditional Branch

The RISC-V instruction set has six

conditional branch instructions.

Each of which take two source

registers and a label indicating
where to go.

beq (branch if equal) branches

when the values in the two source
registers are equal.
if Statement
An if statement executes a block of code, the if block,
only when a condition is met.
 • If/else statements execute one of two blocks of
if else code, depending on a condition.
Statement • When the condition in the if statement is met, the
if block is executed.
• Otherwise, the else block is executed.
while Loop • While loops repeatedly execute a block of code while
a condition is met, that is, until a condition is not met.
for Loop
• Combines the initialization, condition check, and variable change in one place.

• The high-level code format of the for loop is:

for (initialization; condition; loop operation)
statement

• The initialization code executes before the for loop begins.

• The condition is tested at the beginning of each loop iteration.

• If the condition is not met, the loop exits.

• If the condition is met, the statement (or statements) in the loop body are executed.
Arrays

• An array stores its contents at

sequential addresses in memory.

• Each array element is identified by

a number called its index.

• The number of elements in an array

is called its length.
Arrays
• Each consecutive
element address
increases by 4, the
number of bytes in an
integer.
• The address of the 0th
element of an array is
called the array’s base
address.
Function Call

Functions (also called procedures or subroutines) is used to reuse common

code and to make a program more modular and readable.

Functions may have inputs, called arguments, and an output, called the
return value.

Functions should calculate the return value and cause no other unintended
side effects.

The calling function, the caller, and the called function, the callee.
Function Call

In RISC-V programs, the caller conventionally places up to eight

arguments in registers $a0 to $a7 before making the function
call, and the callee places the return value in register $v0-$v1
or a0 before finishing.

The caller stores the return address in the return address

register ra at the same time it jumps to the callee using the
jump and link instruction (jal).
Function Call

The callee must leave the saved registers (s0−s11), the return
address (ra), and the stack, a portion of memory used for
temporary variables, unmodified.

RISC-V uses the jump and link instruction (jal) to call a

function and the jump register instruction (jr) to return from a
function.
Function • The callee must leave the saved registers (s0−s11), the return
address (ra), and the stack, a portion of memory used for temporary

Call
variables, unmodified.
• RISC-V uses the jump and link instruction (jal) to call a function and
the jump register instruction (jr) to return from a function.
Function • jal performs two operations: it stores the address of
next instruction in the return address register ($ra)
and it jumps to the target instruction.
Call
Stack

The stack is a last-in-first-out (LIFO) queue.

The stack pointer, sp (register 2), points to the top of the stack.

The stack pointer (sp) starts at a high memory address and

decrements to expand as needed.

One of the important uses of the stack is to save and restore registers that
are used by a function.
Steps

Makes space on the stack to store the values of one or more registers

Stores the values of the registers on the stack

Executes the function using the registers

Restores the original values of the registers from the stack

Deallocates space on the stack

Preserved Registers

If the calling function does not use registers, the effort to save and
restore them is wasted.

To avoid this waste, RISC-V divides registers into preserved and

nonpreserved categories.

Preserved registers must contain the same values at the beginning

and end of a called function because the caller expects preserved
register values to be the same after the call.
 • The caller must save any nonpreserved registers containing
essential information before making a function call and then
Preserved restore these registers afterward.
• Preserved registers are also called callee-saved and
Registers nonpreserved registers are called caller-saved.
Instruction Execution Cycle
• Also called Fetch-Decode-Execute Cycle.

• Fundamental process a CPU uses to run programs, involving

o fetching an instruction from memory,
o decoding it to understand the operation, and
o then executing it,
o often with a final write-back step for results, repeating continuously for
each instruction
Stages – Fetch Cycle

The address in PC is transferred to MAR.

Control Unit sends a read signal to memory.

The instruction at that memory address is placed into MDR.

MDR contents are transferred to IR.

PC is incremented to point to the next instruction.

Stages – Decode Cycle
• In the Decode Cycle, the Control Unit interprets the fetched instruction stored in the
IR.

• Steps in Decode Cycle:

o Control Unit checks the opcode part of the instruction.

o Determines what operation to perform.

o Identifies the operand(s) or registers involved.

Stages – Execute Cycle
• Finally, the Execute Cycle performs the actual operation determined during the
decode stage.

• Steps in Execute Cycle:

o Depending on the opcode, the CPU perform operations.

o Perform arithmetic or logical operations via the ALU.

o Transfer data between memory and registers.

o Change the sequence of execution (e.g., jump instructions).

Machine Language

Assembly language is convenient for humans to read.

RISC-V uses 32-bit instructions.

Digital circuits understand only 1’s and 0’s.

A program written in assembly language is translated from mnemonics to a

representation using only 1’s and 0’s, called machine language.
 • Use three registers as operands: two as sources
R-Type(Register and one as a destination.

Type) • 7-bit op (also called opcode or operation code).

• The two source registers and the destination
Instruction register are encoded in the three fields: rs1, rs2,
and rd.
 • The specific R-type operation is determined
R-Type(Register by the opcode and the function fields (funct7
and funct3).
Type) • These bits together are called the control
Instruction bits because they control what operation to
perform.
R-Type(Register Type) Instruction

• The opcode and function fields for the

o add instruction are o sub instruction has
▪ op = 51 (01100112), ▪ op = 51,
▪ funct7 = 0 (00000002) and ▪ funct7 =32 (01000002), and
▪ funct3 = 0 (0002). ▪ funct3 = 0 (0002).
R-Type(Register Type) Instruction

• Other R-type instructions include shifts (sll, srl, and sra) and
logical operations (and, or, and xor).
B Instruction
U Instructions
J Instructions
Immediate Encoding
RISC-V uses 32-bit signed immediates.

Only 12 to 21 bits of the immediate are encoded in the instruction.

I- and S-type instructions encode 12-bit signed immediates.

J- and B-type instructions use 21- and 13-bit signed immediates, where
the least significant bit is always 0.

U-type instructions encode the top 20 bits of a 32-bit immediate.