NAND GATE DECODER
Some IC decoders are constructed with NAND gates.
• Since a NAND gate produces the AND operation
with an inverted output,
A decoder is combination circuit that converts
binary information from ‘n inputs to 2 power of n
outputs .
it becomes more economical to generate the
decoder minterms in their complemented form.
A 2-to-4-line decoder with an enable input
constructed with NAND gates
The circuit operates with complementary outputs
and a complemented enable input E.
Block diagram:
Circuit diagram for 2 to 4 line decoder
Truth table for 2 to 4 line decoder
All outputs are equal to 1 if enable input is 1, regardless of
the values of inputs A and B.
When the enable input is 0, the circuit operates as a
decoder with complemented outputs. The truth table lists
these conditions.
The X’s under A and B are don’t-care conditions.
Normal decoder operations occurs only with E = 0, and the
outputs are selected when they are in the 0 state