MICROPROCESSOR & MICROCONTROLLER

AKTU Exam Preparation — Most Important Topics

Based on Past Papers: 2020-21, 2022-23, 2023-24, 2024-25

⚡HOT = Appeared in 3–4 out of 4 years | ⚡ IMPORTANT = Appeared in 2–3 years

SECTION A — 2-Mark Questions (Must Know All)

8085 Basics
Topic Why Important
Significance / role of Accumulator in 8085 Asked in 3 out of 4 years
Role of temporary registers in 8085 Repeated in 2 years — easy 2 marks
Flag register of 8085 — draw and explain each flag Core concept, asked every year
(S, Z, AC, P, CY)
16-bit registers in 8085 (Stack Pointer, Program Direct 2-mark question
Counter, IR)
LDA instruction of 8085 — define 2024-25 paper direct question
Which interrupt has highest priority? (Answer: MCQ-style, 2 years
TRAP)
List maskable and non-maskable interrupts of 2022-23 and 2020-21
8085
T-state definition and ALE signal activation cycle 2024-25 direct question
Difference between 8085 and 8086 Appears as 2-mark in multiple years

8086 & Memory

Topic Why Important
Min/Max mode of 8086 — what do you 2024-25 direct question
understand?
Flag register of 8086 2023-24 direct question
Instruction queue size of 8086 2024-25 direct question
Need of pre-fetch instruction queue in 8086 2020-21 question
Memory Mapped I/O vs I/O Mapped I/O — 2022-23
difference
ROM vs SRAM vs DRAM — which has faster 2024-25 direct MCQ-type
access time?
8051 Microcontroller
Topic Why Important
PSW (Program Status Word) of 8051 — what is it? Asked in 3 years
RS1 and RS0 bits in 8051 PSW — function Asked in 3 years — most repeated 2-
marker
Register banks in 8051 — utility 2020-21 and 2023-24
TCON and TMOD SFR of 8051 — explain 2023-24 direct question
All interrupts available in 8051 — list 3 years
Difference: microprocessor vs microcontroller 3 years — prepare a table

DMA, Peripherals & Programming

Topic Why Important
Direct Memory Access (DMA) — explain 3 out of 4 years
Control signals used for DMA operation 2023-24 direct question
8255 — which port used in all modes? Which for 2023-24
handshake?
Types of buses in 8085 — address, data, control 2023-24 direct question
Looping, Indexing, Counting in 8085 — 2023-24
programming techniques
JMP vs CALL instruction — difference 2022-23 direct question

SECTION B & C — 7/10-Mark Long Answer Questions

🔥 HOT Topics — All 4 Years (Never Skip)
1. 8085 Architecture & Pin Diagram
• Draw the complete architecture/block diagram of 8085 with all functional blocks
• Explain: ALU, Registers, Timing & Control unit, Address/Data Bus, Interrupt Control, Serial I/O
• Draw pin diagram of 8085 — explain all 40 pins
• Combined question: architecture + all registers with their sizes

2. Interrupts in 8085
• List all 5 hardware interrupts: TRAP, RST 7.5, RST 6.5, RST 5.5, INTR
• Priority order: TRAP > RST 7.5 > RST 6.5 > RST 5.5 > INTR
• Maskable vs Non-maskable: TRAP is non-maskable; rest are maskable via SIM/EI/DI
• Software interrupts: RST 0 to RST 7 — all 8 restart instructions
• INTR (hardware) — requires INTA response; edge/level triggered types
3. DMA Controllers — 8257 and 8237
• 8257 DMA Controller — functional block diagram, 4 channels, working
• 8237 DMA Controller — block diagram, modes (single, block, demand, cascade)
• DMA process: CPU releases bus, DMAC takes over, transfers data directly to memory
• HOLD and HLDA signals for DMA bus request/acknowledge

4. 8051 Architecture & Pin Diagram

• Draw architecture of 8051 with all blocks: CPU, RAM (128B), ROM (4KB), Timers, Serial port,
I/O ports
• Pin diagram of 8051 — explain all 40 pins including Port 0-3, EA, ALE, PSEN, RST
• Internal data memory organization: register banks (00H-1FH), bit-addressable area (20H-2FH),
general purpose (30H-7FH), SFR (80H-FFH)
• Features of 8051: 8-bit CPU, 4KB ROM, 128B RAM, 4 I/O ports, 2 timers, 5 interrupt sources

⚡ Important Topics — 2–3 Years

5. 8086 Microprocessor
• Pin diagram of 8086 — explain all 40 pins (asked 2 years as long answer)
• Memory segmentation: CS (code), DS (data), SS (stack), ES (extra) — 1MB addressable
• Segment: Offset addressing, Physical address = Segment x 10H + Offset
• Addressing modes of 8086: Register, Immediate, Direct, Register Indirect, Based, Indexed,
Based-Indexed
• Read cycle timing diagram — Minimum mode (8086): T1, T2, T3, T4 states
• Types of interrupts in 8086: Hardware (NMI, INTR), Software (INT n), Exceptions

6. 8255 PPI (Programmable Peripheral Interface)

• Functional block diagram of 8255 — 3 ports (A, B, C) and Control Word Register
• Mode 0 (Basic I/O), Mode 1 (Strobed I/O with handshake), Mode 2 (Bidirectional — Port A only)
• Control word format: D7=1 for I/O mode, D7=0 for bit set/reset
• Pin diagram of 8255 with all pins explained

7. Opcode Fetch & Timing Diagrams

• Opcode fetch cycle in 8085: 4 T-states — T1 (address out), T2 (ALE, RD low), T3 (data in), T4
(decode)
• ALE (Address Latch Enable) is activated during T1 of every machine cycle
• Read cycle timing diagram for 8086 Minimum mode — draw with T1-T4 and all signals

8. 8051 Timers & Interrupts

• TMOD register: GATE, C/T, M1, M0 bits — 4 timer modes (0,1,2,3)
• TCON register: TF1, TR1, TF0, TR0, IE1, IT1, IE0, IT0
• 5 interrupts in 8051: INT0, INT1, Timer0, Timer1, Serial — priority order
• IE SFR (Interrupt Enable) and IP SFR (Interrupt Priority) — explain all bits

9. Assembly Language Programs (Must Practice)

• Add two 16-bit numbers using 8085 (use ADC for carry propagation)
• Find the largest/highest number from a given array in 8085
• Hexadecimal up counter: count from 00H to FFH (1.0 µs clock period)
 • 89H + 79H: calculate accumulator result, and status of S, Z, CY flags
• INX B vs INR B + INR C: illustrate the difference with example
• Time delay calculation: MVI C,FFH / DCR C / JNZ LOOP — calculate delay at 2 MHz
• LXI B,0007H / LOOP: DCX B / JNZ LOOP — how many times does loop execute?

Also Prepare (Moderate Chance)

Topic Appeared In
Addressing modes of 8085 with examples (MVI B,45H / ADD 3 years
B / LDA 2050H)
8085 general-purpose registers + flag register — combined 2 years
Harvard Architecture vs Von Neumann Architecture 2023-24
PIC vs ARM processor — differences and application areas 2023-24
Generations of microprocessors 2022-23
8254 timer — 6 operating modes 2022-23
DAC interfacing with 8051 + program to generate sine wave 2022-23
Addressing modes of 8051 (Register, Direct, Indirect, 2022-23
Immediate, Indexed)
Memory interfacing: 4KB EPROM + 2KB RAM design for 2022-23
8085
PUSH/POP and CALL/RETURN — differences 2022-23

EXAM STRATEGY
Section A (2-marks): Prepare every single topic in the 2-mark tables above — they are short,
predictable, and heavily repeated.
Section B (attempt 3 of 5): Always safe — 8085 addressing modes, 8255 PPI, assembly programs,
8051 memory organization.
Section C (attempt 1 of 2 in each): 8085 architecture/pin diagram, interrupts, DMA, 8051 architecture
— prepare BOTH options in each pair as they rotate year to year.

Good luck with your exam!