SiT1602B

Low Power, Standard Frequency Oscillator

Features Applications
◼ 52 standard frequencies between 3.57 MHz and ◼ Ideal for DSC, DVC, DVR, IP CAM, Tablets, e-Books,
77.76 MHz SSD, GPON, EPON, etc
◼ 100% pin-to-pin drop-in replacement to quartz-based XO ◼ Ideal for high-speed serial protocols such as: USB,
◼ Excellent total frequency stability as low as ±20 ppm SATA, SAS, Firewire, 100M/1G/10G Ethernet, etc.
◼ Operating temperature from -40°C to 85°C. For 125°C Related products for automotive applications.
and/or -55°C options, refer to SiT1618, SiT8918, SiT8920
For aerospace and defense applications SiTime
◼ Low power consumption of 3.5 mA typical at 1.8 V recommends using only Endura™ SiT8944.
◼ Qualify just one device with 1.62 V to 3.63 V continuous
supply voltage
◼ Standby mode for longer battery life
◼ Fast startup time of 5 ms
◼ LVCMOS/HCMOS compatible output
◼ Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0,
3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm x mm
◼ Instant samples with Time Machine II and Field
Programmable Oscillators
◼ RoHS and REACH compliant, Pb-free, Halogen-free
and Antimony-free
◼ For AEC-Q100 oscillators, refer to SiT8924 and SiT8925

Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and nominal supply voltage.
Table 1. Electrical Characteristics
Parameters Symbol Min. Typ. Max. Unit Condition
Frequency Range
Output Frequency Range f 52 standard frequencies between MHz Refer to Table 13 for the exact list of supported frequencies
3.57 MHz and 77.76 MHz
Frequency Stability and Aging
Frequency Stability F_stab -20 – +20 ppm Inclusive of initial tolerance at 25°C, 1st year aging at 25°C,
and variations over operating temperature, rated power
-25 – +25 ppm
supply voltage and load.
-50 – +50 ppm
Operating Temperature Range
Operating Temperature Range T_use -20 – +70 °C Extended Commercial
-40 – +85 °C Industrial
Supply Voltage and Current Consumption
Supply Voltage Options Vdd_1.8 1.62 1.8 1.98 V Contact SiTime for 1.5 V support
Vdd_2.5 2.25 2.5 2.75 V
Vdd_2.8 2.52 2.8 3.08 V
Vdd_3.0 2.7 3.0 3.3 V
Vdd_3.3 2.97 3.3 3.63 V
Vdd_XX 2.25 – 3.63 V
Vdd_YY 1.62 – 3.63 V
Current Consumption Idd No load condition, f = 20 MHz, Vdd_2.8, Vdd_3.0, Vdd_3.3,
– 3.8 4.5 mA
Vdd_XX, Vdd_YY
– 3.7 4.2 mA No load condition, f = 20 MHz, Vdd_2.5
– 3.5 4.1 mA No load condition, f = 20 MHz, Vdd_1.8
OE Disable Current I_OD Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX, Vdd_YY.
– – 4.2 mA
OE = GND, Output in high-Z state
– – 4.0 mA Vdd_1.8. OE = GND, Output in high-Z state
Standby Current I_std ST = GND, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX, Vdd_YY.
– 2.6 4.3 A
Output is weakly pulled down
– 1.4 2.5 A ST = GND, Vdd_2.5, Output is weakly pulled down
– 0.6 1.3 A ST = GND, Vdd_1.8, Output is weakly pulled down

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SiT1602B Low Power, Standard Frequency Oscillator

Table 1. Electrical Characteristics (continued)

Parameters Symbol Min. Typ. Max. Unit Condition
LVCMOS Output Characteristics
Duty Cycle DC 45 – 55 % All Vdds. See Duty Cycle definition in Figure 3 and Footnote 6
Rise/Fall Time Tr, Tf – 1 2 ns 20% - 80% Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3
– 1.3 2.5 ns 20% - 80% Vdd_1.8
– – 2 ns 20% - 80% Vdd_XX
– – 2.7 ns 20% - 80% Vdd_YY
Output High Voltage VOH 90% – – Vdd IOH = -4 mA (Vdd_3.0 and Vdd_3.3)
IOH = -3 mA (Vdd_2.8 and Vdd_ 2.5)
IOH = -2 mA (Vdd_1.8)
Output Low Voltage VOL – – 10% Vdd IOH = -4 mA (Vdd_3.0 and Vdd_3.3)
IOH = -3 mA (Vdd_2.8 and Vdd_ 2.5)
IOH = -2 mA (Vdd_1.8)
Input Characteristics
Input High Voltage VIH 70% – – Vdd Pin 1, OE or ST
Input Low Voltage VIL – – 30% Vdd Pin 1, OE or ST
Input Pull-up Impedance Z_in 50 87 150 k Pin 1, OE logic high or logic low, or ST logic high
2 – – M Pin 1, ST logic low
Startup and Resume Timing
Startup Time T_start – – 5 ms Measured from the time Vdd reaches its rated minimum value
Enable/Disable Time T_oe – – 138 ns f = 77.76 MHz. For other frequencies,
T_oe = 100 ns + 3*cycles
Resume Time T_resume – – 5 ms Measured from the time ST pin crosses 50% threshold
Jitter
RMS Period Jitter T_jitt – 1.8 3 ps f = 75 MHz, Vdd_1.8, Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3,
Vdd_XX,
– – 3.3 ps f = 75 MHz, Vdd_YY
Peak-to-peak Period Jitter T_pk – 12 25 ps f = 75 MHz, Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX,
Vdd_YY
– 14 30 ps f = 75 MHz, Vdd_1.8
RMS Phase Jitter (random) T_phj – 0.5 0.9 ps f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz.
Vdd_1.8, Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX
– 1.3 2 ps f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz.
Vdd_1.8, Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX
– – 1.4 ps f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz.
Vdd_YY
– – 2.3 ps f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz.
Vdd_YY

Table 2. Pin Description

Pin Symbol Functionality
Top View
H[1]: specified frequency output
Output Enable L: output is high impedance. Only output driver is disabled.
H[1]: specified frequency output OE/ST, ̅ ̅ ̅ VDD
OE/ST, ̅ ̅ ̅
1 Standby L: output is low (weak pull down). Device goes to sleep mode. Supply /NC
/NC
current reduces to I_std.

No Connect Any voltage between 0 and Vdd or Open[1]: Specified frequency

output. Pin 1 has no function.
GND OUT
2 GND Power Electrical ground
3 OUT Output Oscillator output
4 VDD Power Power supply voltage[2] Figure 1. Pin Assignments

Notes:
1. In OE or ST, ̅ ̅ ̅ mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven. If pin 1 needs to be left floating, use the NC option.
2. A capacitor of value 0.1 µF or higher between Vdd and GND is required.

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Table 3. Absolute Maximum Limits

Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual perform ance
of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter Min. Max. Unit
Storage Temperature -65 150 °C
Vdd -0.5 4 V
Electrostatic Discharge – 2000 V
Soldering Temperature (follow standard Pb free
– 260 °C
soldering guidelines)
Junction Temperature[3] – 150 °C

Note:
3. Exceeding this temperature for extended period of time may damage the device.

Table 4. Thermal Consideration[4]

Package
JA, 4 Layer Board JA, 2 Layer Board JC, Bottom
(°C/W) (°C/W) (°C/W)
7050 142 273 30
5032 97 199 24
3225 109 212 27
2520 117 222 26
2016 152 252 36

Note:
4. Refer to JESD51 for JA and JC definitions, and reference layout used to determine the JA and JC values in the above table.

Table 5. Maximum Operating Junction Temperature[5]

Max Operating Temperature (ambient) Maximum Operating Junction Temperature
70°C 80°C
85°C 95°C

Note:
5. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.

Table 6. Environmental Compliance

Parameter Condition/Test Method
Mechanical Shock MIL-STD-883F, Method 2002
Mechanical Vibration MIL-STD-883F, Method 2007
Temperature Cycle JESD22, Method A104
Solderability MIL-STD-883F, Method 2003
Moisture Sensitivity Level MSL1 @ 260°C

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SiT1602B Low Power, Standard Frequency Oscillator

Test Circuit and Waveform[6]

Vdd Vout
Test Point tr tf

4 3 80% Vdd
Power 50%
Supply 0.1 uF 15pF
1 2 (including probe 20% Vdd
and fixture
High Pulse
capacitance) Low Pulse
(TH)
(TL)

Vdd Period
OE/ST Function 1 kΩ

Figure 2. Test Circuit Figure 3. Waveform

Note:
6. Duty Cycle is computed as Duty Cycle = TH/Period.

Timing Diagrams

90% Vdd Vdd Vdd

50% Vdd
T_start [7] T_resume
Pin 4 Voltage No Glitch ST Voltage
during start up

CLK Output
CLK Output HZ
HZ

T_start: Time to start from power-off T_resume: Time to resume from ST

Figure 4. Startup Timing (OE/ST, ̅ ̅ ̅ Mode) Figure 5. Standby Resume Timing (ST, ̅ ̅ ̅ Mode Only)

Vdd Vdd
50% Vdd
OE Voltage
T_oe 50% Vdd
OE Voltage

T_oe
CLK Output CLK Output
HZ
HZ

T_oe: Time to re-enable the clock output T_oe: Time to put the output in High Z mode

Figure 6. OE Enable Timing (OE Mode Only) Figure 7. OE Disable Timing (OE Mode Only)

Note:
7. SiT1602 has “no runt” pulses and “no glitch” output during startup or resume.

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SiT1602B Low Power, Standard Frequency Oscillator

Performance Plots[8]

1.8 2.5 2.8 3.0 3.3 DUT1 DUT2 DUT3 DUT4 DUT5
5.2 DUT6 DUT7 DUT8 DUT9 DUT10

5.0 20

4.8 15
4.6
10

Frequency (ppm)
4.4
5
Idd (mA)

4.2

4.0 0

3.8 -5
3.6
-10
3.4
-15
3.2

3.0 -20
-40 -20 0 20 40 60 80
10 20 30 40 50 60 70 80

Figure 8. Idd vs Frequency Figure 9. Frequency vs Temperature

1.8 V 2.5 V 2.8 V 3.0 V 3.3 V

4.0 55

54
3.5
53
RMS period jitter (ps)

3.0
52
Duty cycle (%)
2.5
51

2.0 50

1.5 49

48
1.0
47
0.5
46
0.0
45
10 20 30 40 50 60 70 80
10 20 30 40 50 60 70 80

Figure 10. RMS Period Jitter vs Frequency Figure 11. Duty Cycle vs Frequency

1.8 V 2.5 V 2.8 V 3.0 V 3.3 V 1.8 V 2.5 V 2.8 V 3.0 V 3.3 V

2.5 2.5

2.0 2.0
Fall time (ns)
Rise time (ns)

1.5 1.5

1.0 1.0

0.5 0.5

0.0 0.0
-40 -15 10 35 60 85 -40 -15 10 35 60 85

Figure 12. 20%-80% Rise Time vs Temperature Figure 13. 20%-80% Fall Time vs Temperature

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SiT1602B Low Power, Standard Frequency Oscillator

Performance Plots[8] (continued)

1.8 V 2.5 V 2.8 V 3.0 V 3.3 V 1.8 V 2.5 V 2.8 V 3.0 V 3.3 V

2.0 0.9

1.8 0.8

1.6 0.7

IPJ (ps)
IPJ (ps)

1.4 0.6

1.2 0.5

1.0 0.4
10 20 30 40 50 60 70 80 10 20 30 40 50 60 70 80

Figure 14. RMS Integrated Phase Jitter Random Figure 15. RMS Integrated Phase Jitter Random
(12 kHz to 20 MHz) vs Frequency[9] (900 kHz to 20 MHz) vs Frequency[9]

Notes:
8. All plots are measured with 15 pF load at room temperature, unless otherwise stated.
9. Phase noise plots are measured with Agilent E5052B signal source analyzer. Integration range is up to 5 MHz for carrier frequencies below 40 MHz.

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SiT1602B Low Power, Standard Frequency Oscillator

Programmable Drive Strength High Output Load Capability

The SiT1602 includes a programmable drive strength The rise/fall time of the input clock varies as a function of
feature to provide a simple, flexible tool to optimize the clock the actual capacitive load the clock drives. At any given
rise/fall time for specific applications. Benefits from the drive strength, the rise/fall time becomes slower as the
programmable drive strength feature are: output load increases. As an example, for a 3.3 V SiT1602
device with default drive strength setting, the typical rise/fall
◼ Improves system radiated electromagnetic interference
(EMI) by slowing down the clock rise/fall time time is 1 ns for 15 pF output load. The typical rise/fall time
slows down to 2.6 ns when the output load increases to
◼ Improves the downstream clock receiver’s (RX) jitter by 45 pF. One can choose to speed up the rise/fall time to
decreasing (speeding up) the clock rise/fall time. 1.83 ns by then increasing the drive strength setting on
◼ Ability to drive large capacitive loads while maintaining the SiT1602.
full swing with sharp edge rates. The SiT1602 can support up to 60 pF or higher in
For more detailed information about rise/fall time control maximum capacitive loads with drive strength settings.
and drive strength selection, see the SiTime Application Refer to the Rise/Fall Time Tables (Table 7 to 11) to
Notes section. determine the proper drive strength for the desired
combination of output load vs. rise/fall time.
EMI Reduction by Slowing Rise/Fall Time SiT1602 Drive Strength Selection
Figure 16 shows the harmonic power reduction as the
Tables 7 through 11 define the rise/fall time for a given
rise/fall times are increased (slowed down). The rise/fall
capacitive load and supply voltage.
times are expressed as a ratio of the clock period. For the
ratio of 0.05, the signal is very close to a square wave. For 1. Select the table that matches the SiT1602 nominal
the ratio of 0.45, the rise/fall times are very close to near- supply voltage (1.8 V, 2.5 V, 2.8 V, 3.0 V, 3.3 V).
triangular waveform. These results, for example, show that 2. Select the capacitive load column that matches the
the 11th clock harmonic can be reduced by 35 dB if the application requirement (5 pF to 60 pF)
rise/fall edge is increased from 5% of the period to 45% of
the period. 3. Under the capacitive load column, select the desired
trise=0.05
rise/fall times.
trise=0.1
10 trise=0.15 4. The left-most column represents the part number code
0
trise=0.2
trise=0.25
for the corresponding drive strength.
trise=0.3
-10 trise=0.35 5. Add the drive strength code to the part number for
Harmonic amplitude (dB)

-20
trise=0.4
trise=0.45
ordering purposes.
-30
Calculating Maximum Frequency
-40
Any given rise/fall time in Table 7 through 11 dictates the
-50
maximum frequency under which the oscillator can operate
-60
with guaranteed full output swing over the entire operating
-70 temperature range. This max frequency can be calculated
-80
1 3 5 7 9 11
as the following:
Harmonic number
1
Figure 16. Harmonic EMI reduction as a Function Max Frequency =
of Slower Rise/Fall Time 5 x Trf_20/80

where Trf_20/80 is the typical value for 20%-80%

Jitter Reduction with Faster Rise/Fall Time rise/fall time.
Power supply noise can be a source of jitter for the
downstream chipset. One way to reduce this jitter is to Example 1
speed up the rise/fall time of the input clock. Some chipsets
Calculate fMAX for the following condition:
may also require faster rise/fall time in order to reduce their
sensitivity to this type of jitter. Refer to the Rise/Fall Time ◼ Vdd = 1.8 V (Table 7)
Tables (Table 7 to Table 11) to determine the proper drive ◼ Capacitive Load: 30 pF
strength. ◼ Desired Tr/f time = 3 ns (rise/fall time part number
code = E)
◼ fMAX = 66.666660
Part number for the above example:

SiT1602BIE12-18E-66.666660

Drive strength code is inserted here. Default setting is “-”

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SiT1602B Low Power, Standard Frequency Oscillator

Rise/Fall Time (20% to 80%) vs CLOAD Tables

Table 7. Vdd = 1.8 V (Vdd_1.8) Rise/Fall Times Table 8. Vdd = 2.5 V (Vdd_2.5) Rise/Fall Times
for Specific CLOAD for Specific CLOAD
Rise/Fall Time Typ (ns) Rise/Fall Time Typ (ns)
Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF
L 6.16 11.61 22.00 31.27 39.91 L 4.13 8.25 12.82 21.45 27.79
A 3.19 6.35 11.00 16.01 21.52 A 2.11 4.27 7.64 11.20 14.49
R 2.11 4.31 7.65 10.77 14.47 R 1.45 2.81 5.16 7.65 9.88
B 1.65 3.23 5.79 8.18 11.08 B 1.09 2.20 3.88 5.86 7.57
T 0.93 1.91 3.32 4.66 6.48 T 0.62 1.28 2.27 3.51 4.45
E 0.78 1.66 2.94 4.09 5.74 E or "‐": default 0.54 1.00 2.01 3.10 4.01
U 0.70 1.48 2.64 3.68 5.09 U 0.43 0.96 1.81 2.79 3.65
F or "‐": default 0.65 1.30 2.40 3.35 4.56 F 0.34 0.88 1.64 2.54 3.32

Table 9. Vdd = 2.8 V (Vdd_2.8) Rise/Fall Times Table 10. Vdd = 3.0 V (Vdd_3.0) Rise/Fall Times
for Specific CLOAD for Specific CLOAD
Rise/Fall Time Typ (ns) Rise/Fall Time Typ (ns)
Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF
L 3.77 7.54 12.28 19.57 25.27 L 3.60 7.21 11.97 18.74 24.30
A 1.94 3.90 7.03 10.24 13.34 A 1.84 3.71 6.72 9.86 12.68
R 1.29 2.57 4.72 7.01 9.06 R 1.22 2.46 4.54 6.76 8.62
B 0.97 2.00 3.54 5.43 6.93 B 0.89 1.92 3.39 5.20 6.64
T 0.55 1.12 2.08 3.22 4.08 T or "‐": default 0.51 1.00 1.97 3.07 3.90
E or "‐": default 0.44 1.00 1.83 2.82 3.67 E 0.38 0.92 1.72 2.71 3.51
U 0.34 0.88 1.64 2.52 3.30 U 0.30 0.83 1.55 2.40 3.13
F 0.29 0.81 1.48 2.29 2.99 F 0.27 0.76 1.39 2.16 2.85

Table 11. Vdd = 3.3 V (Vdd_3.3) Rise/Fall Times

for Specific CLOAD
Rise/Fall Time Typ (ns)
Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF
L 3.39 6.88 11.63 17.56 23.59
A 1.74 3.50 6.38 8.98 12.19
R 1.16 2.33 4.29 6.04 8.34
B 0.81 1.82 3.22 4.52 6.33
T or "‐": default 0.46 1.00 1.86 2.60 3.84
E 0.33 0.87 1.64 2.30 3.35
U 0.28 0.79 1.46 2.05 2.93
F 0.25 0.72 1.31 1.83 2.61

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SiT1602B Low Power, Standard Frequency Oscillator

Pin 1 Configuration Options

(OE, ST, ̅ ̅ ̅ , or NC)
Pin 1 of the SiT1602 can be factory-programmed to support
three modes: Output Enable (OE), standby (ST, ̅ ̅ ̅ ) or
No Connect (NC). These modes can also be programmed
with the Time Machine using field programmable devices.
Output Enable (OE) Mode
In the OE mode, applying logic Low to the OE pin only
disables the output driver and puts it in Hi-Z mode. The
core of the device continues to operate normally. Power Figure 17. Startup Waveform vs. Vdd
consumption is reduced due to the inactivity of the output.
When the OE pin is pulled High, the output is typically
enabled in <1 µs.
Standby (ST, ̅ ̅ ̅ ) Mode
In the ST, ̅ ̅ ̅ mode, a device enters into the standby mode
when Pin 1 pulled Low. All internal circuits of the device are
turned off. The current is reduced to a standby current,
typically in the range of a few µA. When ST, ̅ ̅ ̅ is pulled
High, the device goes through the “resume” process, which
can take up to 5 ms.
No Connect (NC) Mode
In the NC mode, the device always operates in its normal Figure 18. Startup Waveform vs. Vdd
mode and outputs the specified frequency regardless of (Zoomed-in View of Figure 17)
the logic level on pin 1.
Table 12 below summarizes the key relevant parameters in Instant Samples with Time Machine and
the operation of the device in OE, ST, ̅ ̅ ̅ , or NC mode. Field Programmable Oscillators
Table 12. OE vs. ST, ̅ ̅ ̅ vs. NC SiTime supports a field programmable version of the
SiT1602 low power oscillator for fast prototyping and real
OE ST, ̅ ̅ ̅ NC time customization of features. The field programmable
Active current 20 MHz 4.1 mA 4.1 mA 4.1 mA devices (FP devices) are available for all five standard
(max, 1.8 V) SiT1602 package sizes and can be configured to one’s
OE disable current 4 mA N/A N/A exact specification using the Time Machine II, an USB
(max. 1.8 V) powered MEMS oscillator programmer.
Standby current N/A 0.6 µA N/A
(typical 1.8 V) Customizable Features of the SiT1602 FP Devices
Include
OE enable time at 77.76 MHz 138 ns N/A N/A
(max)
◼ 52 standard frequencies between 3.75 MHz and
Resume time from standby N/A 5 ms N/A 77.76 MHz (Refer to the frequency list on page 12)
(max, all frequency)
◼ Three frequency stability options, ±20 ppm, ±25 ppm,
Output driver in OE High Z weak N/A
disable/standby mode pull-down
±50 ppm
◼ Two operating temperatures, -20 to 70°C or
Output on Startup and Resume -40 to 85°C
The SiT1602 comes with gated output. Its clock output is ◼ Six supply voltage options, 1.8 V, 2.5 V, 2.8 V, 3.0 V,
accurate to the rated frequency stability within the first pulse 3.3 V, 2.25 to 3.65 V, and 1.62 to 3.63 V continuous
from initial device startup or resume from the standby mode. ◼ Output drive strength
In addition, the SiT1602 features “no runt” pulses and “no ◼ OE, ST or NC mode
glitch” output during startup or resume as shown in the For more information regarding SiTime’s field programma-
waveform captures in Figure 17 and Figure 18. ble solutions, see Time Machine II and Field Programmable
Oscillators.
SiT1602 is typically factory-programmed per customer or-
dering codes for volume delivery.

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Dimensions and Patterns

Package Size – Dimensions (Unit: mm)[10] Recommended Land Pattern (Unit: mm)[11]

2.0 x 1.6 x 0.75 mm

1.5

1.2

0.8
0.9

2.5 x 2.0 x 0.75 mm

1.9
1.5

1.0

1.1

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Dimensions and Patterns (continued)

Package Size – Dimensions (Unit: mm)[10] Recommended Land Pattern (Unit: mm)[11]

3.2 x 2.5 x 0.75 mm

2.2

1.9

1.2
1.4

5.0 x 3.2 x 0.75 mm

2.54
2.2

1.6

1.5

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Dimensions and Patterns (continued)

Package Size – Dimensions (Unit: mm)[10] Recommended Land Pattern (Unit: mm)[11]

7.0 x 5.0 x 0.90 mm

5.08

3.81

2.0
2.2

Notes:
10. Top marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of
the device.
11. A capacitor of value 0.1 µF or higher between Vdd and GND is required.

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Ordering Information
The Part No. Guide is for reference only.
To customize and build an exact part number, use the SiTime Part Number Generator.

SiT1602BC-12-18E-66.666660D
Packaging
“D”: 8 mm Tape & Reel, 3 ku reel
Part Family “T”: 12/16 mm Tape & Reel, 3 ku reel
“SiT1602” “Y”: 12/16 mm Tape & Reel, 1 ku reel
“E”: 8 mm Tape & Reel, 1 ku reel
Blank for Bulk
Revision Letter
“B” is the revision Frequency
Refer to Frequency List below
Temperature Range
“C” Commercial, -20 to 70ºC Feature Pin
“I” Industrial, -40 to 85ºC “E” for Output Enable
“S” for Standby
Output Drive Strength “N” for No Connect
“–” Default (datasheet limits)
See Tables 7 to 11 for Supply Voltage
rise/fall times “18” for 1.8 V ±10%
“L” “T” “25” for 2.5 V ±10%
“A” “E” “28” for 2.8 V ±10%
“R” “U” “30” for 3.0 V ±10%
“B” “F” “33” for 3.3 V ±10%
“XX” for 2.25 V to 3.63 V
“YY” for 1.62 V to 3.63 V
Package Size
“7” 2.0 x 1.6 mm
“1” 2.5 x 2.0 mm Frequency Stability
“2” 3.2 x 2.5 mm “1” for ±20 ppm
“3” 5.0 x 3.2 mm “2” for ±25 ppm
“8” 7.0 x 5.0 mm “3” for ±50 ppm

Table 13. List of Supported Frequencies

3.57 MHz 4 MHz 4.096 MHz 6 MHz 7.3728 MHz 8.192 MHz 10 MHz 12 MHz 14 MHz
18.432 MHz 19.2 MHz 20 MHz 24 MHz 24.576 MHz 25 MHz 25.000625 MHz 26 MHz 27 MHz
28.6363 MHz 30 MHz 31.25 MHz 32.768 MHz 33 MHz 33.3 MHz 33.33 MHz 33.333 MHz 33.3333 MHz
33.33333 MHz 35.84 MHz 37.5 MHz 38 MHz 38.4 MHz 40 MHz 40.5 MHz 48 MHz 50 MHz
54 MHz 60 MHz 62.5 MHz 65 MHz 66 MHz 66.6 MHz 66.66 MHz 66.666 MHz 66.6666 MHz
66.66666 MHz 72 MHz 74.175824 MHz 74.176 MHz 74.25 MHz 75 MHz 77.76 MHz

Table 14. Ordering Codes for Supported Tape & Reel Packing Method
Device Size 16 mm T&R (3 ku) 16 mm T&R (1 ku) 12 mm T&R (3 ku) 12 mm T&R (1 ku) 8 mm T&R (3 ku) 8 mm T&R (1 ku)
(mm x mm)
2.0 x 1.6 – – – – D E
2.5 x 2.0 – – – – D E
3.2 x 2.5 – – – – D E
5.0 x 3.2 – – T Y – –
7.0 x 5.0 T Y – – – –

Rev 1.08 Page 13 of 18 [Link]

SiT1602B Low Power, Standard Frequency Oscillator

Table 15. Additional Information

Document Description Download Link
Time Machine II MEMS oscillator programmer [Link]
Field Programmable Devices that can be programmable in the field by [Link]
Oscillators Time Machine II
Manufacturing Notes Tape & Reel dimension, reflow profile and other [Link]
manufacturing related info [Link]
Qualification Reports RoHS report, reliability reports, [Link]
composition reports
Performance Reports Additional performance data such as phase noise, [Link]
current consumption and jitter for selected frequencies report
Termination Techniques Termination design [Link]
recommendations
Layout Techniques Layout recommendations [Link]

Table 16. Revision History

Revision Release Date Change Summary
0.9 1-Apr-2014 Preliminary
Removed preliminary
Updated max spec for current consumption and OE disable current
Updated the maximum operating junction temperature
1.0 14-May-2014
Updated the current consumption and OE disable current in Table 12
Updated performance plots 8 and 10
Revised the formula for calculating the max frequency with different rise/fall time options
Added 20 MHz to the frequency selection
1.01 7-May-2015 Revised the Electrical Characteristics, Timing Diagrams and Performance Plots
Revised 2016 PKG diagram
Added 16 mm T&R information to Table 14
1.02 18-Jun-2015
Revised 12 mm T&R information to Table 14
1.03 30-Aug-2016 Revised part number example in the ordering information
Updated logo and company address, other page layout changes
1.04 9-Jan-2018
Revised 2520 package land pattern
Updated ordering information with “YY” supply voltage option
1.05 8-Jul-2020
Updated ordering information with note
Removed Note 12
1.06 27-Jan-2021 Added Rise/Fall Time, RMS Period Jitter, and RMS Phase Jitter specifications for “YY” supply voltage
Various formatting changes
Updated Dimensions and Patterns drawings
1.07 10-Mar-2021
Updated hyperlinks, trademarks and changed rev table date format
1.08 1-Jan-2023 Updated company disclaimer, links, references and icons

SiTime Corporation, 5451 Patrick Henry Drive, Santa Clara, CA 95054, USA | Phone: +1-408-328-4400 | Fax: +1-408-328-4439

© SiTime Corporation 2015-2023. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liabili ty for any loss, damage or
defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or
accident, (iii) unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv)
improper installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.

Disclaimer: SiTime makes no warranty of any kind, express or implied, with regard to this material, and specifically disclaims any and all express or implied warranties, either in fact or by
operation of law, statutory or otherwise, including the implied warranties of merchantability and fitness for use or a particular purpose, and any implied warranty arising from course of dealing
or usage of trade, as well as any common-law duties relating to accuracy or lack of negligence, with respect to this material, any SiTime product and any product documentation. This product
is not suitable or intended to be used in a life support application or component, to operate nuclear facilities, in military or aerospace applications, or in other mission critical applications where
human life may be involved or at stake. All sales are made conditioned upon compliance with the critical uses policy set forth below.

CRITICAL USE EXCLUSION POLICY

BUYER AGREES NOT TO USE SITIME'S PRODUCTS FOR ANY APPLICATION OR IN ANY COMPONENTS: USED IN LIFE SUPPORT DEVIC ES, TO OPERATE NUCLEAR
FACILITIES, FOR MILITARY OR AEROSPACE USE, OR IN OTHER MISSION CRITICAL APPLICATIONS OR COMPONENTS WHERE HUMAN LIFE OR PROPER TY MAY BE
AT STAKE.

For aerospace and defense applications, SiTime recommends using only Endura™ ruggedized products.

SiTime owns all rights, title and interest to the intellectual property related to SiTime's products, including any software, firmware, copyright, patent, or trademark. The sale of SiTime products does
not convey or imply any license under patent or other rights. SiTime retains the copyright and trademark rights in all documents, catalogs and plans supplied pursuant to or ancillary to the sale of
products or services by SiTime. Unless otherwise agreed to in writing by SiTime, any reproduction, modification, translation, compilation, or representation of this material shall be strictly
prohibited.

Rev 1.08 Page 14 of 18 [Link]

Silicon MEMS Outperforms Quartz

Supplemental Information

The Supplemental Information section is not part of the datasheet and is for informational purposes only.

Rev 1.08 Page 15 of 18 [Link]

Silicon MEMS Outperforms Quartz

Best Reliability Best Electro Magnetic Susceptibility (EMS)

Silicon is inherently more reliable than quartz. Unlike quartz SiTime’s oscillators in plastic packages are up to 54 times
suppliers, SiTime has in-house MEMS and analog CMOS more immune to external electromagnetic fields than quartz
expertise, which allows SiTime to develop the most relia- oscillators as shown in Figure 3.
ble products. Figure 1 shows a comparison with quartz
technology. Why is SiTime Best in Class:
◼ Internal differential architecture for best common
Why is SiTime MEMS Best in Class: mode noise rejection
◼ SiTime’s MEMS resonators are vacuum sealed using
an advanced EpiSeal® process, which eliminates ◼ Electrostatically driven MEMS resonator is more im-
foreign particles and improves long term aging and mune to EMS
reliability
◼ World-class MEMS and CMOS design expertise

Reliability (Million Hours)

SiTime 1,140

IDT 38

KYCA EPSN TXC CW SLAB SiTime

EPSN 28
Figure 3. Electro Magnetic Susceptibility (EMS)[3]

Best Power Supply Noise Rejection

Figure 1. Reliability Comparison[1]
SiTime’s MEMS oscillators are more resilient against noise
on the power supply. A comparison is shown in Figure 4.
Best Aging
Unlike quartz, MEMS oscillators have excellent long Why is SiTime Best in Class:
term aging performance which is why every new SiTime ◼ On-chip regulators and internal differential architec-
product specifies 10-year aging. A comparison is shown ture for common mode noise rejection
in Figure 2.
◼ MEMS resonator is paired with advanced analog
Why is SiTime Best in Class: CMOS IC
◼ SiTime’s MEMS resonators are vacuum sealed using
an advanced EpiSeal® process, which eliminates SiTime EPSN KYCA
foreign particles and improves long term aging and
reliability
◼ Inherently better immunity of electrostatically driven
MEMS resonator
MEMS vs. Quartz Aging
SiTimeMEMS
EpiSeal Oscillator
Oscillator QuartzOscillator
Quartz Oscillator
10

8
8
Aging ( PPM)

6
Figure 4. Power Supply Noise Rejection[4]
4 3.5
3

2 1.5

0
1-Year 10-Year

Figure 2. Aging Comparison[2]

Rev 1.08 Page 16 of 18 [Link]

Silicon MEMS Outperforms Quartz

Best Vibration Robustness Best Shock Robustness

High-vibration environments are all around us. All SiTime’s oscillators can withstand at least 50,000 g shock.
electronics, from handheld devices to enterprise servers They all maintain their electrical performance in operation
and storage systems are subject to vibration. Figure 5 during shock events. A comparison with quartz devices is
shows a comparison of vibration robustness. shown in Figure 6.
Why is SiTime Best in Class: Why is SiTime Best in Class:
◼ The moving mass of SiTime’s MEMS resonators is ◼ The moving mass of SiTime’s MEMS resonators is
up to 3000 times smaller than quartz up to 3000 times smaller than quartz
◼ Center-anchored MEMS resonator is the most robust ◼ Center-anchored MEMS resonator is the most robust
design design

EP KYC SLA
TXC
TXC EPS CW
CW KYCA SLAB SiTime MEMS
EpiSeal
S A B
100.0
Vibration Sensitivity (ppb/g)

10.0

1.0

0.1

0.0
10 100 1000
Vibration Frequency (Hz) KYCA EPSN TXC CW SLAB SiTime

Figure 5. Vibration Robustness[5] Figure 6. Shock Robustness[6]

Figure labels:
▪ TXC = TXC
▪ Epson = EPSN
▪ Connor Winfield = CW
▪ Kyocera = KYCA
▪ SiLabs = SLAB
▪ SiTime = EpiSeal MEMS

Rev 1.08 Page 17 of 18 [Link]

Silicon MEMS Outperforms Quartz

Notes:
1. Data source: Reliability documents of named companies.
2. Data source: SiTime and quartz oscillator devices datasheets.
3. Test conditions for Electro Magnetic Susceptibility (EMS):
▪ According to IEC EN61000-4.3 (Electromagnetic compatibility standard)
▪ Field strength: 3V/m
▪ Radiated signal modulation: AM 1 kHz at 80% depth
▪ Carrier frequency scan: 80 MHz – 1 GHz in 1% steps
▪ Antenna polarization: Vertical
▪ DUT position: Center aligned to antenna
Devices used in this test:

Label Manufacturer Part Number Technology

EpiSeal MEMS SiTime SiT9120AC-1D2-33E156.250000 MEMS + PLL
EPSN Epson EG-2102CA156.2500M-PHPAL3 Quartz, SAW
TXC TXC BB-156.250MBE-T Quartz, 3rd Overtone
CW Conner Winfield P123-156.25M Quartz, 3rd Overtone
KYCA AVX Kyocera KC7050T156.250P30E00 Quartz, SAW
SLAB SiLab 590AB-BDG Quartz, 3rd Overtone + PLL

4. 50 mV pk-pk Sinusoidal voltage.

Devices used in this test:

Label Manufacturer Part Number Technology

EpiSeal MEMS SiTime SiT8208AI-33-33E-25.000000 MEMS + PLL
NDK NDK NZ2523SB-25.6M Quartz
KYCA AVX Kyocera KC2016B25M0C1GE00 Quartz
EPSN Epson SG-310SCF-25M0-MB3 Quartz
5. Devices used in this test:
same as EMS test stated in Note 3.
6. Test conditions for shock test:
▪ MIL-STD-883F Method 2002
▪ Condition A: half sine wave shock pulse, 500-g, 1ms
▪ Continuous frequency measurement in 100 μs gate time for 10 seconds
Devices used in this test:
same as EMS test stated in Note 3.
7. Additional data, including setup and detailed results, is available upon request to qualified customer. Please contact productsupport@[Link].

Rev 1.08 Page 18 of 18 [Link]