Importance of Digital Systems
• Easy to Process: compress, Analysis
• Noise Immunity
• Storage of Data
• Easy Transportation of Data
• Easy Reproduction of the Data
• Error Correction, Encryption, Interference handling is possible
• Based of Digital Signals
• Digital Signal
• Discrete values from Continuous Analog Signals
Analog to Digital Convertor(ADC) and Digital to Analog Convertor(DAC)
• Manipulation and storage of digital signal involves Switching.
• Switching is done through components such as: Transistors, Diodes, Resistance etc.
• Basic Gates are realized by electronic circuits are the primary building block of the Digital Systems.
• Electronic Circuits are designed in different ways for different kind of applications. E.g. Adders, Decoders,
Multiplexers, Counters, Flip-Flops etc.
• For this design and analysis Boolean algebra and other simplification techniques are helpful.
Introduction
• Many different logic families of digital integrated circuits have been
introduced commercially. The following are the most popular:
• TTL transistor-transistor logic-TTL is a widespread logic family that
has been in operation for some time and is considered as standard.
• ECL emitter-coupled logic- Advantage in systems requiring high-
speed operation.
• MOS metal-oxide semiconductor- Suitable for circuits that need high
component density
• CMOS complementary metal-oxide semiconductor -Preferable in
systems requiring low power consumption.
Parameters of Logic families
• The parameters of digital logic families are usually compared by analyzing the
circuit of the basic gate in each family.
• Fan-out
• Power dissipation
• Propagation delay
• Noise margin
10
Fan-Out
• The fan-out of a gate specifies the number of standard loads that can be connected
to the output of the gate without degrading its normal operation.
• A standard load is usually defined as the amount of current needed by an input of
another gate in the same logic family.
• Sometimes the term loading is used instead of fan-out.
• This term is derived because the output of a gate can supply a limited amount of
current, above which it ceases to operate properly and is said to be overloaded.
• The fan-out is the maximum number of inputs that can be connected to the output
of a gate, and is expressed by a number.
Fan-Out
The fan-out is calculated from the amount of current available in the output
of a gate and the amount of current needed in each input of a gate.
Fig. Fan-Out Computation
Fan-Out
• The output of the gate is in the high voltage level in Fig.
• It provides a current source IOH to all the gate inputs connected to it. Each gate
input requires a current IIH for proper operation.
• Similarly, the output of the gate is in the low voltage level in Fig. 1 (b).
• It provides a current sink IOL for all the gate inputs connected to it. Each gate input
supplies a current IIL
• The fan-out of the gate is calculated from the ratio IOH / IIH or IOL /IIL, whichever is
smaller.
Power Dissipation
• The power dissipation is a parameter expressed in milliwatts (mW) and represents
the amount of power needed by the gate.
• It represents the power delivered to the gate from the power supply.
• An IC with four gates will require, from its power supply, four times the power
dissipated in each gate.
• The amount of power that is dissipated in a gate is calculated from the supply voltage
VCC and the current ICC that is drawn by the circuit.
• The power is the product VCC X ICC
Propagation Delay
• The propagation delay of a gate is the average transition -delay time for the signal
to propagate from input to output when the binary signal changes in value.
• Propagation delay is measured in nanoseconds (ns).
• The signals that travel from the inputs of a digital circuit to its outputs pass
through a series of gates. The sum of the propagation delays through the gates is
the total delay of the circuit.
• The average propagation delay time of a gate is calculated from the input and
output waveforms.
Propagation Delay
• The signal-delay time between the input and output when the
output changes from the high to the low level is referred to as tPHL·
• Similarly, when the output goes from the low to the high level, the
delay is tPLH·
• The average propagation-delay time is calculated as the average of
the two delays.
Propagation Delay
Example: The delays for a standard TTL gate are tPHL = 7 ns and tPLH = 11 ns. These
quantities are given in the TTL data book and are measured with a load resistance of
400 ohms and a load capacitance of 15 pF.
Solution:
The average propagation delay of the TTL gate is (11 + 7)/2 = 9 ns.
• Under certain conditions, it is more important to know the maximum delay time of a
gate rather than the average value.
• When speed of operation is critical, it is necessary to take into account the maximum
delay to ensure proper operation.
Noise Margin
• Spurious electrical signals from industrial and other similar sources can induce undesirable
voltages on the connecting wires between logic circuits. These unwanted signals are referred
to as noise.
• There are two types of noise to be considered:
• DC Noise : Caused by a drift in the voltage levels of a signal.
• AC Noise : Random pulse that may be created by other switching signals.
• Thus, noise is a term used to denote an undesirable signal that is superimposed upon the
normal operating signal.
• Noise margin is the maximum noise voltage added to an input signal of a digital circuit that
does not cause an undesirable change in the circuit output.
• Noise margin is expressed in volts and represents the maximum noise signal that can be
tolerated by the gate.
Noise Margin
Fig. Signals for evaluating noise margins
Noise Margin
• Any voltage in the gate output between VCC and VOH is considered as the high-
level state and any voltage between 0 and VOL in the gate output is considered as
the low-level state.
• In order to compensate for any noise signal, the circuit must be designed so that
VIL is greater than VOL and VIH is less than VOH·
• The noise margin is the difference VOH - VIH or VIL – VOL, whichever is smaller.
Example: The parameters for the noise margin in a standard TTL NAND gate are
VOH =2.4 V, VOL = 0.4 V, VIH = 2 V, and VIL = 0.8 V.
The high-state noise margin is 2.4 - 2 = 0.4 V, and the low-state noise margin is 0.8
- 0.4 = 0.4 V.
CMOS
• CMOS stands for Complementary Metal–Oxide–Semiconductor (Complementary Metal–Oxide–
Semiconductor). It’s a type of technology used to build many of the tiny electronic circuits inside modern
devices.
• Complementary Metal–Oxide–Semiconductor works using two complementary types of transistors:
• PMOS transistor → passes current when input is LOW
• NMOS transistor → passes current when input is HIGH
• They are paired together so that: one transistor is ON while the other is OFF this greatly reduces power
consumption
Realization of gates using CMOS
Case 1: Input = 0
•PMOS → ON
•NMOS → OFF
•Output connected to power →
Output = 1
Case 2: Input = 1
•PMOS → OFF
•NMOS → ON
•Output connected to ground →
Output = 0
CMOS NAND Structure CMOS NOR Structure
•PMOS transistors → connected in parallel •PMOS transistors → connected in series
•NMOS transistors → connected in series •NMOS transistors → connected in parallel
CMOS AND Gate CMOS OR Gate
An AND gate is usually made by An OR gate is usually made by first
first creating a NAND gate and creating a NOR gate and then adding
then adding an inverter an inverter