Tutorial 3
Section 1: Memory System Performance (Bandwidth & Latency)
1. Define the two key parameters that capture memory system performance. Clearly
differentiate between latency and bandwidth using the fire-hose analogy provided in the
slides.
2. Explain why memory system performance is often a bigger bottleneck than processor
speed in many applications.
3. What is a cache and how does it help improve effective memory latency? What is the
term for the fraction of data references satisfied by the cache?
4. Describe how increasing block size helps improve memory bandwidth. Include the truck
delivery analogy from the lecture.
5. List and briefly explain the three alternate approaches for hiding memory latency
mentioned in the slides (using the slow web browsing example).
6. What are the trade-offs of using multithreading and prefetching to hide memory latency?
Why do they often make the system bandwidth-bound instead of latency-bound?
Section 2: Dichotomy of Parallel Computing Platforms
7. What is the difference between the logical organization and the physical organization of a
parallel computing platform?
8. Define the two main control structures in parallel computers: SIMD and MIMD. Explain
how they differ in terms of control unit and instruction execution.
9. Give three historical or real-world examples of SIMD processors and three examples of
MIMD platforms mentioned in the lecture.
10. Explain the SPMD programming model and how it relates to MIMD.
Section 3: Flynn’s Classical Taxonomy
11. What are the two independent dimensions used in Flynn’s Taxonomy (1966) to classify
computer architectures?
12. Draw or describe the 4 classifications in Flynn’s Taxonomy matrix and give a short
description for each:
o SISD
o SIMD
o MISD
o MIMD
13. Which category does a conventional single-core PC belong to? Why?
14. Which category is currently the most common type of parallel computer? Give examples.
15. Compare SIMD and MIMD processors in terms of:
o Hardware cost and complexity
o Design cycle
o Suitability for different applications
o Programming flexibility
Section 4: Communication Models of Parallel Platforms
16. What are the two primary forms of data exchange between parallel tasks? Name the two
types of platforms associated with each form.
17. Differentiate between Shared-Address-Space Platforms and Message-Passing Platforms
(Multicomputers).
18. Explain the difference between UMA (Uniform Memory Access) and NUMA (Non-
Uniform Memory Access) machines. Why is this distinction important for algorithm
design?
19. What is the cache coherence problem in shared-address-space platforms? Why does it
arise?
20. Compare Message-Passing vs Shared-Address-Space platforms in terms of:
o Hardware support required
o How processors communicate
o Speed of data sharing
o Programming effort