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Computer Science Assignment

The document outlines the Fetch-Decode-Execute cycle in CPUs, detailing its primary purpose of processing instructions. It describes the roles of various registers such as the Program Counter (PC), Instruction Register (IR), Memory Address Register (MAR), and Memory Data Register (MDR). Additionally, it explains the functions of the Control Unit (CU) and Arithmetic Logic Unit (ALU) during instruction execution and the implications of a corrupted Program Counter.

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4 views2 pages

Computer Science Assignment

The document outlines the Fetch-Decode-Execute cycle in CPUs, detailing its primary purpose of processing instructions. It describes the roles of various registers such as the Program Counter (PC), Instruction Register (IR), Memory Address Register (MAR), and Memory Data Register (MDR). Additionally, it explains the functions of the Control Unit (CU) and Arithmetic Logic Unit (ALU) during instruction execution and the implications of a corrupted Program Counter.

Uploaded by

guc7rfgrt
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

Maximillian Kuria

Computer Science Assignment

What is the Primary purpose of the Fetch-Decode-Execute cycle?


B. To process instructions in the CPU

Which register holds the memory address of the next instruction to be fetched?

B. Program Counter (PC)

During the Fetch stage, the Program Counter (PC) is usually…

B. Incremented to point to the next instruction

The instruction fetched from memory is temporarily stored in which register?

B. Instruction Register (IR)

Which CPU component is responsible for decoding instructions?

B. Control Unit (CU)

What happens during the Execute stage?

B. The CPU performs the required operation (e.g, calculation, data transfer)

Which of the following correctly represents the order of the cycle?

C. Fetch-Decode-Execute

The Memory Address Register (MAR) holds…

B. The address of the memory location to be accessed

The Memory Data Register (MDR) is used to…

B. Hold data read from or written to memory

Which part of the CPU performs arithmetic and logical operations during

execution?

B. Arithmetic Logic Unit (ALU)

After the Fetch stage, the Program Counter (PC)

B. Points to the next instruction to be fetched

The Instruction Register (IR) contains…

B. The instruction currently being executed

Which of the following best describes the Decode stage?

B. The CPU interprets the instruction to determine the required action


Maximillian Kuria

Why is the Fetch–Decode–Execute cycle continuous in modern CPUs?

A. To ensure instructions are processed sequentially without interruption

What happens if the Program Counter (PC) is corrupted?

A. The CPU will execute instructions incorrectly or crash

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