1
Regent Education and Research
Foundation
NAME : SAYAN MODAK
REGISTRATION NO. : 212630100320015
ROLL NO. : 26300321056
SEMESTER : 6TH
SUBJECT :CMOS VLSI DESIGN
CONTENTS 2
VLSI
ADVANTAGE OF VLSI
DESIGN PROCESS OF VLSI
FULL CUSTOM DESIGN
GATE ARRAY DESIGN
STANDARD CELL BASED DESIGN
MACRO CELL BASED DESIGN
Very large-scale integration 3
A process of embedding or integrating hundreds of
thousands of transistors onto a singular silicon
semiconductor microchip.
The Advantages of VLSI Technology 4
• Reduced size for circuits
• Increased cost-effectiveness for devices
• Improved performance in terms of the operating speed of circuits
• Requires less power than discrete components
• Higher device reliability
• Requires less space and promotes miniaturization
The Design Process of a VLSI IC 5
1. Front-End Design: This includes digital design using a hardware
description language, for example, Verilog, System Verilog, and VHDL.
Furthermore, this stage encompasses design verification via simulation
and other verification techniques. The entire process also incorporates
designing, which starts with the gates and continues through to design
for testability.
6
2. Back-End Design: This consists of
characterization and CMOS library design.
Additionally, it involves fault simulation and
physical design.
Design style of VLSI 7
Full custom Design 8
full-custom is a design methodology in which the layout of each individual transistor on
the integrated circuit (IC), and the interconnections between them, are specified. Alternatives to
full-custom design include various forms of semi-custom design, such as the repetition of small
transistor subcircuits;one such methodology is the use of standard cell libraries (which are
themselves designed full-custom).
Full-custom design potentially maximizes the performance of the chip, and minimizes its area, but
is extremely labor-intensive to implement. Full-custom design is limited to ICs that are to be
fabricated in extremely high volumes, notably certain microprocessors and a small number
of application-specific integrated circuits (ASICs).
Gate Array Design 9
A gate array is a specific engineering design for printed circuit boards. It
allows for more versatility, but can also lead to certain kinds of wasted
design in some situations. Gate arrays are part of the overall
infrastructure equation for the physical circuit boards that power
numerous types of hardware and devices.
Advantages 10
• It requires very small time; starting from design process
to functional chip.
• No physical manufacturing steps are involved in it.
• The only disadvantage is, it is costly than other styles.
11
Standard-cell Design 12
A standard cell based design requires development of a full custom
mask set. The standard cell is also known as the polycell. In this
approach, all of the commonly used logic cells are developed,
characterized and stored in a standard cell library.
Each cell is characterized according to several different 13
characterization categories, such as,
• Delay time versus load capacitance
• Circuit simulation model
• Timing simulation model
• Fault simulation model
• Cell data for place-and-route
• Mask data
14
Macro cell based design, 15
Macro is an essential component in the VLSI design cycle
before the final packaged chip is ready to use. Macro cells
are the memory cells, intellectual property which an
analog design team has designed.
16
References 17
[Link]
Thank You 18