®

EL2257

Data Sheet February 28, 2002 FN7063

125MHz Single Supply, Clamping Op Amp Features

The EL2257 is a single supply op amp. • Specified for +3V, +5V, or ± 5V applications
Prior single supply op amps have
• Power-down to 0µA
generally been limited to bandwidths
and slew rates one-fourth of that of the EL2257. The • Output voltage clamp
125MHz bandwidth, 275V/µs slew rate and 0.05%/0.05° • Large input common-mode range 0V < VCM < VS - 1.2V
differential gain/differential phase makes this part ideal for
single or dual supply video speed applications. With its • Output swings to ground without saturating
voltage feedback architecture, this amplifier can accept • -3dB bandwidth = 125MHz
reactive feedback networks, allowing them to be used in
• ±0.1dB bandwidth = 30MHz
analog filtering applications. The inputs can sense signals
below the bottom supply rail and as high as 1.2V below the • Low supply current = 5mA
top rail. Connecting the load resistor to ground and operating
• Slew rate = 275V/µs
from a single supply, the outputs swing completely to ground
without saturating. The outputs can also drive to within 1.2V • Low offset voltage = 4mV max
of the top rail. The EL2257 will output ±100mA and will • Output current = ±100mA
operate with single supply voltages as low as 2.7V, making
them ideal for portable, low power applications. • High open loop gain = 80dB
• Differential gain = 0.05%
The EL2257 has a high speed disable feature. Applying a
low logic level to all ENABLE pins reduces the supply current • Differential phase = 0.05°
to 0µA within 50ns. Each amplifier has its own ENABLE pin.
This is useful for both multiplexing and reducing power Applications
consumption. • Video amplifiers
The EL2257 also has an output voltage clamp feature. This • PCMCIA applications
clamp is a fast recovery (< 7ns) output clamp that prevents
the output voltage from going above the preset clamp • A/D drivers
voltage. This feature is desirable for A/D applications, as A/D • Line drivers
converters can require long times to recover if overdriven.
• Portable computers
The EL2257 is available in 14-pin SO (0.150") and 14-pin
• High speed communications
PDIP packages and operates over the industrial temperature
range of -40°C to +85°C. For single amplifier applications, • RGB printer, fax, scanner applications
see the EL2150 and EL2157. For space-saving, industry- • Broadcast equipment
standard pinout dual and quad applications, see the EL2250
and EL2450. • Active filtering
• Multiplexing
Ordering Information
TAPE &
Pinout
PART NUMBER PACKAGE REEL PKG. NO. EL2257
[14-PIN SO (0.150”), PDIP]
EL2257CS 14-Pin SO (0.150") - MDP0027 TOP VIEW
EL2257CS-T7 14-Pin SO (0.150") 7” MDP0027 INA+ 1 14 INA-
EL2257CS-T13 14-Pin SO (0.150") 13” MDP0027 CLAMPA
+
OUTA
2 -
13
EL2257CN 14-Pin PDIP - MDP0031
ENABLEA 3 12 NC

GND 4 11 VS+

ENABLEB 5 10 NC
+
CLAMPB 6 -
9 OUTB

INB+ 7 8 INB-

1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
 EL2257

Absolute Maximum Ratings (TA = 25°C)

Supply Voltage between VS and GND . . . . . . . . . . . . . . . . . . . 12.6V Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See curves
Input Voltage (IN+, IN-, ENABLE, CLAMP) . . . GND–0.3V, VS+0.3V Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±6V Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C
Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90mA Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Output Short Circuit Duration. . . . . . . . . . . . . . . . See Note 1 page 3
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

DC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = 1.5V, VOUT = 1.5V, VCLAMP = +5V, VENABLE = +5V, unless
otherwise specified.

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

VOS Offset Voltage -4 4 mV

TCVOS Offset Voltage Temperature Measured from TMIN to TMAX 10 µV/°C

Coefficient

IB Input Bias Current VIN = 0V -5.5 -10 µA

IOS Input Offset Current VIN = 0V -1100 150 +1100 nA

TCIOS Input Bias Current Temperature Measured from TMIN to TMAX 50 nA/°C
Coefficient

PSRR Power Supply Rejection Ratio VS = VENABLE = 2.7V to 12V, VCLAMP = OPEN 45 70 dB
CMRR Common-mode Rejection Ratio VCM = 0V to +3.8V 50 65 dB

VCM = 0V to +3.0V 55 70 dB

CMIR Common-mode Input Range 0 VS-1.2 V

RIN Input Resistance Common-mode 1 2 MΩ

CIN Input Capacitance SO (0.150") package 1 pF

PDIP package 1.5 pF

ROUT Output Resistance AV = +1 40 mΩ

ISON Supply Current - Enabled (per VS = VCLAMP = 12V, VENABLE = 12V 5 6.5 mA
amplifier)

ISOFF Supply Current - Shut-down (per VS = VCLAMP = 10V, VENABLE = 0.5V 0 50 µA

amplifier)
VS = VCLAMP = 12V, VENABLE = 0.5V 5 µA

PSOR Power Supply Operating Range 2.7 12.0 V

AVOL Open Loop Gain VS = VCLAMP = 12V, VOUT = 2V to 9V, RL = 1kΩ to GND 65 80 dB

VOUT = 1.5V to 3.5V, RL = 1kΩ to GND 70 dB

VOUT = 1.5V to 3.5V, RL = 150Ω to GND 60 dB

VOP Positive Output Voltage Swing VS = 12V, AV = 1, RL = 1kΩ to 0V 10.8 V

VS = 12V, AV = 1, RL = 150Ω to 0V 9.6 10.0 V

VS = ±5V, AV = 1, RL = 1kΩ to 0V 4.0 V

VS = ±5V, AV = 1, RL = 150Ω to 0V 3.4 3.8 V

VS = 3V, AV = 1, RL = 150Ω to 0V 1.8 1.95 V

VON Negative Output Voltage Swing VS = 12V, AV = 1, RL = 150Ω to 0V 5.5 8 mV

VS = ±5V, AV = 1, RL = 1kΩ to 0V -4.0 V

VS = ±5V, AV = 1, RL = 150Ω to 0V -3.7 -3.4 V

2
 EL2257

DC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = 1.5V, VOUT = 1.5V, VCLAMP = +5V, VENABLE = +5V, unless
otherwise specified. (Continued)

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

IOUT Output Current (Note 1) VS = ±5V, AV = 1, RL = 10Ω to 0V ±75 ±100 mA

VS = ±5V, AV = 1, RL = 50Ω to 0V ±60 mA

IOUT,OFF Output Current - Disabled VENABLE = 0.5V 0 20 µA

VIH-EN ENABLE Pin Voltage for Power- Relative to GND pin 2.0 V
up

VIL-EN ENABLE Pin Voltage for Shut- Relative to GND pin 0.5 V
down

IIH-EN ENABLE Pin Input Current - VS = VCLAMP = 12V, VENABLE = 12V 340 410 µA
High(Note 2)

IIL-EN ENABLE Pin Input Current - Low VS = VCLAMP = 12V, VENABLE = 0.5V 0 1 µA
(Note 2)

VOR-CL Voltage Clamp Operating Relative to GND pin 1.2 VOP V

Range (Note 3)

VACC-CL CLAMP Accuracy (Note 4) VIN = 4V, RL = 1kΩ to GND, VCLAMP = 1.5V and 3.5V -250 100 250 mV

IIH-CL CLAMP Pin Input Current - High VS = VCLAMP = 12V 12 25 µA

IIL-CL CLAMP Pin Input Current - Low VS = 12V, VCLAMP = 1.2V -30 -15 µA
(per amp)

NOTES:
1. Internal short circuit protection circuitry has been built into the EL2257. See the Applications section.
2. If the disable feature is not desired, tie the ENABLE pins to the VS pin, or apply a logic high level to the ENABLE pins.
3. The maximum output voltage that can be clamped is limited to the maximum positive output Voltage, or VOP. Applying a voltage higher than VOP
inactivates the clamp. If the clamp feature is not desired, either tie the CLAMP pin to the VS pin, or simply let the CLAMP pin float.
4. The clamp accuracy is affected by VIN and RL. See the Typical Curves Section and the Clamp Accuracy vs VIN and RL curve.

Closed Loop AC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = +1.5V, VOUT = +1.5V, VCLAMP = +5V, VENABLE
= +5V, AV = +1, RF = 0Ω, RL = 150Ω to GND pin unless otherwise specified. (Note 1)

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

BW -3dB Bandwidth VS = 5V, AV = 1, RF = 0Ω 125 MHz

(VOUT = 400mVP-P)
VS = 5V, AV = -1, RF = 500Ω 60 MHz
VS = 5V, AV = 2, RF = 500Ω 60 MHz

VS = 5V, AV = 10, RF = 500Ω 6 MHz

VS = 12V, AV = 1, RF = 0Ω 150 MHz

VS = 3V, AV = 1, RF = 0Ω 100 MHz

BW ±0.1dB Bandwidth VS = 12V, AV = 1, RF = 0Ω 25 MHz

(VOUT = 400mVP-P)
VS = 5V, AV = 1, RF = 0Ω 30 MHz

VS = 3V, AV = 1, RF = 0Ω 20 MHz

GBWP Gain Bandwidth Product VS = 12V, @ AV = 10 60 MHz

PM Phase Margin RL = 1kΩ, CL = 6pF 55 °

SR Slew Rate VS = 10V, RL = 150Ω, VOUT = 0V to 6V 200 275 V/µs

VS = 5V, RL = 150Ω, VOUT = 0V to +3V 300 V/µs

tR,tF Rise Time, Fall Time ±0.1V step 2.8 ns

OS Overshoot ±0.1V step 10 %

tPD Propagation Delay ±0.1V step 3.2 ns

3
 EL2257

Closed Loop AC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = +1.5V, VOUT = +1.5V, VCLAMP = +5V, VENABLE
= +5V, AV = +1, RF = 0Ω, RL = 150Ω to GND pin unless otherwise specified. (Note 1)

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

tS 0.1% Settling Time VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±3V 40 ns

0.01% Settling Time VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±3V 75 ns

dG Differential Gain (Note 2) AV = 2, RF = 1kΩ 0.05 %

dP Differential Phase (Note 2) AV = 2, RF = 1kΩ 0.05 °

eN Input Noise Voltage f = 10kHz 48 nV/√Hz

iN Input Noise Current f = 10kHz 1.25 pA/√Hz

tDIS Disable Time (Note 3) 50 ns

tEN Enable Time (Note 3) 25 ns

tCL Clamp Overload Recovery 7 ns

NOTES:
1. All AC tests are performed on a “warmed up” part, except slew rate, which is pulse tested.
2. Standard NTSC signal = 286mVP-P, f = 3.58MHz, as VIN is swept from 0.6V to 1.314V. RL is DC coupled.
3. Disable/Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply current has reached half
its final value.

4
 EL2257
Typical Performance Curves

Non-Inverting Frequency Non-Inverting Frequency 3dB Bandwidth vs Temperature for

Response (Gain) Response (Phase) Non-Inverting Gains

3dB Bandwidth vs Temperature for

Inverting Frequency Response (Gain) Inverting Frequency Response (Phase) Inverting Gains

Non-Inverting Frequency Response vs

Frequency Response for Various RL Frequency Response for Various CL Common Mode Voltage

5
 EL2257

Typical Performance Curves (Continued)

3dB Bandwidth vs Supply Voltage for Frequency Response for Various

Non-Inverting Gains Supply Voltages, AV = + 1 PSSR and CMRR vs Frequency

3dB Bandwidth vs Supply Frequency Response for Various PSRR and CMRR vs Die
Voltage for Inverting Gains Supply Voltages, AV = + 2 Temperature

Open Loop Gain and Phase vs Open Loop Voltage Gain vs Die Closed Loop Output Impedance
Frequency Temperature vs Frequency

6
 EL2257

Typical Performance Curves (Continued)

Large Signal Step Response, VS = +3V Large Signal Step Response, VS = +5V Large Signal Step Response, VS = +12V

Small Signal Step Response Large Signal Step Response, VS = ±5V

Slew Rate vs Temperature Settling Time vs Settling Accuracy Voltage and Current Noise vs Frequency

7
 EL2257

Typical Performance Curves (Continued)

Differential Gain for Single Differential Phase for Single Differential Gain and Phase for
Supply Operation Supply Operation Dual Supply Operation

2nd and 3rd Harmonic 2nd and 3rd Harmonic 2nd and 3rd Harmonic
Distortion vs Frequency Distortion vs Frequency Distortion vs Frequency

Output Voltage Swing vs Output Voltage Swing vs Frequency

Frequency for THD < 0.1% for Unlimited Distortion Output Current vs Die Temperature

8
 EL2257

Typical Performance Curves (Continued)

Supply Current vs Supply Voltage Supply Current vs Die Temperature

(per amplifier) (per amplifier) Input Resistance vs Die Temperature

Offset Voltage vs Die Input Offset Current and Input Bias

Temperature (4 Samples) Input Bias Current vs Input Voltage Current vs Die Temperature

Positive Output Voltage Swing vs Die Negative Output Voltage Swing vs

Temperature, RL = 150Ω to GND Die Temperature, RL = 150Ω to GND Clamp Accuracy vs Die Temperature

9
 EL2257

Typical Performance Curves (Continued)

Clamp Accuracy RL = 150Ω Clamp Accuracy RL = 1kΩ Clamp Accuracy RL = 10kΩ

Enable Response for a Family of DC Inputs Disable Response for a Family of DC Inputs

Disable/Enable Response for a Family of Sine Waves OFF Isolation

Package Power Dissipation vs Ambient Temperature

EL2257 Channel to Channel JEDEC JESD51-3 Low Effective Thermal Conductivity Test
Isolation vs Frequency Board
1.8
1.54W
1.6
PD
1.4 θ I
Power Dissipation (W)

JA P1
= 81 4
1.2 °C
1.042W W/
1 SO
14
θJ ( 0.1
0.8 A =1 50
20 ”)
°C
0.6 /W

0.4

0.2

0
0 25 50 75 85 100 125 150
Ambient Temperature (°C)

10
 EL2257

Simplified Schematic (One Channel)

Applications Information For good AC performance, parasitic capacitance should be

kept to a minimum. Ground plane construction should be
Product Description used. Carbon or Metal-Film resistors are acceptable with the
The EL2257, connected in voltage follower mode, -3dB Metal-Film resistors giving slightly less peaking and
bandwidth is 125MHz while maintaining a 275V/µs slew rate. bandwidth because of their additional series inductance.
With an input and output common mode range that includes Use of sockets, particularly for the SO (0.150") package
ground, this amplifier was optimized for single supply should be avoided if possible. Sockets add parasitic
operation, but will also accept dual supplies. It operates on a inductance and capacitance which will result in some
total supply voltage range as low as 2.7V or up to 12V. This additional peaking and overshoot.
makes them ideal for +3V applications, especially portable
computers. Supply Voltage Range and Single-Supply
Operation
While many amplifiers claim to operate on a single supply, The EL2257 has been designed to operate with supply
and some can sense ground at their inputs, most fail to truly voltages having a span of greater than 2.7V, and less than
drive their outputs to ground. If they do succeed in driving to 12V. In practical terms, this means that the EL2257 will
ground, the amplifier often saturates, causing distortion and operate on dual supplies ranging from ±1.35V to ±6V. With a
recovery delays. However, special circuitry built into the single-supply, the EL2257 will operate from +2.7V to +12V.
EL2257 allows the output to follow the input signal to ground Performance has been optimized for a single +5V supply.
without recovery delays.
Pins 11 and 4 are the power supply pins on the EL2257. The
Power Supply Bypassing And Printed Circuit positive power supply is connected to pin 11. When used in
Board Layout single supply mode, pin 4 is connected to ground. When
As with any high frequency device, good printed circuit board used in dual supply mode, the negative power supply is
layout is necessary for optimum performance. Ground plane connected to pin 4.
construction is highly recommended. Pin lengths should be
As supply voltages continue to decrease, it becomes
as short as possible. The power supply pins must be well
necessary to provide input and output voltage ranges that
bypassed to reduce the risk of oscillation. The combination
can get as close as possible to the supply voltages. The
of a 4.7µF tantalum capacitor in parallel with a 0.1µF
EL2257 has an input voltage range that includes the
ceramic capacitor has been shown to work well when placed
negative supply and extends to within 1.2V of the positive
at each supply pin. For single supply operation, where the
supply. So, for example, on a single +5V supply, the EL2257
GND pin is connected to the ground plane, a single 4.7µF
has an input range which spans from 0V to 3.8V.
tantalum capacitor in parallel with a 0.1µF ceramic capacitor
from the VS+ pin to the GND pin will suffice. The output range of the EL2257 is also quite large. It
includes the negative rail, and extends to within 1V of the top

11
 EL2257

supply rail with a 1kΩ load. On a +5V supply, the output is kept above 1.25V, dG and dP are a respectable 0.03% and
therefore capable of swinging from 0V to +4V. On split 0.03°.
supplies, the output will swing ±4V. If the load resistor is tied
For other biasing conditions see the Differential Gain and
to the negative rail and split supplies are used, the output
Differential Phase vs. Input Voltage curves.
range is extended to the negative rail.
Output Drive Capability
Choice of Feedback Resistor, RF
In spite of their moderately low 5mA of supply current, the
The feedback resistor forms a pole with the input
EL2257 is capable of providing ±100mA of output current
capacitance. As this pole becomes larger, phase margin is
into a 10Ω load, or ±60mA into 50Ω. With this large output
reduced. This increases ringing in the time domain and
current capability, a 50Ω load can be driven to ±3V with
peaking in the frequency domain. Therefore, RF has some
VS = ±5V, making it an excellent choice for driving isolation
maximum value which should not be exceeded for optimum
transformers in telecommunications applications.
performance. If a large value of RF must be used, a small
capacitor in the few picofarad range in parallel with RF can Driving Cables and Capacitive Loads
help to reduce this ringing and peaking at the expense of When used as a cable driver, double termination is always
reducing the bandwidth. recommended for reflection-free performance. For those
As far as the output stage of the amplifier is concerned, applications, the back-termination series resistor will de-
RF + RG appear in parallel with RL for gains other than +1. couple the EL2257 from the cable and allow extensive
As this combination gets smaller, the bandwidth falls off. capacitive drive. However, other applications may have high
Consequently, RF has a minimum value that should not be capacitive loads without a back-termination resistor. In these
exceeded for optimum performance. applications, a small series resistor (usually between 5Ω and
50Ω) can be placed in series with the output to eliminate
For AV = +1, RF = 0Ω is optimum. For AV = -1 or +2 (noise most peaking. The gain resistor (RG) can then be chosen to
gain of 2), optimum response is obtained with RF between make up for any gain loss which may be created by this
500Ω and 1kΩ. For AV = -4 or +5 (noise gain of 5), keep RF additional resistor at the output.
between 2kΩ and 10kΩ.
Disable/Power-Down
Video Performance
Each amplifier in the EL2257 can be individually disabled,
For good video performance, an amplifier is required to placing each output in a high-impedance state. The disable
maintain the same output impedance and the same or enable action takes only about 40ns. When all amplifiers
frequency response as DC levels are changed at the output. are disabled, the total supply current is reduced to 0mA,
This can be difficult when driving a standard video load of thereby eliminating all power consumption by the EL2257.
150Ω, because of the change in output current with DC level. The EL2257 amplifier’s power down can be controlled by
Differential Gain and Differential Phase for the EL2257 are standard CMOS signal levels at each ENABLE pin. The
specified with the black level of the output video signal set to applied CMOS signal is relative to the GND pin. For
+1.2V. This allows ample room for the sync pulse even in a example, if a single +5V supply is used, the logic voltage
gain of +2 configuration. This results in dG and dP levels will be +0.5V and +2.0V. If using dual ±5V supplies,
specifications of 0.05% and 0.05° while driving 150Ω at a the logic levels will be -4.5V and -3.0V. Letting all ENABLE
gain of +2. Setting the black level to other values, although pins float will disable the EL2257. If the power-down feature
acceptable, will compromise peak performance. For is not desired, connect all ENABLE pins to the VS+ pin. The
example, looking at the single supply dG and dP curves for guaranteed logic levels of +0.5V and +2.0V are not standard
RL = 150Ω, if the output black level clamp is reduced from TTL levels of +0.8V and +2.0V, so care must be taken if
1.2V to 0.6V dG/dP will increase from 0.05%/0.05° to standard TTL will be used to drive the ENABLE pins.
0.08%/0.25°. Note that in a gain of +2 configuration, this is
the lowest black level allowed such that the sync tip doesn’t Output Voltage Clamp
go below 0V. The EL2257 amplifier has an output voltage clamp. This
clamping action is fast, being activated almost
If your application requires that the output goes to ground,
instantaneously, and being deactivated in < 7ns, and
then the output stage of the EL2257, like all other single
prevents the output voltage from going above the preset
supply op amps, requires an external pull down resistor tied
clamp voltage. This can be very helpful when the EL2257 is
to ground. As mentioned above, the current flowing through
used to drive an A/D converter, as some converters can
this resistor becomes the DC bias current for the output
require long times to recover if overdriven. The output
stage NPN transistor. As this current approaches zero, the
voltage remains at the clamp voltage level as long as the
NPN turns off, and dG and dP will increase. This becomes
product of the input voltage and the gain setting exceeds the
more critical as the load resistor is increased in value. While
clamp voltage. For example, if the EL2257 is connected in a
driving a light load, such as 1kΩ, if the input black level is
gain of 2, and +3V DC is applied to the CLAMP pin, any

12
 EL2257

voltage higher than +1.5V at the inputs will be clamped and

+3V will be seen at the output. Each amplifier of the EL2257
have their own CLAMP pin, so individual clamp levels may
be set.

Figure 1 below is the EL2257 with each amplifier unity gain

connected. Amplifier A is being driven by a 3VP-P sinewave
and has 2.25V applied to CLAMPA, while amplifier B is
driven by a 3VP-P triangle wave and 1.5V is applied to
CLAMPB. The resulting output waveforms, with their outputs
being clamped is shown in Figure 2.

FIGURE 3.

The clamp accuracy is affected by 1) the CLAMP pin voltage,

2) the input voltage, and 3) the load resistor. Depending
upon the application, the accuracy may be as little as a few
tens of millivolts up to a few hundred millivolts. Be sure to
allow for these inaccuracies when choosing the clamp
voltage. Curves of Clamp Accuracy vs. VCLAMP and VIN for
3 values of RL are included in the Typical Performance
Curves section.

Unlike amplifiers that clamp at the input and are therefore

limited to non-inverting applications only, the EL2257 output
FIGURE 1. clamp architecture works for both inverting and non-inverting
gain applications. There is also no maximum voltage
difference limitation between VIN and VCLAMP which is
common on input clamped architectures.

The voltage clamp operates for any voltage between +1.2V

above the GND pin, and the minimum output voltage swing,
VOP. Forcing the CLAMP pin much below +1.2V can saturate
transistors and should therefore be avoided. Forcing the
CLAMP pin above VOP simply de-activates the CLAMP
feature. In other words, one cannot expect to clamp any
voltage higher than what the EL2257 can drive to in the first
place. If the clamp feature is not desired, either let the
CLAMP pin float or connect it to the VS+ pin.

EL2257 Comparator Application

FIGURE 2. The EL2257 can be used as a very fast, single supply
comparator by utilizing the clamp feature. Most op amps
Figure 3 shows the output of amplifier A of the same circuit used as comparators allow only slow speed operation
being driven by a 0.5V to 2.75V square wave as the clamp because of output saturation issues. However, by applying a
voltage is varied from 1.0V to 2.5V, as well as the unclamped DC voltage to the CLAMP pin of the EL2257, the maximum
output signal. The rising edge of the signal is clamped to the output voltage can be clamped, thus preventing saturation.
voltage applied to the CLAMP pin almost instantaneously. Figure 4 is amplifier A of an EL2257 implemented as a
The output recovers from the clamped mode within 5–7ns, comparator. 2.25V DC is applied to the CLAMP pin, as well
depending on the clamp voltage. Even when the CLAMP pin as the IN- pin. A differential signal is then applied between
is taken 0.2V below the minimum 1.2V specified, the output the inputs. Figure 5 shows the output square wave that
is still clamped and recovers in about 11ns. results when a ±1V, 10MHz triangular wave is applied, while
Figure 6 is a graph of propagation delay vs. overdrive as a
square wave is presented at the input.

13
 EL2257

VIN 1 14 VOUT
75Ω + 150Ω
2 13
-

3 12

4 11 +5V

5 10

+
6 9
-

7 8

FIGURE 4. FIGURE 7.

FIGURE 5. FIGURE 8.

Propagation Delay vs Overdrive Multiplexing with the EL2257

EL2257 as a Comparator
The ENABLE pins on the EL2257 allow for multiplexing
applications. Figure 9 shows an EL2257 with both outputs
tied together, driving a back terminated 75Ω video load. Two
sinewaves of varying amplitudes and frequencies are
applied to the two inputs. Logic signals are applied to each of
the ENABLE pins to cycle through turning each of the
amplifiers on, one at a time. Figure 10 shows the resulting
output waveform at VOUT. Switching is complete in about
50ns. Notice the outputs are tied directly together.
Decoupling resistors at each output are not necessary. In
fact, adding them approximately doubles the switching time
FIGURE 6.
to 100ns.

1.3VP-P 1 14
Video Sync Pulse Remover Application 1MHz
+
All CMOS Analog to Digital Converters (A/Ds) have a 2
-
13

parasitic latch-up problem when subjected to negative input 3 12

voltage levels. Since the sync tip contains no useful video
1 of 2
information and it is a negative going pulse, we can chop it CLK De- 4 11
coder 150Ω
off. Figure 7 shows a unity gain connected amplifier A of an 5 10 0.1µF 4.4µF
EL2257. Figure 8 shows the complete input video signal
+
applied at the input, as well as the output signal with the 6
-
9 VOUT

negative going sync pulse removed. 7.5VP-P 7 8

5MHz

FIGURE 9.

14
 EL2257

where:

N = Number of amplifiers

VS = Total supply voltage

ISMAX = Maximum supply current per amplifier

VOUT = Maximum output voltage of the application

RL = Load resistance tied to ground

If we set the two PDMAX equations, [1] and [2], equal to each
other, and solve for VS, we can get a family of curves for
FIGURE 10. various loads and output voltages according to:
Short Circuit Current Limit R L × ( T JMAX - T AMAX ) 2
The EL2257 has internal short circuit protection circuitry that --------------------------------------------------------------- + ( V OUT )
N × θ JA
protect it in the event of its output being shorted to either V S = ----------------------------------------------------------------------------------------------
( I S × R L ) + V OUT
supply rail. This limit is set to around 100mA nominally and
reduces with increasing junction temperature. It is intended Figure 11 below shows total single supply voltage VS vs. RL
to handle temporary shorts. If an output is shorted for various output voltage swings for the PDIP and SO
indefinitely, the power dissipation could easily increase such (0.150") packages. The curves assume worst-case
that the part will be destroyed. Maximum reliability is conditions of TA = +85°C and IS = 6.5mA per amplifier.
maintained if the output current never exceeds ±90mA. A
heat sink may be required to keep the junction temperature EL2257 Single Supply Voltage
below absolute maximum when an output is shorted vs. RLoad for Various
VOUT and Packages
indefinitely.

Power Dissipation
With the high output drive capability of the EL2257, it is
possible to exceed the 150°C Absolute Maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for the application to determine if power-supply
voltages, load conditions, or package type need to be
modified for the EL2257 to remain in the safe operating area.

The maximum power dissipation allowed in a package is

determined by:
T JMAX - T AMAX
PD MAX = --------------------------------------------
-
θ JA FIGURE 11.

where:

TJMAX = Maximum junction temperature

TAMAX = Maximum ambient temperature

θJA = Thermal resistance of the package

PDMAX = Maximum power dissipation in the package

The maximum power dissipation actually produced by an IC

is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
V OUT
PD MAX = N × V S × I SMAX + ( V S - V OUT ) × ----------------
RL

15
 EL2257

EL2257 Macromodel (one channel)

* Revision A, October 1995
* Pin numbers reflect a standard single opamp.
* When not being used, the clamp pin, pin 1,
* should be connected to Vsupply, pin 7
* Connections: +input
* | -input
* | | +Vsupply
* | | | -Vsupply
* | | | | output
* | | | | | clamp
* | | | | | |
.subckt EL2257/el 3 2 7 4 6 1
*
* Input Stage
*
i1 7 10 250µA
i2 7 11 250µA
r1 10 11 4K
q1 12 2 10 qp
q2 13 3 11 qpa
r2 12 4 100
r3 13 4 100
*
* Second Stage & Compensation
*
gm 15 4 13 12 4.6m
r4 15 4 15Meg
c1 15 4 0.36pF
*
* Poles
*
e1 17 4 15 4 1.0
r6 17 25 400
c3 25 4 1pF
r7 25 18 500
c4 18 4 1pF
*
* Connections:IN+IN+IN+IN+IN+IN+IN+INININININ
* Output Stage & Clamp
*
i3 20 4 1.0mA
q3 7 23 20 qn
q4 7 18 19 qn
q5 7 18 21 qn
q6 4 20 22 qp
q7 7 23 18 qn
d1 19 20 da
d2 18 1 da
r8 21 6 2
r9 22 6 2
r10 18 21 10k
r11 7 23 100k
d3 23 24 da
d4 24 4 da
d5 23 18 da
*
* Power Supply Current
*
ips 7 4 3.2mA

16
 EL2257

*
* Models
*
.model qn npn(is800e-18 bf150 tf0.02nS)
.model qpa pnp(is810e-18 bf50 tf0.02nS)
.model qp pnp(is800e-18 bf54 tf0.02nS)
.model da d(tt0nS)
.ends

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at [Link]/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see [Link]

17