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Multi Processor

The document describes the characteristics and interconnection structures of Multiprocessor Systems (MIMD), highlighting their ability to perform parallel computations through independent jobs or partitioned tasks. It outlines various interconnection components including time-shared common bus, multi-port memory, crossbar switch, multistage switching network, and hypercube systems. Each component has distinct functionalities and configurations that facilitate communication between CPUs, memory, and I/O devices.
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0% found this document useful (0 votes)
6 views4 pages

Multi Processor

The document describes the characteristics and interconnection structures of Multiprocessor Systems (MIMD), highlighting their ability to perform parallel computations through independent jobs or partitioned tasks. It outlines various interconnection components including time-shared common bus, multi-port memory, crossbar switch, multistage switching network, and hypercube systems. Each component has distinct functionalities and configurations that facilitate communication between CPUs, memory, and I/O devices.
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© All Rights Reserved
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Multiprocessor System: Interconnection structure

Multiprocessors System (MIMD): Characteristics of Multiprocessors

▪ An interconnection of two or more CPUs with memory and I/O equipment


▪ A single CPU and one or more IOPs is usually not included in a multiprocessor system
▪ Computation can proceed in parallel in one of two ways
1) Multiple independent jobs can be made to operate in parallel
2) A single job can be partitioned into multiple parallel tasks
▪ Classified by the memory Organization
1) Shared memory or Tightly-coupled system:
2) Distribute memory or Loosely-coupled system
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Interconnection Structure: the components that form the multiprocessor system are CPU,
IOP connected to I/O devices, and memory unit that may be portioned into a few separate
modules. Multiprocessor System Components
1) Time-shared common bus
2) Multi-port memory
3) Crossbar switch
4) Multistage switching network
5) Hypercube system

1)) Time-shared single common bus system: Only one processor can communicate with the
memory or another processor at any given time, when one processor is communicating with
the memory, all other processors are either busy with internal operations or must be idle
waiting for the bus Memory.
2)) multi-port memory: Multiple paths between processors and memory. High transfer rate
can be achieved. Expensive memory control logic / large number of cables & connectors.
3)) Crossbar switch: Crosspoints are placed at intersections between processor buses and
memory module paths. A small square in each crosspoints is a switch that determines the
path from a processor to a memory module. Each switch point has a control logic to set up
the transfer path between processor and memory module.

4))Multistage Switching Network: Control the communication between a number of sources


and destinations.
•Tightly coupled system : PU MM
•Loosely coupled system : PU PU
Basic components of a multistage switching network are two-input, two-output interchange
switch : the two Input has labled A & B and two output labeled 0 & 1.
Omega Network: 2 x 2 Interchange switch with N input x N output network topology.

5)) Hypercube Interconnection: The hypercube or binary n-cube multiprocessor structure is


a Loosely coupled system composed of N=2n processors interconnected in an n-dimensional
binary cube. Each processor forms a node for the cube.

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