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BIPOLAR JUNCTION TRANSISTOR (BJT)

TRANSISTOR – It is combination of two words transfer and resistor. Transistor transfers the current of
input signal from a low resistance circuit to high resistance circuit.
Transfer + Resistor ⎯→ Transistor
❖ BIPOLAR: That means conduction takes place due to free electrons as well as free holes is called
bipolar device. Example: n-p-n and p-n-p transistor.
❖ UNIPOLAR – The conduction takes place due to free electrons or holes is called unipolar device.
Example: FET (field effect transistor).
Transistor is a three terminal
Collector (C), Emitter (E) and base (b)
The BJT of two types

• n-p-n transistor and p-n-p transistor

Constriction and symbol of transistor:

SYMBOL OF TRANSISTOR (BJT) –Arrow always placed on the emitter terminals and arrow indicates
the direction of conventional current.
Base is always thin and lightly doped layer
Doping level: (DE>DC)>>Db, D- doping .The emitter is slightly more heavily doped compare to the
collector but emitter and collector are much heavily doped compare to base.
Area of terminals: (AC>AE)>> Ab A-area. The area of collector layer is largest. So it can dissipate heat
quickly
THE REGION OF OPERATION OF TRANSISTOR:

Region of operation Emitter base junc. (JE ) Collector base junc. (JC)

Active region forward biased reverse biased

Saturation region forward biased forward biased

Cut-off region reverse biased reverse biased

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TRANSISTOR BIASING FOR ACTINE REGION:

VBE=base to emitter voltage

VCE =collector to emitter voltage
VBC = base to collector voltage

❖ OPERATION (WORKING) OF n-p-n TRANSISTAR:

The negative supply VEE is applied to emitter junction for forward biased and the positive voltage V CC is
applied to emitter junction for reverse biased hence, the width of depletion region for B-E junction is very
small but that at the C-B junction is large

OPERATION (Working):

As, emitter is forward biased so, negative terminal of battery VEE repel the electron present in n-type materials.
These electrons constitute the emitter current IE. This electrons from the emitter region to crossover to the base
region as base is lightly doped with p-type impurity.

Hence the number of holes in the base region is very small and the number of electrons that recombine with
hole in the p-type base region is also very small. Hence a few electrons combine with hole to constitute a
base a current IB. The remaining electron more than 98% crossover into the collector region constitute a
collector current IC .

So total emitter current is

IE= IC+ IB This is known as transistor equation of BJT. IB<< IC and IE

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❖ OPERATION OF p-n-p TRANSISTOR:

The positive supply VEE is applied to emitter junction for forward biased and the negative voltage V CC is
applied to emitter junction for reverse biased hence, the width of depletion region for B-E junction is very
small but that at the C-B junction is large

Operation: As show in above figure, the forward bias applied to the emitter base junction of a p-n-p
transistor cause a lot of hole from emitter region to crossover to the base region. This hole creates emitter
current (IE). As the base region is lightly doped with n-type impurity the number of electron combine with
hole is as also small. This constitutes base current (IB). The remaining hole more than 98% cross over the
collector region to constitute a collector current IC.
So total emitter current is

IE= IC+ IB This is known as transistor equation of BJT. IB<< IC and IE

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Configuration of Transistor Circuit

(1) Common base (CB) Configuration
(2) Common emitter (CE) Configuration
(3) Common collector (CC) Configuration
❖ Common Base (CB) Configuration
• Transistor working in active region the input is applied between emitter and base. The base acts as
common and hence the name is Common Base Configuration. The input voltage is VBE and input
current is IE.
• The output is taken between collector and base, therefore the output voltage is VCB and output
current is IC

Circuit diagram of CB of n-p-n transistor Construction diagram of CB of npn transistor

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Characteristics curve of C.B Configuration of transistor:

❖ Input characteristics ( Base Curve)

Input characteristics are graph between input voltage (VBE) and input current (IE) when output
voltage is constant (VCB).

In the active region the input base is forward biased, therefore, input characteristic is simply the forward
biased characteristic of the emitter to base junction for various collector (VCB) voltages. Below cut in
voltage (0.7 V) the emitter current is very small (approximately zero). From this curve we can determine
the input resistance (Rin) of C.B configuration as

❖ Output characteristics ( Collector Curve)

Output characteristics curve is graph between output voltage (VCB) and output current (IC) when
input current (IE) is constant.

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Active Region:
• In the active region the collector-base junction is reverse-biased, while the base-emitter junction is
forward-biased.
• The curves clearly indicate that the relationship between IE and IC in the active region is
approximately constant and given by IE .
• The equation is valid in active region and VBE = 0.7 V (Si).
• In active region output resistance can be determined as

Saturation region:
• The region to the left of the VCB = 0, and above the IE = 0, characteristic in which both emitter and
collector junction are forward biased, is called saturation region.
• When collector junction is forward biased, there is large change in collector current with small
changes in collector voltage.
• In this region the base emitter voltage is VBE = 0.7 V (Si).
Cut off region:
• The region below IE = 0 and to the upper of VCB for which emitter and collector junctions are both
reversed biased is referred to cutoff region.
• The collector current is same as IC= ICBO (reverse saturation current). It means collector to base
current with emitter open.

Transfer Characteristics for CB Configuration:

The current transfer characteristics for CB configuration which illustrates the graph between input current (
IE ) and output current (IC ) keeping output voltage ( VCB ) as a constant. The resulting current gain (α) has
a value less than 1 and can be mathematically expressed as

❖ Common Emitter (CE) Configuration

• Transistor working in active region the input is applied between base and emitter. The emitter acts
as common and hence the name is Common Emitter Configuration. The input voltage is VBE and input
current is IB.
• The output is taken between collector and emitter, therefore the output voltage is VCE and output
current is IC

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Circuit diagram of CE of n-p-n transistor Construction diagram of CE of npn transistor

Characteristics curve of C.E Configuration of transistor:

❖ Input characteristics ( Base Curve)

Input characteristics are graph between input voltage (VBE) to input current (IB) when output
voltage is constant (VCE).

In the active region the input base is forward biased, therefore, input characteristic is simply the forward
biased characteristic of the base to emitter junction for various collector (VCE) voltages. Below cut in

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voltage (0.7 V) the base current is very small (approximately zero). From this curve we can determine the
input resistance (Rin) of C.E configuration as

❖ Output characteristics ( Collector Curve)

Output characteristics curve is graph between output voltage (VCE) and output current (IC) to when
input current (IB) is constant.

Active Region:
• In the active region the collector-base junction is reverse-biased, while the base-emitter junction is
forward-biased.
• The curves clearly indicate that the linear relationship between IB and IC in the active region is
approximately constant and given by IB .
• The equation is valid in active region and VBE = 0.7 V (Si).
• In active region output resistance can be determined as

Saturation region:
• The region to the left of the VCE = 0.1 to 0.3, and above the IB = 0, characteristic in which both
emitter and collector junction are forward biased, is called saturation region.
• When collector junction is forward biased, there is large change in collector current with small
changes in collector voltage.
• In this region the base emitter voltage is VBE = 0.7 V (Si).
Cut off region:
• The region below IB = 0 and to the upper of VCE for which emitter and collector junctions are both
reversed biased is referred to cutoff region.
• The collector current is same as IC= ICEO (reverse saturation current). It means collector to base
current with base open.

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Transfer Characteristics for CE Configuration:

The current transfer characteristics for CE configuration which illustrates the graph between input current
(IB ) and output current (IC ) keeping output voltage (VCE ) as a constant. The resulting current gain ( ) has
a value greater than 1 and can be mathematically expressed as

❖ Common Collector (CC) Configuration

• Transistor working in active region the input is applied between base and collector. The collector
acts as common and hence the name is Common Collector Configuration. The input voltage is VBC and
input current is IB.
• The output is taken from Emitter, therefore the output voltage is VCE and output
current is IE

Circuit diagram of CC of n-p-n transistor Construction diagram of CC of npn transistor

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Characteristics curve of C.C Configuration of transistor:

❖ Input characteristics

Input characteristics are graph between input voltage (VCB) to input current (IB) when output
voltage is constant (VCE).

In the active region the input base is forward biased, therefore, input characteristic is simply the forward
biased characteristic of the base to collector junction for various collector (VCE) voltages. Below VCB
voltage (2 to 4 v) the depend on VCE voltage base current is very small (approximately zero). From this
curve we can determine the input resistance (Rin) of C.C configuration as
| VCE constant

❖ Output characteristics

Output characteristics curve is graph between output voltage (VCE) and output current (IE) when
input current (IB) is constant.

Active Region:
• In the active region the collector-base junction is reverse-biased, while the base-emitter junction is
forward-biased.
• The curves clearly indicate that the relationship between IE and IB in the active region is
approximately constant and given by IE .
• The equation is valid in active region
• In active region output resistance can be determined as
| Ib constant

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Saturation region:
• The region to the left of the VCE = 0, and above the IB = 0, characteristic in which both emitter and
collector junction are forward biased, is called saturation region.
• When collector junction is forward biased, there is large change in collector current with small
changes in collector voltage.
• In this region the base emitter voltage is VBE = 0.7 V (Si).
Cut off region:
• The region below IB = 0 and to the upper of VCE for which emitter and collector junctions are both
reversed biased is referred to cutoff region.
• The collector current is same as IC= ICEO (reverse saturation current). It means collector to base
current with base open.
Transfer Characteristics for CC Configuration:
The current transfer characteristics for CC configuration which illustrates the graph between input current
(Ib) and output current (IE) keeping output voltage (VCE) as a constant. The resulting current gain (γ) has a
value >> 1 and can be mathematically expressed as
| VCE constant

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❖ COMPARISION of CB, CE and CC Amplifier and Configuration

Characteristic Common Base Common Emitter Common Collector

Input Impedance Low Medium High

Output Impedance Very High High Low
Phase Angle 0o 180o 0o
Voltage Gain High Medium Low
Current Gain Low Medium High
Power Gain Low Very High Medium
Application Pre-amplifier Power Amplifier Impedance matching

❖ Why common emitter (C.E) configuration is most preferred configuration for power
amplifier?
• It has high current gain and high voltage gain. So its power is high because power is multiplication of
voltage and current.
• The common emitter configuration has moderate values of input resistance and output resistance.
Therefore, may shuck stages can be coupled to each other without using any additional Impedance Matching
circuit.
❖ Why base is thin and lightly doped region compared to emitter and collector region?
The thin and lightly doped base region offers less number of majority charge carriers stuck in base region,
which reduced the possibility of recombination of holes and electrons. Hence, reducing the base current and
also leads to increase collector current. Hence, current gain increases the transistor.
❖ What is early effect?
As the collector voltage (VCC) is made to increase the reverse bias the depletion width between collector and
base tends to increase the, with the result that the effective width of the base decreases. This effect is known
as Early Effect or Base Width Modulation.
Punch through: For extremely large voltage of VCC, the effective base width may reduce to zero; causing
voltage breakdown in the transistor. This phenomenon is called Punch through.

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FIELD EFFECT TRANSISTOR (FET)

❖ Advantages of FET compare to BJT (conventional Transistor):
• FET is voltage controlled device.
• FET is unipolar device.
• FET has high input impedance.
• FET is more temperature stable than BJT.
• FET is usually smaller than BJT.
• FET is less noisy compare to BJT.
Disadvantages of FETs:
• Small gain bandwidth product compare to BJT.
• Slower switching speed compared to BJT

❖ Difference between FET and BJT

FET BJT
(1)FET is unipolar device (Unipolar means current (1) BJT is bipolar device (Bipolar means current
flow due to only majority carriers like free holes or flow due to both free electrons as well as holes.)
electrons)
(2) FET is voltage controlled device (2) BJT is current controlled device
(3)FET has high input impedance. (3) BJT has low input impedance compared to FET.
(4) FET is less noisy compare to BJT (4) BJT is more noisy compare to FET
(5) It’s size is more compact compare to BJT (5) Its size is not compact compared to FET.
(6) FET’s are more temperature stable than BJT. (6)BJT’s are less temperature stable than FET.

(7) There is no thermal run away. (7)Thermal run away present

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❖ N- Channel JFET
Construction of JEET (n-channel)

In n-channel JEET n-type material is embedded between p-type materials. Channel is n-type material. So,
it is called n-channel JEET. The electron enters the channel through the source (S) terminal and leave
through the drain (D) terminal. The gate (G) controlled the flow of electrons in the channel.
Construction: Symbol:

N-Channel P-Channel

Operation of JEET (n-channel):-

• VGS = 0 and VDS some positive value (increases): Positive voltage VDS ( VDD ) is applied across the
channel and gate is connected directly to the source to establish the condition VGS =0.

• The result is a gate and source terminal at the same terminal at the same terminal at the same potential.
The voltage (VDD=VDS) is applied, the electrons are drawn to the drain terminal, establishing the
convectional current ID with the defined direction.
• It is important to note that the depletion region is wider near the top of both p-type materials. The
reason for change in width of the channel is that the upper region of the p-type material will be more
reverse biased than with lower region. So, we know that greater the reverse bias, the wider the
depletion region.
• As the VDS is increased from 0 V to few volts, the current will increase as determined by ohm’s law and
this region is known as Ohmic region.
Pinch off condition : (Pinch off voltage ) (Vp):
The value of VDS (VDD ) at constant value of VGS the drain current becomes constant. This voltage is
known as pinch off voltage (VP). At this voltage channel becomes narrow.

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• VGS =(-VE) and VDS is constant .Due to negative voltage applied between the gate and source
terminal , the penetration of depletion region into n-type material increases further . Due to
reduction in channel width less number of electrons passes through drain from source.
Cut-off voltage: The value of VGS at constant value of VDS that makes the drain current (Id )
approximately equal to zero is called cut-off voltage .

IDSS= is the maximum drain current for a JEET and is defined by the condition when VGS =0 and VDS>|Vp| .

V-I CHARACTERISTICS CURVE OF N- CHANEEL JEET:

❖ Drain characteristics curve (Drain Curve):

Drain characteristics is graph between Drain current (Id) and drain to source voltage (VDS) when VGS is
constant.

As VDS is increased from 0 V to few volts, the current will increase as determine by ohms law. This
region is known as Ohmic region. The value of VDS where the pinch-off (VP) occurs, the drain current
becomes constant (IDSS).
Cutoff Region: This is the region where the JFET transistor is OFF, meaning no drain current, ID flows
from drain to source.
Ohmic Region: This is the region where the JFET transistor begins to show some resistance to the drain
current, Id that is beginning to flow from drain to source. This is the only region in the curve where the
response is linear.
Saturation Region: This is the region where the JFET transistor is fully operation and maximum current,
for the voltage, VGS, that is supplied is flowing. During this region, the JFET is ON and active.

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Trans- Conductance Curve ( Transfer Curve):Trans-Conductance is graph between VGS and

Drain Current (Id) and follows the equation of Shockley’s.

The relationship between ID and VGS is defined by Shockley’s equation:

When VGS = 0

When VGS = Vp

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❖ JFET AS VOLTAGE VARIABLE RESISTOR (VVR)

The Ohmic region or voltage-controlled resistance region. In this region the JFET can actually be
employed as a variable resistor whose resistance is controlled by the applied gate-to-source voltage (VGS).
For VDS < VP is a function of the applied voltage VGS. As VGS becomes more and more negative, the
slope of drain curve becomes more and more horizontal, corresponding with an increasing resistance
level. The following equation will provide a good first approximation to the resistance level in terms of
the applied voltage. Where ro is the resistance with VGS = 0 V and rd the resistance at a particular voltage
level.

❖ P- Channel JFET
Construction of JEET (p-channel): In p-channel JEET p-type material is embedded between n-type
materials. Channel is p-type material. So, it is called p-channel JEET. The holes enter the channel through
the source (S) terminal and leave through the drain (D) terminal. The gate (G) controlled the flow of holes
in the channel.
Construction:

Operation of JEET (n-channel):-

• VGS = 0 and VDS some negative value (increases): Positive voltage VDS ( VDD ) is applied across the
channel and gate is connected directly to the source to establish the condition VGS =0.

• The result is a gate and source terminal at the same terminal at the same terminal at the same potential.
The voltage (VDD=VDS) is applied, the holes are drawn to the drain terminal, establishing the
convectional current ID with the defined direction.

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• It is important to note that the depletion region is wider near the top of both p-type materials. The
reason for change in width of the channel is that the upper region of the p-type material will be more
reverse biased than with lower region. So, we know that greater the reverse bias, the wider the
depletion region.
• As the VDS is increased from 0 V to few volts, the current will increase as determined by ohm’s law and
this region is known as Ohmic region.
Pinch off condition : (Pinch off voltage ) (Vp):
The value of VDS (VDD ) at constant value of VGS the drain current becomes constant. This voltage is
known as pinch off voltage (VP). At this voltage channel becomes narrow.

• VGS =(+VE) and VDS is constant .Due to positive voltage applied between the gate and source
terminal , the penetration of depletion region into p-type material increases further . Due to
reduction in channel width less number of holes passes through drain from source.
Cut-off voltage: The value of VGS at constant value of VDS that makes the drain current (Id )
approximately equal to zero is called cut-off voltage .

IDSS= is the maximum drain current for a JEET and is defined by the condition when VGS =0 and VDS>|Vp| .

V-I CHARACTERISTICS CURVE OF P- CHANEEL JEET:

❖ Drain characteristics curve (Drain Curve):

Drain characteristics is graph between Drain current (Id) and drain to source voltage (VDS) when VGS is
constant.
As VDS is increased from 0 V to few volts, the current will increase as determine by ohms law. This
region is known as ohmic region. The value of VDS where the pinch-off (VP) occurs, the drain current
becomes constant (IDSS).
Cutoff Region: This is the region where the JFET transistor is OFF, meaning no drain current, ID flows
from drain to source.
Ohmic Region: This is the region where the JFET transistor begins to show some resistance to the drain
current, Id that is beginning to flow from drain to source. This is the only region in the curve where the
response is linear.

Saturation Region: This is the region where the JFET transistor is fully operation and maximum current
flow, for the voltage VGS. During this region, the JFET is ON and active.
Breakdown Region: This is the region where the voltage that is supplied to the source terminal (V DS) of
the transistor exceeds the necessary maximum. At this point, the JFET loses its ability to resist current

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because too much voltage is applied across its source-drain terminals. The transistor breaks down and
current flows from source to drain.
Trans-Conductance Curve ( Transfer Curve):Trans-Conductance is graph between VGS and
Drain Current (Id) and follows the equation of Shockley’[Link] relationship between ID and VGS is defined
by Shockley’s equation

By shokley equation:
When VGS = 0

When VGS = Vp

Depletion MOSFET (D – MOSFET)

❖ N – Channel D – MOSFET
A slab of P-type material is formed from a silicon base and is referred as the substrate. The Source and
Drain terminals are connected through metallic contacts to n-doped regions linked by an n-channel. The
gate is also connected to a metal contact surface but remains insulated from the n-channel by a very thin
silicon dioxide (SiO2) layer. Silicon is a type of insulator layer referred to as a dielectric. It is the
insulating layer of SiO2 in the MOSFET construction that accounts for the very desirable high input
impedance of the device. So IG (Gate Current) is essentially 0 Amp
Basic Construction: Symbol:

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• Basic Operation:
• VGS = 0 and VDD (+Ve) or VDS Variable:
As Vgs = 0 means Gate is directly connected to the source and VDD (VDS ) is applied across the drain to
source terminals. The result is an attraction of electrons from the channel. If VGS =0, then ID= IDSS . Hence
D-MOSFET is known as “ON” MOSFET.

• If VGS is (-Ve):
As SiO2 (dielectric materials) is between the metal and semiconductor materials so, metal and
semiconductor material behave as capacitor plate and SiO2 as dielectric materials. If negative voltage
(VGS) is applied on the metal (gate) and this voltage produce negative charge across between SiO2 and
semiconductor materials. These negative charges repel the electrons of the channel and attract the positive
charge (holes) from the substrate.
A level of recombination between electrons and holes will occur that will reduce the number of free
electrons in the n-channel available for conduction. So drain current decreases. This is known as Cut-off
voltage.

• If VGS is (+ve): (Effect of Positive Voltage)

If V GS is positive then gate will draw additional electrons (minority) charge from substrate. So, negative
charges increases in channel and enhance the drain current. Hence D-MOSFET converted in E-MOSFET.
V-I characteristics curve of N-channel D-MOSFET

❖ Drain Characteristics Curve:

Drain characteristics is graph between Drain current (Id) and drain to source voltage (VDS) when VGS is
constant. As VDS is increased from 0 V to few volts, the current will increase as determine by ohms law.

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This region is known as ohmic region. The value of VDS where the pinch-off (VP) occurs, the drain current
becomes constant (IDSS).
Cutoff Region: This is the region where the D-MOSFET transistor is OFF, meaning no drain current,
ID flows from drain to source.
Ohmic Region: This is the region where the D-MOSFET transistor begins to show some resistance to the
drain current Id that is beginning to flow from drain to source. This is the only region in the curve where
the response is linear.
Saturation Region: This is the region where the D-MOSFET transistor is fully operation and maximum
current flow, for the voltage VGS. During this region, the D-MOSFET is ON and active.

❖ TRANSCONDUCTANCE CURVE ( TRANSFER CHARACTERISTICS)

Trans-Conductance is graph between VGS and Drain Current (Id) and follows the equation of
Shockley’[Link] relationship between ID and VGS is defined by Shockley’s equation

By Shockley Equation Trans-conductance curve

When VGS = 0

When VGS = Vp

❖ P -Channel D - MOSFET

A slab of n-type material is formed from a silicon base and is referred as the substrate. The Source and
Drain terminals are connected through metallic contacts to p-doped regions linked by a p-channel. The
gate is also connected to a metal contact surface but remains insulated from the p-channel by a very thin
silicon dioxide (SiO2) layer. Silicon is a type of insulator layer referred to as a dielectric. It is the

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insulating layer of SiO2 in the MOSFET construction that accounts for the very desirable high input
impedance of the device. So IG (Gate Current) is essentially 0 Amp
Basic Construction: Symbol:

• Basic Operation:
• VGS = 0 and VDD (-Ve) or VDS Variable:
As Vgs = 0 means Gate is directly connected to the source and VDD (VDS ) is applied across the drain to
source terminals. The result is an attraction of holes from the channel. If VGS =0, then ID= IDSS . Hence D-
MOSFET is known as “ON” MOSFET.

• If VGS is (+Ve):
As SiO2 (dielectric materials) is between the metal and semiconductor materials so, metal and
semiconductor material behave as capacitor plate and SiO2 as dielectric materials. If positive voltage (VGS)
is applied on the metal (gate) and this voltage produce positive charge across between SiO2 and
semiconductor materials. These positive charges repel the holes of the channel and attract the negative
charge (electrons) from the substrate.
A level of recombination between holes and electrons will occur that will reduce the number of free holes
in the p-channel available for conduction. So drain current decreases. This is known as Cut-off voltage.

• If VGS is (-ve): (Effect of negative Voltage)

If V GS is negative then gate will draw additional holes (minority) charge from substrate. So, positive
charges increases in channel and enhance the drain current. Hence D-MOSFET converted in E-MOSFET.
V-I characteristics curve of P-channel D-MOSFET

❖ Drain Characteristics Curve:

Drain characteristics is graph between Drain current (Id) and drain to source voltage (VDS) when VGS is
constant. As VDS is increased from 0 V to few volts, the current will increase as determine by ohms law.
1

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This region is known as ohmic region. The value of VDS where the pinch-off (VP) occurs, the drain current
becomes constant (IDSS).
Cutoff Region: This is the region where the D-MOSFET transistor is OFF, meaning no drain current,
ID flows from drain to source.
Ohmic Region: This is the region where the D-MOSFET transistor begins to show some resistance to the
drain current Id that is beginning to flow from drain to source. This is the only region in the curve where
the response is linear.
Saturation Region: This is the region where the D-MOSFET transistor is fully operation and maximum
current flow, for the voltage VGS. During this region, the D-MOSFET is ON and active.

❖ TRANSCONDUCTANCE CURVE ( TRANSFER CHARACTERISTICS)

Trans-Conductance is graph between VGS and Drain Current (Id) and follows the equation of
Shockley’[Link] relationship between ID and VGS is defined by Shockley’s equation

By Shockley Equation Trans-conductance curve

When VGS = 0

When VGS = Vp

ENHANCEMENT MOSFET (E-MOSFET)

❖ N-CHANNEL E-MOSFET
A slab of P-type material is formed from a silicon base and is referred as the substrate. The Source and
Drain terminals are connected through metallic contacts to n-doped regions and not linked by an n-
channel. The gate is also connected to a metal contact surface but remains insulated from the channel by a
very thin silicon dioxide (SiO2) layer. Silicon is a type of insulator layer referred to as a dielectric. It is the
insulating layer of SiO2 in the MOSFET construction that accounts for the very desirable high input
impedance of the device. So IG (Gate Current) is essentially 0 Amp.

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Basic Construction: Symbol:

Basic Operation:
• If VGS=0 and VDD=+Ve.
In case the channel is absent and drain current is Id =0. Hence E-MOSFET is known as “OFF” MOSFET.

• If VGS =+Ve and VDD=+Ve:

Due to positive potential on the gate will pressure the holes (since like charge repel) in the p-substrate
along the surface of Si02 layer to leave the area and enter deeper regions of the p-substrate. However the
electrons in the p-substrate will be attracted to the positive gate and accumulate in the region near the
surface of the Si02 layer. This accumulate electrons make a channel of n-type.

❖ Threshold Voltage (VT):

The value of VGS that results in the significant increase in drain current (Id) is called the threshold voltage.
Below this voltage i.e. drain current will be zero. After this voltage the current enhance in the channel so
its name is E-MOSFET.
Current relation with voltage VGS (gate to source)
Id=k (VGS – VT)2 in saturation region
If VGS<VT then Id=0
If VGS>VT then Id= k (VGS-VT) 2
Here k is constant depend on dimension of E-MOSFET and materials.
❖ Drain characteristics ( Drain curve)
It is the graph between VDS and Id When VGS is constant. In Ohmic region MOSFET behave as Resistance.

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For values of VGS less than the threshold level, the drain current of an enhancement-type MOSFET is 0
mA. This region is known as Cut-off region.
Cutoff Region: This is the region where the E-MOSFET transistor is OFF, meaning no drain current,
ID flows from drain to source.
Ohmic Region: This is the region where the E-MOSFET transistor begins to show some resistance to the
drain current Id that is beginning to flow from drain to source. This is the only region in the curve where
the response is linear.
Saturation Region: This is the region where the E-MOSFET transistor is fully operation and maximum
current flow, for the voltage VGS. During this region, the E-MOSFET is ON and active.
Trans- conductance curve (Transfer characteristics):
It is the graph between VGS and Id. The relation between VGS and ID calculate as.
Equation Trans- conductance curve

If VGS VTH then ID=0

P-channel Enhancement MOSFET

P-channel E-MOSFET
A slab of n-type material is formed from a silicon base and is referred as the substrate. The Source and
Drain terminals are connected through metallic contacts to p-doped regions and not linked by an n-
channel. The gate is also connected to a metal contact surface but remains insulated from the channel by a
very thin silicon dioxide (SiO2) layer. Silicon is a type of insulator layer referred to as a dielectric. It is the
insulating layer of SiO2 in the MOSFET construction that accounts for the very desirable high input
impedance of the device. So IG (Gate Current) is essentially 0 Amp.

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Basic Construction: Symbol:

Basic Operation:
• If VGS=0 and VDD= -Ve.
In case the channel is absent and drain current is Id =0. Hence E-MOSFET is known as “OFF” MOSFET.

• If VGS = -Ve and VDD= -Ve:

Due to negative potential on the gate will pressure the electrons in the n-substrate along the surface of Sio2
Layer to leave the area and enter deeper regions of the n-substrate and minority charge carriers (holes) are
attracted to the negative gate and accumulate in region near the surface of the SiO 2 layer .This holes make
a channel.

Drain Characteristics:
It is the graph between VDS and Id When VGS is constant. In Ohmic region MOSFET behave as Resistance.
For values of VGS less than the threshold level, the drain current of an enhancement-type MOSFET is 0
mA. This region is known as Cut-off region
Cutoff Region: This is the region where the E-MOSFE Transistors is OFF, meaning no drain current,
ID flows from drain to source.
Ohmic Region: This is the region where the E-MOSFETT transistor begins to show some resistance to
the drain current Id that is beginning to flow from drain to source. This is the only region in the curve
where the response is linear.

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Saturation Region: This is the region where the E-MOSFET transistor is fully operation and maximum
current flow, for the voltage VGS. During this region, the E-MOSFET is ON and active.

Trans- conductance curve (Transfer characteristics):

It is the graph between VGS and Id. The relation between VGS and ID calculate as.
Equation Trans-conductance curve

If VGS VTH then ID=0

❖ DIFFRENCE BETWEEN DEPLETION (D) MOSFET and ENHANCEMENT (E) MOSFET

D-MOSFET E-MOSFET
(1) Construction: (1) Construction:

(2) Channel exists permanently. (2) Channel is physically absent. It is induced after
application of gate voltage above threshold.

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(3)VGS=0 Id=IDSS so, it is known as “ON” (3)VGS VT, Id=0. so, it is known as “OFF”
MOSFET MOSFET

(4) It can be operated in depletion mode as well as (3) It is only operated in enhancement mode.
enhancement mode.
(5)Shockley equation: Equation :

❖ DIFFRENCE BETWEEN JUNCTION FIELD EFFECT TRANSISTOR (JFET) and

MOSFET

JFET MOSFET
(1) Gate is not insulated from channel (sio2 not used) (1) Gate is insulted from channel(si02 used)
(2) Channel exists permanently. (2) Channel is physically absent or present. It is
depend on type of MOSFET
(3) It is only operated in depletion mode (3) It can be operated in depletion mode as well as
enhancement mode.
(4) Input impedance high (>10 M ohm) (4)Input impedance very high (>100 M ohm)

(5)Symbol: N- channel P-channel (5)Depletion Enhancement

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NUMERICAL ON BJT PARAMETERS

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