Design of Analog Integrated Circuits

Chapter 12: Oscillators

Textbook Chapter 15
15.1 General Considerations
15.2 Ring Oscillators
15.3 LC Oscillators
15.4 Voltage-Controlled Oscillators
15.5 Mathematical Model of VCOs

1
 Oscillatory Feedback System

• Consider an unity-gain negative feedback circuit:

Vout H ( s)
( s) 
Vin 1  H ( s)

• Recall: Negative feedback systems may oscillate.

• If for s = jω0, H(jω0) = -1  closed-loop gain -> ∞ at ω0
 its own noise components amplified at ω0 indefinitely.

2
 Barkhausen Criteria

• A negative-feedback circuit may oscillate at ω0 if it

satisfies:
| H ( jo ) | 1
H ( jo )  180 o

• “Barkhausen criteria.” (necessary but not sufficient.)

• The gain cross-over frequency is less than phase cross-
over frequency then the system is stable.
• To tolerate PVT variations, loop gain typically chosen to
be at least 2 or 3 times the required value.

3
 2nd Barkhausen Criterion

• Equivalent in terms of the second Barkhausen criterion:

• (a): Frequency-dependent phase shift = 180° (arrow),

dc phase shift = 180° .
• (b): Total phase shift at ω0 = 360° .
• (c): No phase shift at ω0 is provided.

4
 Example 15.1
Explain why a single common-source stage does not oscillate if it
is placed in a unity-gain loop?

•Open-loop circuit of a single CS

stage contains only one pole.
•Maximum frequency-dependent
phase shift = 90° (at a frequency of
infinity).
•DC phase shift = 180° .
•Maximum total phase shift = 270°
( <360° ).
 Fail to sustain oscillation growth.

5
 Two-Pole Feedback System

• Two significant poles appear in the signal path 

frequency-dependent phase shift can approach 180° .
• Positive feedback (not negative feedback) occurs at
zero frequency, simply “latches up” rather than
oscillates.

6
 Additional Signal Inversion

• This provides negative feedback near zero frequency &

eliminates “latch-up”.
• Two poles: One at E and another at F.
• Does this circuit oscillate?

7
Two-Pole System: Loop Gain Characteristics

• Frequency-dependent phase shift reaches 180° but at ω

= infinity.
• Loop gain vanishes at very high frequencies  does not
satisfy both Barkhausen criteria at the same frequency.
• It fails to oscillate!
8
 Three-Stage Ring Oscillator

• If three stages are identical, total phase shift around the

loop (ϕ) = -135° at ω = ωp,E(= ωp,F = ωp,G) and -270° at ω = ∞.
• ϕ = 180° at ω < ∞, where the loop gain can be still ≥ 1.

9
 Minimum Voltage Gain Per Stage
• For the three-stage ring oscillator, denote the transfer
function of each stage by –A0/(1+s/ω0) and the loop gain is:
 Ao3
H ( s) 
s
(1  )3
o
• The circuit oscillates if each stage contributes 60° :
OSC
tan 1 ( )  60o  OSC  3o
o

• Minimum voltage gain per stage (A0) is such that the

magnitude of the loop gain at ωOSC is unity:
Ao3
3
 1  Ao  2
 OSC 2 
 1 ( ) 
 o 
10
 Waveforms of Three-Stage Ring Oscillator

• Each stage contributes a frequency-dependent shift of 60°

and a dc signal inversion.
• Thus the waveform at each node is 240° (or 120° ) out of
phase with respect to its neighboring nodes.
• What is the oscillation frequency if Ao>2?

11
 Linear Model of Three-Stage Oscillator

• The closed-loop transfer function is:

Vout H ( s)  Ao3
( s)  and H ( s ) 
Vin 1  H ( s) (1  )
s 3
o
•  3 Poles:
Ao (1  j 3)
s1  ( Ao  1)o , s2,3  [  1]o
2

Express the output waveform as: (neglect effect of s1.)

Ao  2 A 3
Vout (t )  a exp( ot ) cos( o ot )
2 2
12
Ring Oscillator Using CMOS Invertors (I)

• The circuit is released with an

initial voltage at each node =
Vtrip.
• Noise components disturb each
node voltage, yielding a
growing waveform.
• The signal eventually exhibits
rail-to-rail swings.

13
 Ring Oscillator Using CMOS Invertors (II)

• Begin with VX = VDD  VY = 0, VZ = VDD.

• VX begins to fall to zero when the circuit is released
 forces VY to rise to VDD after one TD, and VZ to fall to zero
after another TD.
• Oscillate with a delay of TD between consecutive node
voltages  period = 6TD.

14
 Large/Small-signal Oscillation Frequency

• Consider a three-stage ring oscillator

• Large-signal oscillation frequency is 1/(6TD)
• Small-signal oscillation frequency is Ao 3o / 2
• Are they equal?

• The oscillator starts to oscillate when its amplitude is

small. The initial oscillation frequency is
Ao 3o / 2

• When the amplitude grows high, the oscillator enters into

the nonlinear behavior. The final oscillation frequency will
be 1/(6TD) which is a lower value.

15
 Ring Oscillators: More Than Three Stages

• Total number of inversions in the loop must be odd to prevent

“latch-up”.
• (a): a ring incorporates five inverters  frequency = 1/(10TD).
• (b): The differential implementation can utilize an even number
of stages by configuring one stage such that it does not invert.
• Minimum voltage gain of 4-stage ring osc: Ao= 2
16
 Differential Stage Using PMOS Loads

• (a): A PMOS transistor operating in the deep triode region

can serve as the load.
• (b): Diode-connected load, at the cost of one threshold
voltage in the headroom.
• (c): NMOS source followers are inserted. The time constant
is smaller than that of a diode-connected transistor.
17
 LC Tank

• (a): L1 in parallel with C1, resonates at res  1 / L1C1

• (b): Series resistance of the metal wire is included in the
inductor.
•Define Q of the inductor as L1ω/RS.

18
Conversion of Series to Parallel Combination

• For a narrow frequency range,

two impedances to be
equivalent:
RS2 LP L1 2
LP  L1 (1  2 2 ) and RP 
L1 RS

L1
Q 3 for monolithic inductors
RS
LP  L1 and RP  Q 2 RS
C1  CP

19
 Two Tuned Stage in Feedback Loop

• This configuration does not latch up because its low-

frequency gain is very small.
• At resonance, total phase shift around the loop is zero.
• If gm1RPgm2RP ≥ 1, then the loop oscillates.

res  1 / LPCtot
20
Tuned Stage with Feedback

• Can we realize a single-stage

LC oscillator?
• Apply an input current as in (b).
• M1 and C2 directly conduct the
input current to the tank.

• Obtain the closed-loop gain as:

Vout 1
 sLP || || RP
I in sCP
• Since the closed-loop gain
cannot be equal to infinity at
any frequency, the circuit fails
to oscillate.

21
 Colpitts Oscillator (I)

• Add C1 to node X and remove CP as shown in (a).

• The transfer function of Fig. (b) is
Vout RP LP s( g m  sC2 )

I in RPC1C2 LP s 3   C1  C2  LP s 2  [ g m LP  RP  C1  C2 ]s  g m RP

• With typical values, gmLP << RP(C1 + C2), we obtain:

1 C C
R2  and g m RP  1 (1  2 ) 2
CC C2 C1
LP 1 2
C1  C2 22
 Colpitts Oscillator (II)
• gmRP is the voltage gain from the source of M1 to the output.
C1/C2 for minimum required gain occurs for C1/C2 = 1, requiring
g m RP  4

• If the capacitance that appears in parallel with the inductor, CP,

is included in the equivalent circuit, ωR2 is modified as:
1
R2  and g m RP  4
C1C2
LP (CP  )
C1  C2
 CP is simply included in parallel with the series combination of
C1 and C2.

23
 One-Port Oscillator

• (a): A simple tank that is stimulated by a current impulse.

• (b): RP||(-RP) = ∞  the tank oscillates indefinitely.

• (c): is called a one-port oscillator.

24
Negative Resistance

• (a): The feedback by a common-

gate stage and add Ib to provide
the bias current of M2.
• (b): If gm1 = gm2 = gm,

V X 2
=
I X gm

25
 Negative-Gm Oscillator

RP >= -2/gm RP >= -1/gm

• It is necessary that RP ≥
1/gm.
• Also called a “negative-Gm
oscillator”.

26
 Another Way to Create Negative R (I)

• (a) Creating negative resistance, VX = g m 2  1  1

I X C1C2 s sC1 sC2

• (b) Small-signal equivalent circuit

• (c): If an inductor is placed between the gate and drain of
M1, the circuit may oscillate.

27
 Another Way to Create Negative R (II)

• Three oscillator topologies derived from pervious circuit (c)

• (a): Based on a source follower.

• (b): Colpitts oscillator.

28
Voltage-Controlled Oscillator: Definition

• Ideal voltage-controlled
oscillator (VCO): Output
frequency is a linear function
of its control voltage:

• ω0: Intercept corresponding to

Vcont = 0.
• KVCO: “Gain” or “sensitivity” of
the circuit.
• ω2 – ω1: “Tuning range”.

29
 Parameters of VCO (I)
Center Frequency:
• determined by the environment in which the VCO is used.
• can achieve as high as hundreds of gigahertz.
Tuning Range:
•The required tuning range is dictated by:
- (1) variation of the VCO center frequency with process and
temperature.
- (2) frequency range necessary for the application.
•Noise in the output frequency is proportional to KVCO because
ωout = ω0 + KVCOVcont.
•To minimize the effect of noise in Vcont  VCO gain must be
minimized, which conflicts with the required tuning range.
•If allowable range of Vcont: From V1 to V2, tuning range must
span at least ω1 to ω2 

30
 Parameters of VCO (II)

Tuning Linearity:
• Tuning characteristics of VCOs exhibit nonlinearity,
i.e., their gain, KVCO, is not constant.
• Actual oscillator characteristics typically exhibit a
high gain region in the middle of the range and a low
gain at the two extremes.
• As shown on the right, compared to a
linear characteristics (gray line), the
actual behavior displays a maximum
gain greater than that predicted by

31
 Parameters of VCO (III)
Output Amplitude:
• Desirable to achieve a large output oscillation amplitude 
Waveform less sensitive to noise.
• Trades with power dissipation, supply voltage, and tuning
range.
Power Dissipation:
•Oscillators suffer from trade-offs between speed, power
dissipation, and noise.
Supply and Common-Mode Rejection:
• Oscillators are quite sensitive to noise, especially when
realized in single-ended form.
Output Signal Purity:
• Even with a constant Vcont, the output waveform of a VCO is
not perfectly periodic.
32
 Differential Pair with Variable Output TC

• How to tune the

oscillation frequency?

• M3 and M4 operate in the triode region, each acting as a

variable resistor controlled by Vcont.
• If M3 and M4 remain in the deep triode region:


• Delay of the circuit is roughly proportional to τ1, yielding:

• Disadvantage : Output swing varies across tuning range

33
 Replica Circuit for Stages of Ring Oscillator

• (a): M5 operates in the deep triode. If the loop gain is sufficiently

large, the differential input voltage of A1 must be small  VP ≈
VREF and |VDS5| ≈ VDD – VREF.
• I1 decreases  A1 rises the gate voltage of M5 such that Ron5I1 ≈
VDD – VREF.
• (b): If M3 and M4 are identical to M5 and ISS to I1  VX and VY vary
from VDD to VREF.
• If process and temperature variations, A1 forcing Vp and VX=VY =
VREF. 34
 Example 15.11
How does the oscillation frequency depend on ISS for a VCO
incorporating the stage of previous topology (b).

Solution
•Ron3,4ISS ≈ VDD – VREF, we
have Ron3,4 ≈ (VDD – VREF)/ISS
and hence:

•Thus, the characteristic is

relatively linear.

35
 Differential Stage with Variable -R Load

• (a): As I1 increases,
- the small-signal differential resistance -2/gm3,4 becomes
less negative. Assume R1=R2= RP
- from the half circuit (b), equivalent resistance RP||(-1/gm3,4)
= RP/(1 – gm3,4RP) increases  lower the frequency of
oscillation.
• In (a), as I1 varies, so do the currents steered by M3 and M4 to
R1 and R2  the output voltage swing is not constant across
the tuning range.
36
 Differential Pair to Steer Current

• The below circuit is to employ a differential pair M5-M6 to steer

IT to M1-M2 or M3-M4, so ISS + I1 = IT.
• IT must flow through R1 and R2. If M1-M4 experience complete
switching in each cycle of oscillation  IT is steered to R1 in
half a period and to R2 in the other half, giving a differential
swing of 2RPIT. Assume R1=R2= RP

• Vcont1 and Vcont2 are differential control

lines if they vary by equal and opposite
amounts  higher noise immunity.
• To avoid M1 and M2 to have no tail
current ISS  a small constant current
source IH is added.
• Headroom will be an issue.

37
 Example 15.12
Calculate the minimum value of IH in previous circuit to
guarantee a low-frequency gain of 2 when all of IT is steered to
the cross-coupled pair.
Solution
•The small-signal voltage gain of the
circuit = gm1,2RP/(1 – gm3,4RP).
•Assuming square-law devices, we have

That is,

38
 Current Folding

• (a): I1 + I2 = ISS, Iout1 = KI1, Iout2 = KI2  Iout1 + Iout2 = KISS.

• (a) has a behavior similar to that of a differential pair.
• (b): Application of current folding to current steering. The
circuit operates from a low supply voltage.
• However in (b), the devices in the control path contribute
substantial noise  modulate the oscillation frequency.

39
 Interpolating Delay Stage (I)

• How to have a wide

tuning range?

• (a): at one extreme of Vcont, only the fast path is on and the
slow path is disabled, yielding the maximum oscillation
frequency shown in (b).
• At the other extreme in (a), only the slow path is on and the
fast path is off, providing the minimum oscillation frequency
as shown in (c).
• If Vcont lies between the 2 extremes, each path is partially on
and total delay = weighted sum of their delays.
40
Interpolating Delay Stage (II)

• (a): Simply shorting the outputs of two

differential pairs performs the current
addition.
• The overall interpolating stage therefore
assumes the configuration (b).
• (b): Gain of each stage varied by the tail
current to achieve interpolation.
• But it is desirable to maintain constant
voltage swings.
• The gain of the differential pair M5-M6
need not be varied because even if only
the gain of M3-M4 drops to zero, the slow
path is fully disabled.

41
Interpolating Delay Stage with I Steering

• The circuit employs the

differential pair M7-M8 to steer
ISS between M1-M2 and M3-M4.
• If Vcont is very negative  M8
off and only the fast path
amplifies the input.
• If Vcont is very positive  M7 off
and only the slow path is
enabled.
• Since the slow path employs
more stage than the fast path,
the VCO achieves a tuning
range of roughly two to one.

42
Wide-Range Tuning

• In applications where the frequency

must be varied by orders of
magnitude, the topology (left) can
be used.
• Driven by the input, the additional
PMOS transistors M5 and M6 pull
each output node to VDD.
• These create a relatively constant
output swing even with large
variations in ISS.
• The oscillation frequency of a ring
incorporating this stage can be
varied by more than four orders of
magnitude with less than a twofold
variation in the amplitude.

43
 Varactor
• Difficult to vary the value of monolithic inductors, so we
simply change the tank capacitance to tune the oscillator.
• A reversed-biased pn junction can serve as a voltage-
dependent capacitor, called a “varactor”:

- C0: Zero-bias value.

- VR: Reverse-bias voltage.
- ϕB: Built-in potential of the junction.
- m: Typically between 0.3 and 0.4.
• Important drawback of LC oscillators: At low supply
voltages VR has a very limited range  a small range for Cvar
and hence for fosc.

44
 Example 15.14
Suppose in the equation of Cvar, ϕB = 0.7 V, m = 0.35, VR can
vary from zero to 2 V. How much tuning range can be achieved?

Solution
•For VR = 0, Cj = C0 and .
•For VR = 2 V, Cj ≈ 0.62C0 and

.
•Thus, the tuning range is approximately equal to 27%.

45
 LC Oscillator Using Varactor Diodes

• To avoid forward-biasing D1 and D2 significantly, Vcont must

not exceed VX or VY by more than a few hundred mV.
• If the peak amplitude at each node = A, then 0 < Vcont < VDD –
A + 300 mV.
• The circuit suffers from a trade-off between output swing and
tuning range.
• The capacitance of D1 and D2 varies with time due to typically
large swings at X and Y.
• “Average” value of the capacitance is still a function of Vcont.
46
 Diodes Realized in CMOS Technology

• 2 types of pn junctions: (a) the anode is inevitably grounded, (b)

both terminals are floating.
• First drawback of (b): n-well material has a high resistivity 
create a resistance in series with the reverse-biased diode,
lower Q factor of the capacitance.
• Another drawback of (b): n-well displays substantial
capacitance to the substrate, Cn (right)  contribute a constant
capacitance to the tank, limit the tuning range.
47
 Reduction of Series Resistance

• (a): p+ region surrounded by an n+ ring  the displacement

current flowing through the junction capacitance see a low
resistance in all four directions.
• Many of these units of (a) can be placed in parallel, as in (b).
• N-well induces a large capacitance to the substrate.

48
 Tuning in LC Oscillators

• Examine unwanted capacitances in the LC circuit. We identify

three such capacitances:
- capacitance between n-well and
substrate associated with D1 & D2;
- 2CGD, and CDB;
- parasitic capacitance of the inductor itself.

• Monolithic inductors typically implemented as metal spiral

structure - relatively large dimensions
(S ≈ 100-200 μm).

49
Use of PMOS to Eliminate n-well Capacitance

• Desirable to connect the anode

of the diodes to X & Y 
eliminate the parasitic n-well
capacitances from the tank.
• Here, the cross-coupled pair
incorporates PMOS devices,
providing swings around the
ground potential.
• Use of PMOS devices also
leads to less flicker noise
appearing around the
oscillation frequency.

50
 MOS Varactor

• (a): Recall CGS of MOSFETs varies with VGS.

• (b): An NMOS transistor can be placed inside an n-well, forming
an “accumulation-mode” varactor.
• (c) shows how the capacitance of structure (b) varies
monotonically with VGS.

51
 Phase for Signal

• Consider V0(t) = Vmsinω0t, and the phase varies linearly with time
at a slope of ω0 (left).
• Every time ω0t crosses an integer multiple of π, V0(t) crosses 0.
• Now consider V1(t) = Vmsin[ϕ1(t)] and V2(t) = Vmsin[ϕ2(t)], where
ϕ1(t) = ω1t, ϕ2(t) = ω2t, and ω1 < ω2 (right).
• ϕ2(t) crosses integer multiples of π faster than ϕ1(t) does,
yielding faster variations in V2(t) V2(t) accumulates phase faster.
• The frequency can be defined as

52
 Example 15.15
(a) shows the phase of a sinusoidal waveform with constant
amplitude as a function of time. Plot the waveform.

Solution
•Taking the time derivative of ϕ(t), we
obtain (b).
•The frequency periodically toggles
between ω1 and ω2, yielding the
waveform in (c).
•If the frequency of a waveform is
known as a function of time, the
phase can be computed as

• For a VCO, ωout = ω0 + KVCOVcont, we have:

53
 Example 15.17
A VCO senses a small sinusoidal control voltage Vcont =
Vmcosωmt. Determine the output waveform and its spectrum.

• The output is expressed as

• If Vm is small enough that KVCOVm/ωm << 1rad, then

• The output consists of three sinusoids having frequencies of ω0, ω0 –

ωm and ω0 + ωm. The spectrum is:

54
 Expression of Phase

• Explain why this is incorrect: The output frequency of a VCO is

ω0 + KVCOVcont, then the output waveform can be written as
Vmcos[(ω0 + KVCOVcont)t].
• Compute the frequency as derivative of the phase:

• The first term in the above expression vanishes only if dVcont/dt =

0.
 In general case, the phase cannot be written as product of time
& frequency.

55
 Output Harmonics

• In practice, output of the VCO may contain significant

harmonics, even approaching a rectangular waveform.
• We expect Vout(t) expressed as a Fourier series:

• If Vcont varies by ΔV  frequency of the first harmonic

varies by KVCOΔV, frequency of the second harmonic by
2KVCOΔV, etc.

• Often limit calculations to the 1st harmonic.

56