Microprogrammed Control
When the control signals are generated by
hardware using conventional logic design
techniques, the control unit is said to be
hardwired.
Example CPUs with hardwired logic control are:
Intel 8085, Motorola 6802, Zilog 80 and any RISC
(Reduced Instruction Set Computer) CPUs.
Microprogramming is a second alternative for
designing the control unit of a digital computer
For example, CPUs with micro programmed
control unit are
Intel 8080, Motorola 68000, and any CISC
(Complex Instruction Set Computer) CPUs.
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Microprogrammed Control
The control function that specifies a
micro operation is a binary variable
When it is in one binary state, the
corresponding micro operation is
executed
The control unit initiates a series of
sequential steps of micro-operations
The control variables at any given time
can be represented by a string of 1’s and
0’s called a control word.
A control unit whose binary control
variables are stored in memory is called
a micro programmed control unit.
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Microprogrammed Control
Each word in control memory contains
within it a microinstruction.
The microinstruction specifies one or
more micro operations for the system
A sequence of microinstructions
constitutes a microprogram.
The use of a microprogram involves
placing all control variables in words of
ROM for use by the control unit through
successive read operations.
A memory that is part of a control unit is
referred to as a control memory.
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Microprogrammed Control
The micro program consists of
microinstructions that specify various
internal control signals for execution of
register micro operations
These microinstructions generate the
micro operations
- to fetch the instruction from main
memory;
- to compute the effective address,
- to execute the operation specified by the
instruction, and
- to return the control to the fetch phase
in order to repeat the cycle for the next
instruction.
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Microprogrammed Control
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Microprogrammed Control
Control Memory Address Register
The control memory address
register specifies the address of the
microinstruction, and the control
data register holds the
microinstruction read from memory.
Once the micro operations are
executed, the control must
determine the next address.
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Microprogrammed Control
Micro program Sequencer
While the micro operations are being
executed, the next address is computed
in the next address generator circuit and
then transferred to the control address
register to read the next microinstruction.
The next address generator is sometimes
called a micro program sequencer, as it
determines the address sequence that is
read from control memory.
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Microprogrammed Control
Micro program Sequencer
Typical functions of a micro program
sequencer are
- incrementing the control address
register by one,
- loading into the control address
register an address from control
memory,
- transferring an external address,
or
- loading an initial address to start
the control operations 8
Microprogrammed Control
Control Data Register
The control data register holds the
present microinstruction while the next
address is computed and read from
memory
The data register is sometimes called a
pipeline register.
It allows the execution of the
microoperations specified by the control
word simultaneously with the generation
of the next microinstruction.
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Microprogrammed Control
Address Sequencing
An initial address is loaded into the control address register
when power is turned on in the computer
This address is usually the address of the first microinstruction
that activates the instruction fetch routine
At the end of the fetch routine, the instruction is in the
instruction register of the processor
The control memory next must go through the routine that
determines the effective address of the operand.
When the effective address computation routine is completed,
the address of the operand is available in the memory address
register
The next step is to generate the micro operations that execute
the instruction fetched from memory
Each instruction has its own micro program routine stored in a
given location of control memory.
The transformation from the instruction code bits to an address
in control memory where the routine is located is referred to as a
mapping process.
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Microprogrammed Control
Address Sequencing
The address sequencing capabilities
required in a control memory are :
1. Incrementing the control address register
2. Unconditional branch or conditional
branch, depending on the status bit
conditions
3. A mapping process from the bits of the
instruction to an address for control
memory
4. A facility for subroutine call and
return
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Microprogrammed Control
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Microprogrammed Control
There are four different paths from which the
control address register (CAR) receives the
address
1. The incrementer increments the contents of the
control address register by one, to select the next
microinstruction in sequence.
2. Branching is achieved by specifying the branch
address in one of the fields of the microinstruction
3. Conditional branching is obtained by using part of
the microinstruction to select a specific status bit in
order to determine its condition
4. An external address is transferred into control
memory via a mapping logic circuit
- The return address for a subroutine is stored in a
special register whose value is then used when the
micro program wishes to return from the subroutine.
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Microprogrammed Control
Mapping of Instruction
Example :
Consider a computer with a simple instruction
format that has an operation code of four bits
Assume that the control memory has 128
words, requiring an address of seven bits
For each operation code, there exists a micro
program routine in control memory that
executes the instruction
A simple mapping process converts the 4-bit
operation code to a 7-bit address for control
memory by placing a 0 in the most significant bit
of the address, transferring the four operation
code bits and clearing the two significant bits of
the control address register
This provides for each computer instruction a
micro program routine with a capacity of four
microinstructions.
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Microprogrammed Control
Mapping of Instruction - Example
0011100
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Microprogrammed Control
Microprogram Example
Consider a simple computer with the following :
Processor unit has four registers :
- Program Counter PC
- Address Register AR
- Data Register DR
- Accumulator register AC
The control unit has two registers :
- Control Address Register CAR
- Subroutine Register SBR
Main Memory Capacity is 2048x16, i.e., 2048
words
Control memory Capacity is 128 x 20, i.e., 128
microinstructions each of size 20 bits
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Microprogrammed Control
Microprogram Example
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Microprogrammed Control
Instruction format
consists of three fields :
- a 1-bit field I for indirect addressing
- a 4-bit operation code field
- a 11-bit address field
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Microprogrammed Control
Instruction format
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Microprogrammed Control
Microinstruction Format
The 20 bits of the microinstructions are
divided into four functional parts :
- The three fields F1, F2 and F3 specify
micro operations for the computer
- The CD field selects status bit
conditions
- The BR field specifies the type of
branch to be used
- The AD field contains a branch
address
- The address field is 7 bits wide and
the control memory has 128 words
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Microprogrammed Control
Microinstruction Format
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Microprogrammed Control
Microoperation Fields
The micro operations are subdivided
into three fields of three bits each.
The three bits in each field are encoded
to specify seven distinct micro
operations giving a total of 21 micro
operations
No more than three micro operations
can be chosen for a microinstruction,
one from each field
If fewer than three micro operations are
used, one or more of the fields will use
the binary code 000 for no operation
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Microprogrammed Control
Microinstruction Format
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Microprogrammed Control
Microoperation Fields
For example :
– A microinstruction can specify two
simultaneous micro operations from F2
and F3 and none from F1.
– DR M[AR] with F2=100
– and PC PC + 1 with F3 = 101
– The nine bits of the micro operation
fields will then be 000 100 101
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Microprogrammed Control
Symbolic Microinstructions
– Symbols are used to specify
microinstructions
– A symbolic micro program can be
translated into its binary equivalent by
means of an assembler
– Each line of the assembly language
micro program defines a symbolic
microinstruction
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Microprogrammed Control
Symbolic Microinstructions
Each symbolic microinstruction is divided
into five fields :
– Label, micro operations, CD, BR and AD.
1. The label field may be empty or it may
specify a symbolic address. A label is
terminated with a colon (: )
2. The micro operations field contain one , two
or three symbols separated by commas. The
NOP symbol is used when the
microinstruction has no micro operations.
This will be translated by the assembler to 9
zeroes
3. The CD field has one of the letters U, I, S
or Z
4. The BR field contains one of the four
symbols JMP, CALL, RET, MAP
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Microprogrammed Control
Symbolic Microinstructions
5. The AD field specifies a value for the
address field of the microinstruction in
one of three possible ways:
- with a symbolic address which must
also appear as a label
- with the symbol NEXT to designate
the next address in sequence
- when the BR field contains a RET or
MAP symbol, the AD field is left empty
and is converted to seven zeros by the
assembler
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Microprogrammed Control
Symbolic Microinstructions
– The pseudo instruction ORG to define
the origin or the first address of a micro
program routine
– Example :
The symbol ORG 64 informs the
assembler to place the next
microinstruction in control memory at
decimal address 64
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Microprogrammed Control
Fetch Routine
– A convenient starting location in control
memory for the fetch routine is address 64.
– The microinstructions needed for the fetch
routine are :
AR PC
DR M[AR], PC PC + 1
AR DR (0-10),
CAR(2-5) DR(11-14), CAR
(0,1,6) 0
– Control is transferred to one of 16 routines by
mapping the operation code part of the
instruction from DR into CAR
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Microprogrammed Control
Fetch Routine
– The fetch needs three microinstructions
which are placed in control memory at
addresses 64, 65 and 66.
– The symbolic micro program for the
fetch routine can be written as follows :
ORG 64
FETCH: PCTAR U JMP NEXT
READ, INCPC U JMP NEXT
DRTAR U MAP
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Microprogrammed Control
The translation of the symbolic micro program
to binary produces the following binary program
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Microprogrammed Control
Symbolic Micro program
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Microprogrammed Control
Binary Micro program for Control memory
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Microprogrammed Control
Decoding of Microoperation Fields
AND
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Microprogrammed Control
Micro-program Sequencer for a Control Memory
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Microprogrammed Control
Input Logic Truth Table for Microprogram Sequencer
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