1/0 Programming

student workbook
introduction to
the pdp11

digital equipment corporation • maynard. massachusetts

 1st Printing, March 1974
2nd Printing (Rev), November 1974
3rd Printing (Rev), April 1977

Copyright © 1974, 1977 by Digital Equipment Corporation

The reproduction of this workbook, in part or

whole, is strictly prohibited. For copy information
contact the Educational Services Department,
Digi tal Equipment Corporation, Maynard,
Massachusetts 01 754.

Printed in U.S.A.
. - - - - - - - - - - - - - - course m a p - - - - - - - - - - - -.. . . .

PDP-"
FAMILY

MEMORY
AND

PRIORITY
CONTROL

UNIBUS
CONCEPTS

NOTE
SYSTEM A study unit should not
be started until all of the
units with arrows pointing
into it have been completed.

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 READ LEARNING
OBJECTIVES
(page 1)

NOW RUN FILM

CARTRIDGES A & B
Heres how
REVIEW MATERIAL
you're to U5~
(pages 3-9) thi5 worKbool\.
AND COMPLETE
EXERCISES (Pages 15-39)

NOW RUN FILM

CARTRIDGES C & D

REVIEW MATERIAL
(pages 10-14)

TAKE TEST &

CHECK RESULTS
(pages 41-46)

YES PLEASE REVIEW THE

MATERIAL YOU'RE
HAVING DIFFICULTY WITH.
(ADDITIONAL RESOURCES ARE
LISTED ON PAGE 2.)

GOOD WORK!
NOW GO ON TO THE
NEXT STUDY UNIT. read on •
~ ______--______~~~~____--_w ------------------------~--~
~-----------------------objectives----------------------~

After completing this study unit you should be able to ....

* Analyze and write small I/O programs that are used by the CPU to communicate with
peripheral devices.

* Explain how the device interface registers are used to transfer data and control information
between the CPU and a peripheral.

* Describe the typical bit assignments of a Control and Status register.

* Describe the advantages of the two I/O programming methods - programmed data transfers
and program interrupts - and give examples of each.

* Explain how program subroutines and interrupt service routines are used in I/O
programming.

* Explain the basic purpose of program loaders.

* Explain the functioning of the individual instructions that make up the Bootstrap Loader
program.

* Describe how the Bootstrap Loader is used to bring the Absolute Loader program into
memory and how the Absolute Loader, in tum, is used to enter other paper tape programs.

* Explain why the Bootstrap Loader and Absolute Loader programs share several memory
locations and show how they interact when they are executed.

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._._--------- add itiona I resou r c e s - - - - - - - - -.....

• PDP-ll/04/05/10/35/40/45 Review Chapter 5, Paragraphs 5.1-5.3, Programming

Processor Handbook Techniques.

• PDP-II Peripherals Read Chapter 2, Programming.

Handbook

• PDP-II Paper Tape Read Chapter 6. (Paragraph 6.1 describes the Bootstrap
Software Programming Loader; Paragraph 6.2 describes the Absolute Loader.)
Handbook

'-------------------------------------2------------------------------------,
~----------review material----------...........

The following material is covered in this study unit:

Topic Key Points Visual Ref

interface * Peripherals consist of the peripheral device and 7-8

an interface unit which connects the peripheral
to the Unibus.

The interface performs four primary functions:

• Recognize device address

• Interrupt processor operations

• Control and monitor peripheral operation

• Buffer data

data buffer * Holds data sent to or from the peripheral. Used 10-14
register (DBR) in most peripheral interfaces, it is usually an
8-bit byte buffer or a 16-bit word buffer.

• The DBR provides serial to parallel data

conversion to the Unibus and parallel to serial
data conversion to devices such as the
Teletype.@

• The DBR compensates for slow operating

devices that otherwise would tie up the
Unibus for long periods.

control and *A 16-bit register that performs command and 15-17

status register monitoring functions. Included in all interfaces.
(CSR) A DATO or DATOB is used to load the CSR
with control information. A DATI. is used to
read or monitor the peripheral status
information contained in the CSR.

® Teletype is a registered trademark of Teletype Corporation.

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Topic Key Points Visual Ref

CSR bit * CSR is byte addressable. Typical bit assignments 18-24

assignmen ts are:

Bit 0 - Start or enable

Bits 1-3 - Device functions

Bits 4-5 - 18-bit extended address

Bit 6 - Interrupt enable

Bit 7 - Done or ready

Bits 8-10 - Unit selection

Bit 11 - Device busy

Bits 12-15 - Errors

types of * There are three types of CSR bits 22-26

CSR bits
• Read only - such as bit 11, Device Busy

• Write only - such as bit 0, Start or Enable

• Read or write - such as bit 6, Interrupt

Enable

I t is not possible to read from write-only bits or

write to read-only bits.

A load commarid such as a MOVB instruction is

used to set bits in a CSR. A MOV instruction
can be used to read the CSR status.

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 review material-----------,
Topic Key Pain ts Visual Ref I
CSR-DBR, * The CSR and DBR function together. 27-32
integrated Example: read data -
operation
• Set CSR control bits (start and interrupt
enable) which start read operation

• Data sent from device to DBR; done bit is set

• Interface sends interrupt to the CPU when all

the data is assembled in the DBR

• Start interrupt service routine

• Read data from DBR to Unibus

special * Some (DMA) devices also have other registers: 36

purpose
registers • Word count register

• Memory address register

• Data address register

• Maintenance mode register

addressing * Each peripheral register is assigned a discrete 3S-45

peripheral address which is located in the top 4K of
registers possible addresses. The CPU makes no
distinction between memory addresses and
peripheral addresses.

• 16-bit addresses containing l's in bits 13,14

and 15 are converted to IS-bit addresses; i.e.
address bits 13-17 are all ones.

• Address bits 3-12 specify the peripheral

device. Bits 1 and 2 identify the particular
CSR or DBR within the interface. Bit 0
specifies the type of operation, word or byte.

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Topic Key Points Visual Ref

teletype * Contains two separate units:A reader/keyboard 46-55

and a printer/punch. Each unit has a CSR and a
DBR .

• Reader/keyboard DBR is used during DATI

operations to hold read data destined for the
Unibus. Printer/punch DBR is used to store
data sent to the Teletype during DATO and
DATOB operations .

• Reader/keyboard CSR is called the keyboard

status register or TKS. Printer/punch CSR is
called the punch status register or TPS. The
TKS uses 4 bits: Reader enable, interrupt
enable, done, and busy. The TPS uses 3 bits:
maintenance, interrupt enable, and ready.

ASCII data * Data is coded on Teletype tape in ASCII format. 49

Data is transmitted and received by Teletype in
Teletype code. Teletype code is translated to
ASCII code by subtracting 200 8 .

instruction set * The PDP-I I has one instruction set. These 58-63
instructions can be used in I/O programming.
Examples:
INCB@#177560
(Set reader enable bit)

MOVB#101, TKS
(Set reader enable and
interrupt enable bits)

MOYB@#177562,R3
(Move data in reader
DBR to GPR 3)

TSTB@#177564
(Test state of ready bit
in punch status register.
Used with a branch instruction)
MOY#340,@#PS
(set processor priority
level to 7; PS=177776)
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~---------- review material-----------i

Topic Key Points Visual Ref

programmed * Program remains in a loop (CPU waits) until 66-79

data transfer peripheral is ready to send or receive data. The
program loop compensates for the relatively
slow speed of the peripheral.

• In a DATO or DATOB operation the data is

transferred from a memory location to the
TPB. The program loops until the TPB is
ready to accept the data .

• In a DATI operation the data is transferred

from the TKB to a memory location. The
program loops until the data is completely
assembled in the TKB.

data echoing * Allows keyboard entries to be printed. 80-86

Information from the reader keyboard unit of
the Teletype is transferred to the printer/punch
unit by way of the CPU.

* Example of keyboard echo routine.

-.:;'(""IUII. 111.T(""I 'rVC!
.L.A..-.L.L'.J. .L.1'1v ~~""...., ; start reader .
LOOP1: TSTB TKS ; wait for
BPL LOOPI ; reader done.
LOOP2: TSTB TPS ; wait for
BPLLOOP2 ; punch ready.
MOVB TKB, TPB ; move byte from
; reader to punch.

program * Better use is made of processor time using 88-93

interrupts program interrupts in place of the program loop 99-105
method.

• Once the peripheral is started, the main

program is re-entered and other operations
can be performed. Then, when the data is
ready to be sent or received, an interrupt is
issued by the interface. The main program is
stopped and an interrupt service routine is
executed which transfers the data. Finally the
main program is again re-entered and its
execution is continued.

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Topic Key Points Visual Ref

interrupt * The issuance of an interrupt involves an orderly 95-97

sequence progression of events. It begins when the
peripheral is ready to send or receive data:

• Peripheral interface sends Bus Request (BR).

• Processor responds with Bus Grant (BG).

• Peripheral interface asserts SACK and clears

Bus Request (RR).

• SACK causes processor to clear BG.

• Peripheral interface asserts BBSY as soon as

BBSY and SSYN are clear on the Unibus.

• Peripheral interface raises INTR and the

vector address on the Unibus data lines.
SACK is cleared.

• Processor responds to the vector address with

SSYN.

• SSYN clears the INTR, vector address and

BBSY sent from the peripheral interface.

• Processor now asserts BBSY and becomes bus

master in order to service the interrupt.

interrupt * The piogrammei is responsible for several 106-124

programming program components:
considera tions
• Instruction to set up stack pointer. Usually at
beginning of main program.

• Instructions to load new PC and PSW into

interrupt vector locations.

• Instructions to set certain bits in peripheral

CSR (device enable, interrupt enable, etc.).

• Interrupt service routine which concludes

with an RTI or RTT instruction.

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-------------review material------------

Topic Key Points Visual Ref

interrupt * The typical I/O program sequence begins during 125-128

program execution of the main program:
chronology
• Main program needs data from the peripheral.

• JSR instruction in main program causes a read

subroutine to be entered. The JSR instruction
includes a label that defines the start of the
subroutine.

• Start read subroutine. Initial instructions

prepare for interrupt by loading new PC and
PSW into vector address.

• Subroutine instruction sets device enable and

interrupt enable bits in peripheral CSR.
Peripheral starts to read data.

• RTS instruction in subroutine returns

operation to main program. Main program can
now perform other unrelated functions.

• Data is read and assembied in reader DBR.

Done bit is set. Interrupt and vector address
are sent to CPU.

• CPU loads new PSW and PC. Old PSW and PC

is pushed on the stack. CPU exits from main
program and starts interrupt service routine.

• Interrupt service routine transfers data in

reader DBR to a GPR or memory address.
Data is then tested and used as required. An
RTI instruction concludes the service routine.

• The old PSW and PC are popped from the

stack and reloaded. The main program picks
up where it was interrupted.

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- - - - - - - - - - - - - review materia 1------------.......

Topic Key Points Visual Ref

program loaders * Program loaders are small programs that allow 138
the operator to input or load other larger and
more complex programs into PDP-II memory.

loader programs * When first installed a computer's memory does 144

not have the capability of accepting programs.

• A small loader program is manually entered 145

in to memory through the console. This loader
program allows the CPU to input information.

bootstrap and * The PDP-II uses two loader programs to bring 147
absolute loader in other programs stored on paper tape - a
programs bootstrap loader and an absolute loader.

• The bootstrap's function is to bring in the 148

absolute loader program.

• The absolute loader, in tum, brings in any

standard paper tape program the operator
wishes to input.

location of * The bootstrap program is manually entered 149-150

bootstrap program through the switch register and is composed of
in memory fourteen instruction words that reside in the
highest 4K of memory.

• The two most significant octal digits of each ISO-lSI

instruction's address are determined by the
size of the PDP-II memory.

procedure * First the bootstrap program is toggled in 152-153

for running through the switch register. Then the absolute
bootstrap loader paper tape program is inserted in to the
program input device, i.e., usually either a high speed
paper tape reader or a Teletype reader. Finally
the starting address of the bootstrap loader is
toggled in and the LOAD ADDRESS and
START switches are then pressed to initiate
execution of the bootstrap program.

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. - - - - - - - - - - - - - review material-----------

Topic Key Points Visual Ref

operation of the * The bootstrap program causes the absolute 155-156

bootstrap loader loader program to be read from the paper tape
program and deposited in memory. Each time the CPU
loops through the bootstrap program, one byte
from the absolute loader program is stored in
memory.

operation of the * The end of the absolute loader program 157-158

absolute loader overlays, in memory, the beginning of the
program bootstrap loader program.

• This overlay modifies the beginning of the

bootstrap causing the program counter to
break out of the bootstrap program and
branch into the absolute loader program .

• A portion of the absolute loader program is 160

now executed restoring the bootstrap to its
original keyed in condition. The program then
jumps to a halt instruction and any of the
paper tape programs can be loaded through
the input device simply by pressing the
continue switch.

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,-------------review material-----------

TABLE A
BOOTSTRAP LOADER PROGRAM

ADDRESS CONTENTS ~INEMONICS

017 400 LOAD = 17400

017 744 e = LOAD+344

017 744 016 701 START: MOV DEVICE, R1

017 746 000 026

017 750 012 702 LOOP: MOV#.-LOAD+2, R2

017 752 000 352

017 754 005 211 ENABLE: INC@R1

017 756 105 711 WAIT: TSTB@R1

017 760 100 376 BPL WAIT

017 762 116 162 MOVB 2(Rl), LOAD(R2)

017 764 000 002

017 766 017 400

017 770 005 267 INC LOOP+2

017 772 177 756

017 774 000 765 BRNCH: BRLOOP

017 776 177 560 (TK) DEVICE:

or 177 550 (PR)

NOTE
a. LOAD=START- 344. Data cannot be loaded into
memory below this address.
b. e=LOAD+344 defines the starting address (017 744) of
the Bootstrap Loader.

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------------review material-----------.

r Instruction Mnemonic
THE BOOTSTRAP LOADER (TABLE A)

General Statement
Visual Ref
163-201

Analysis/Comments

START: MOV DEVICE,R1 GPR 1 is loaded with the address Input device is usually a
of the input device's CSR. high speed paper tape
reader or teletype.

LOOP: MOV #.- LOAD+2,R2 GPR 2 is loaded with an address Since immediate mode is
displacement. used, the address displace-
ment is in location LOOP+2.

ENABLE: INC @R1 The input device is enabled. The increment instruction
places a logical 1 into the
reader enable bit (the
LSB).

WAIT: TSTB@R1 The program waits until a byte Monitors the reader CSR
is read from the absolute done bit (7). When bit 7
loader tape and assembled in is a logical 1, the DBR
the DBR. is ready to transfer data.

BPL WAIT When a byte is read, the program The branch instruction
counter falls through the branch keeps the CPU in a wait
to next instruction. loop until bit 7 is a 1;
when bit 7 switches to a
1, the loop is broken.

MOVB 2(R1 ),LOAD(R2) The byte of information Load and address

assembled in the DBR is moved displacement are summed
into memory. to develop the storage
address.

INC LOOP+2 Address displacement is Generates next

incremented. sequential storage address.

BRNCH: BR LOOP Returns program counter back Unconditional branch

to the beginning of program to instruction.
repeat read and storage sequence.

The relationship between the bootstrap loader and absolute loader is shown in Figure 1.

NOTE
For an additional explanation, refer to Paragraph [Link]
in the PDP-ll Paper Tape Software Handbook.

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.,.-----------review materia 1 - - - - - - - - - -..........

Figure 1
MEMORY LAYOUT OF BOOTSTRAP & ABSOLUTE LOADER

Address Visual Ref.

204-250

XX7 476 d 000 000

XX7 500 010 706
XX7 502 024 646

c
XX7 724 012 767
7 726 352 Absolute Loader
7 730 20
7 732 012 767
7 734 765
7 736 34
7 740 000 167
7 742 177 532
XX7 744 016 701

I!
016 701
7' 746 26 26
t
Overlay
7 750 012 702 012 702
b 7
7
752
754
352
005 211
373
(353)
!
7 756 105 711
7 760 100 376
7 762 116 162
7 764 2 Boot strap Loader
"7 "7t::.t::. vv-' A""
I IVV AA/ ...UU

L 7
7
7
XX7
770
772
774
776
L 005 267
177 756
000 765
TK or PR
j
TK = 177 560 Keyboard
PR = 177 550 Hi Speed Reader
XX is a function of memory size

0Branch in Loc. XX7 774 returns PC to Loc. XX7 750 before 373 is overlayed in
Loc. XX7 752.

®Branch in Loc. XX7 774 directs PC to Loc. XX7 724 after 373 is overlayed in
Loc. XX7 752.

0Absolute loader jumps to Halt in Loc. XX7 476 after restoring Bootstrap Loader.

o Halt after bootstrap load.

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~-------------------study exercises--------------------~

I/O PROGRAMMING

The study exercises in this section of your workbook are intended to increase your familiarity
. with I/O programming concepts. Check the answer at the back of the workbook after working
each problem. Remember, this answer reflects one possible solution to the problem. It is not the
only answer; yours may be just as correct. After you've completed all the exercises, turn the A/V
playback unit back on and complete parts C and D of this study unit. You may also wish to
replay the first portion of this study unit - feel free to do so.

EXERCISE 1

The status register may be used to indicate an error or a fault in the peripheral device. For
example, bit 15 is set in the high speed paper tape reader CSR, or PRS, if the reader is out of
15
tape. Before each read operation it is desirable to test the state of this bit. If bit of the status
register is set, the data in the register is considered a negative value. The following two
instructions provide one way to test this bit:

TST PRS

BMI NOTAPE

What happens in this program when the reader has run out of tape?

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~-------------------study exercises--------------------'~

EXERCISE 2

The BIT instruction can be used for testing any of the 16 bits in a status register. For example,
the following two instructions are used to check on the availability of data in the Teletype reader
buffer. As you recall, this is indicated by bit 7 of the TKS being set:

WAIT: BIT #200, TKS

BEQWAIT

Here the contents of TKS is logically ANDed with 200. Until the DONE bit (#7) is set,- the sum is
zero; the conditions for the BEQ are met and the program remains in the loop. The DONE bit is
then set when the data is available in the TKB. Now the sum of 200 and the TKS contents is no
longer zero and the program falls through to the next instruction.

At this time we'd like you to use the BIT instruction in ~ two instruction sequence that causes a
branch to an error routine (NOCARD) if the input hopper of the high-speed punched card reader
(CD 11) is found to be empty. The card reader CSR is called the CDST and its address is 172460.
Bit 2 of the CDST is the hopper check bit.

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EXERCISE 3

What is the purpose of the following subroutine? Also indicate, in the space provided, the
function of each instruction.

(Rl) = 5000

DATAl: MOV #100, RO

ENCODE: MOVB (Rl)+, R2

ADD #200, R2

WAIT: BIT #200, @ #177564

BEQWAIT

MOV R2, @ #177566

DECRO

BNEENCODE

RTSR5

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EXERCISE 4

Write a subroutine that allows 100 8 keyboard generated characters to be stored in a memory area
with a starting address of INDATA. Afterwards return to the main program. Explain what each
of your instructions does.

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---------------------study exercises--------------------~

EXERCISES

In the preceding problem (Exercise 4) we stored lOOs characters in a memory area with a starting
address of INDATA. The stored data is in the Teletype code. Write a subroutine (TRANS) that
converts the Teletype-coded data to the ASCII code and stores it in a memory area with a
starting address of TDAT A. Explain what each instruction does.

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~-------------------study exercises--------------------,

EXERCISE 6

Programs can be written that allow the computer operator to manually control the program's
operation. In the program below the operator is allowed to store up to 64 10 (100 8 ) characters
from the keyboard. If the SPACE bar is pressed before all 64 characters are stored, the program is
halted; additional characters are not stored.

CLR TALLY

MOV # INDATA, RI

BPLPAWS

CMP TKB, #240

BEQ FINI

MOVB TKB,(Rl)+

INC TALLY

CMP TALLY, #100

BLTPAWS

FINI: HALT

Modify the program so that when the space bar is pressed, or 64 characters have been stored, the
program types out all the stored characters and then halts.

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 study exerCises--------------------'1

EXERCISE i

The BIS and BIC instructions are useful for modifying one bit of a peripheral status register while
leaving the other bits undisturbed. For example, bit 9 of the VR 20 Color CRT status register
controls the color of the display, 0 for green and 1 for red. To change the color, it is necessary to
change only this one bit. The instruction BIS #1000, CRTSR sets bit 9 in the status register
without disturbing the other bits. They remain set or clear as the case may be. Write the
instruction to set the interrupt enable bit of the Teletype reader status register, TKS.

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~-------------------study exercises--------------------,

EXERCISE 8

Individual bits in a status register can be cleared with the BIC instruction. Write an instruction to
clear the external clock enable bit, bit 1, of the ADCS, the Analog to Digital Subsystem CSR.

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~-------------------study exercises--------------------~

EXERCISE 9

The interrupt mode of operation is used to reduce computer waiting time. In the program loop
method, as we learned, the computer continually checks the state of the DONE flag (bit 7) in the
peripheral CSR. Using the interrupt mode, the computer actually ignores the peripheral, running
its own low-priority program until the peripheral requests service by setting the DONE bit. (The
interrupt enable bit in the CSR must have been set at some prior point.) The computer completes
the instruction being executed and then starts the interrupt service routine. The service routine
rrfay transfer the data involved and then perform some calculations with it. After the interrupt
service routine has been completed, the computer resumes the program that was interrupted by
the peripherals higher priority request.

In the program below assume that the high speed reader, which at some earlier time had been
commanded to read a character, now initiates an interrupt while the instruction opposite the
arrow is being executed.

MOV DATA, STORE

INC COUNT

CMP COUNT, TOPNUM

BLOSMOREAD

What instruction in this program is executed first after the interrupt service routine has been
completed?

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~~--------------------stUdY exercises

EXERCISE 10

For peripheral devices there are four different interrupt priority levels, 4 to 7, of which 7 is the
highest. Some peripherals are assigned a higher priority than others. For example, the Teletype
keyboard and the high speed punch both operate at a priority level of 4, while the card reader has
a priority level of 6. The CPU normally operates its background program at a level below 4 so
that it may be interrupted by any of the peripherals mentioned above. A peripherals service
routine can be interrupted, but only by a peripheral which has a higher priority than the one
being serviced.

Assume that the above mentioned peripherals are included in a system. At this time the CPU is
running its background program. What happens if -

a) The card reader requests interrupt service?

b) Then, while the card reader service routine is running, the Teletype keyboard requests
service?

' -___________________________________24 _____________________________________

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EXERCISE 11

Considering the same system (Exercise 10), what happens if the CPU program is running and the
keyboard requests service? Then, what happens when the card reader requests service after the
keyboard service routine has been started.

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~-------------------study exercises---------------------

EXERCISE 12

A Teletype keyboard service routine might store data in memory as in the example below. Each
time the keyboard is hit the service routine is entered.

KEYSRV: MOV TKB, STOR

RTI

What does the second line of the service routine do?

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,--------------------study exercises--------------------~

EXERCISE 13

It cannot be assumed that registers used in an interrupt service routine are not used
elsewhere - in the main or background program, for example. Other peripheral service routines
may also require the use of the same register. Therefore, there are two basic considerations when
programming service routines:

a) Whenever a register is used in a service routine, it should never be assumed that it

previously contained useless information. The first operation within the service routine
should be to PUSH the present contents of each required register on a stack. The last
operation just before the RTI should POP the contents back into the registers from the
stack.

MOV RI, -(SP) ; PUSH R I on stack

MOV (SP)+, Rl ; POP stack into R 1

b) Register data needed in a service routine should be stored via a label at the end of the
service routine, freeing the register for use in the background program or in other
service routines.

MOV Rl, -(SP)

MOV Rl, SUM

MOV (SP)+, Rl

Write the PUSH and POP instructions needed to preserve the original contents of RI and R2
during the keyboard service routine.

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EXERCISE 14

During a service routine, the data produced by a peripheral could be stored in memory, say at an
address defined by the label STORWD. Two instructions are required for this purpose:

a) An instruction executed at the beginning of the background program to initialize an

arbitrary label DASTOR with the first storage address.

MOV # STORWD, DASTOR

b) An instruction within the interrupt service routine to initialize a register with the
contents of DASTOR.

MOV DASTOR, RI

Complete the following service routine labeled KEYSRV:

KEYSRV: MOV RI, -(SP) ; PUSH R I on the stack

,. Initialize RI with the first storage address.

•
•
•
MOV (SP)+, R I ; Restore RI

RTI ; Return to previous program

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~-------------------study exercises---------------------

EXERCISE 15

To the previous routine (Exercise 14) we can add instructions to:

a) Store the one word of data produced by the Teletype keyboard

b) Then save the next storage address in DASTOR

KEYSRV: MOV RI, -(SP) ; PUSH RI on stack

MOV DASTOR, RI ; Initialize RI with address

MOVB TKB, (Rl)+ ; Store a character

MOV R 1, DASTOR ; Store next address in DASTOR

MOV (SP)+, RI ; POP Rl from stack

RTI ; Return to previous program

TITLE, a service routine for the Teletype printer, causes a character to be printed from a list
whose first address is identified by the label MESAGE. Write the address initialization instruction
required at the beginning of the background program as well as the service routine itself.

' -__________________________________ 29 __________________________________-'

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EXERCISE 16

Write an interrupt service routine that starts at an address with a label of PROFIL and keeps
track of the number of times each letter (A through Z) is pressed on the keyboard. Use the label
OCCUR as the starting address for the memory area where the individual counts are stored. If
you refer to the ASCII code listing, you can see that an offset address can be derived from the
code for each character. Remember, there is a difference between the ASCII code and the
transmitted Teletype code.

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~-----------------------------------30------------------------------------
,-----------answers to exercises---------.. . . .

EXERCISE 1

Bit 15 is set. Then, when the TST instruction is executed, the N bit in the PSW is set because the
PRS data appears as a negative value. With the N bit set, the BMI instruction causes the program
to branch to the NOT APE subroutine. This subroutine might, for example, type an error message
on the teletypewriter.

EXERCISE 2

BIT #4, @#172460

BNENOCARD

The contents of the CDST is logically ANDed with 4. If the hopper check bit is set prior to the
BIT instruction being executed, the sum is 4 (not equal to zero) and the program branches to
NOCARD.

Remember, the BIT instruction can be used to check more than one bit in a CSR.

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 answers to exercises---------i

EXERCISE 3

This subroutine uses the Teletype printer/punch to punch 64 1 0 (1 OOs) characters on paper tape.
The data is obtained from successive memory locations starting at address 5000. Each character is
converted from ASCII to Teletype code before it is transferred to the data buffer.

DATA 1: MOV #100, RO

ENCODE: MOVB (Rl)+, R2 ; Transfer data byte to GPR2

; Auto-increment source address

ADD #200, R2 ; ASCII to Teletype code

; Conversion

WAIT: BIT #200, @#177564 ; Wait until TPS ready bit

BEQWAIT ; Is set

MOVB R2, @#177566 ; Transfer character to TPB

; And punch

DEeRO ; Decrement byte count

BNEENCODE ; Return to ENCODE and punch

; Another character until

; Byte count = 0

RTSR5 ; Return to main program

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~---------answers to exercises---------.. . .

EXERCISE 4

KDATA: CLR COUNT ; Clear character count

MOV # INDATA, Rl ; Move the initial storage address to GPR 1

WAITK: BIT #200, TKS ; Loop on WAITK until

; A key is pressed and

BEQWAITK ; DONE is set

MOVB TKB, (Rl)+ ; Transfer character to storage address

INC COUNT ; Increment character count

CMP COUNT, #100 ; Compare character count

; with maximum allowed

BLTWAITK ; Repeat subroutine if

; fewer than 100 characters

; stored

RTS R5 ; Return to main program

; Assume that the subroutine

; is entered via the

; instruction JSR R5, KDATA

In the compare (CMP) instruction the destination is subtracted from COUNT. Until COUNT =
100 the result is a negative number (less than zero). Therefore, until 100 characters have been
stored, the BLT instruction conditions are met and the program loops on WAITK.

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 answers to exercises---------..... i
EXERCISE 5

TRANS: CLRCOUNT ; Clear character count

MOV # INDATA, RO ; Move initial Teletype

; code storage address to

;GPRO

MOV #TDATA, Rl ; Move initial ASCII

; code storage address to

;GPR 1

REPET: SUB #200, (RO) ; Teletype to ASCII conversion

MOVB (RO)+, (R 1)+ . ; Transfer data to new store

; area. Auto-increment both addresses

INC COUNT ; Increment character count

CMP#lOO, COUNT ; Compare character count

; with 100

BGTREPET ; branch to REPET until

; count = 0

RTSRS ; Return to main program

34
".----------answers to exercises---------.. . .

EXERCISE 6

CLR TALLY

MOV#INDATA,Rl

PAWS: TSTBTKS

BPL PAWS

CMP TKB, #240

BEQOUTPUT

MOVG TKB, (Rl)+

INC TALLY

CMP TALLY, #100

BLTPAWS

OUTPUT: MOV #INDATA, R2

WAITPR: BIT #200, TPS

BEQWAITPR

MOVB (R2)+, TPB

CMP Rl, R2

BGTWAITPR

HALT

Care must be used in selecting the branch instruction that follows the CMP Rl, R2 instruction.
If, for example, only one character has been stored, then R 1 and R2 would have the same
contents after this single character was printed. At this point the program should halt, not branch
back. Therefore, branching back must take place if the contents of R 1 are greater than that of
R2, and halt when they are equal. The BGT instruction provides the correct branching in this
case. Most branching errors involve one loop too many or one too few.

' -_______________________________ 35
(
answers to exercises--------......... i
EXERCISE 7

BIS #100, TKS ; After setting bit 6 the

; TKS = 100 if it was

; previously clear

EXERCISE 8

BIC #2, ADCS

This instruction clears bit 1 without disturbing the other bits. The BIC instruction is also useful
for masking out unwanted portions of a data word. For example BIC 40, XXXX would convert
lower case ASCII characters a through z to upper case characters A through Z.

EXERCISE 9

CMP COUNT, TOPNU1-f

EXERCISE 10

a) The CPU background program is stopped and the card reader service routine is run.

b) The Teletype keyboard's request is accepted only after the card reader service routine
is completed.

When all interrupt service routines have been completed, the CPU background program is
resumed at the point where it was interrupted.

36
~---------answers to exercises---------.. . . .

EXERCISE 11

a) The CPU program is terminated.

b) The keyboard service routine at Priority Level 4 is started.

c) The keyboard service routine is stopped before its completion.

d) The card reader service routine (Priority Level 6) is started and run to completion.

e) The keyboard service routine is resumed at the point where it was stopped and run to
compietion.

f) The CPU program is resumed at the point where it was stopped.

EXERCISE 12

The instruction RTI, Return From Interrupt, is always the last executed instruction of a service
routine. It causes a return to the previously interrupted program.

EXERCISE 13

MOV RI, -(SP)

MOV R2, - (SP)

MOV (SP)+, R2

MOV (SP)+, R I

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------------answers to exercises - - - - - - - - -.. . .

EXERCISE 14

KEYSRV: MOVRl,-(SP)

MOV DASTOR, Rl

MOV (SP)+, R 1

RTI

EXERCISE 15

MOV # MESAGE, TYPOUT ; Background initialization

TITLE: MOV R3, -(SP) ; PUSH R3

MOV TYPOUT, R3 ; Initialize R3 with

; address

MOV (R3)+, TPB ; Move data. Start printing.

MOV R3, TYPOUT ; Store new data address

MOV (SP)+, R3 ; POP stack into R3

RTI ; Return to previous program

The TITLE service routine is entered each time a character is to be printed. This happens each
time the peripheral raises its DONE flag, indicating readiness to print another character.

'--------------------------------- 38
~---------answers to exercises---------.. . .

EXERCISE 16

PROFIL: MOV RS, - (SP) ; Saves original RS contents

CLRINCHAR ; Clear temporary storage location

MOVB TKB, INCHAR ; Transfer character to

; temporary storage location

SUB #300, INCHAR ; INCHAR now contains an

; offset of from 1 to 328

MOV INCHAR, RS ; RS now contains the offset

INCB OCCUR(RS) ; Increment the count for the

; character. Destination

; address is determined by

; adding the offset in RS

; to the address OCCUR

MOV (SP)+, RS ; POP previous RS data

RTI ; Return to previous routine

39 ------------------------------~
.,.---------test-i/o programming---------

TEST - I/O PROGRAMMING

When you have completed the study unit, please take this self-scoring test. Then compare your
answers against the "answer sheet" which can be obtained from your supervisor. Based on your
test results, either review the appropriate material in this study unit or proceed to the next unit
in the series.

1. A function of the data buffer register in an interface is to:

a. Transfer control information to and from the peripheral.

b. Convert parallel data from the device to a serial format for the
Unibus.

c. Hold data until it is completely assembled and ready for transfer

to the Unibus or to the peripheral.

d. Monitor the status of the peripheral.

2. Match the following CSR bits to their functions.

( ) Bit 0 a. Allows an interrupt.

( ) Bits 1-3 b. Indicates an error has occurred.

( ) Bit 6 c. Selects anyone of 8 devices.

( ) Bit 7 d. Device is not available.

( ) Bits 8-10 e. Starts device operation.

( ) Bit 11 f. Device is done or ready.

( ) Bit 15 g. Specifies one of 8 possible device functions.

3. Explain how the TSTB instruction is used with the CSR READY or
DONE bit to control program operation.

' -___________________________________ 41 __________________________________- '

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~--------test-i/o programming---------

4. Match each instruction with its corresponding function.

a. TSTB @#177560 ( ) Initiates a read operation in the

Teletype.

b. MOVB (RO)+, TPB ( ) Starts the Teletype's reader and

allows an i11teITtlpt as soon as
data is available in the buffer.

c. MOV #776, R6 ( ) Checks on availability of data in

Teletype's reader buffer.

d. MOV #340, @#62 ( ) Determines when the Teletype

printer/punch is ready to accept
data.

e. INCB @#177560 ( ) Transfers data into the Teletype

printer/punch buffer.

f. MOV (SP)+, R 1 ( ) Initializes the stack pointer.

g. MOVB #101, TKS ( ) Places the starting address of the

Teletype's service routine into a
vector location.

h. RTS R5 ( ) Sets up a PSW that will inhibit all

device interrupts.

i. MOV #2000, @#60 ( ) Returns CPU to the main

program.

j. TSTB TPS ( ) Pops data from the hardware

stack.

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'-----------------------------------42----------------------------------~
- - - - - - - - - - - test-i/o programming - - - - - - - -..........

5. The program loop method of I/O programming, although wasteful of

CPU time, is often used. Which of the following circumstances would
call for its use:

a. If the stack is overloaded.

b. If program continuation is entirely dependent on the data the CPU

is waiting for.

c. If the peripheral operates at the same speed as the CPU.

d. If the computer systenl contaiils more than one peripheral device.

6. When a JSR instruction is executed what address is placed in the PC?

a. The starting address of the interrupt service routine.

b. The address of the instruction that follows the JSR.

c. The starting address of the subroutine specified in the destination

portion of the JSR.

d. The address contained in the register indicated in the JSR

instruction.

7. Two loader progranls were discussed in this study unit. The first
program is deposited in memory through the console and is called the
_ _ _ _ _ loader program. The second loader prognuli is entered
through the paper tape reader and is called the loader
program.

8. The starting address of the bootstrap loader program is xx7 744, 'Nhere
"xx" is a function of the memory size.

a. What is the value "xx" for 8K of memory?

b. What is the value "xx" for 28K of memory?

' -__________________________________ 43 __________________________________-'

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.,---------test-i/o programming

r 9. Listed below are the instructions that make up the bootstrap program.
Briefly, explain the function of each instruction.

a. START: MOV DEVICE,Rl

b. LOOP: MOV #.- LOAD+2,R2

c. ENABLE: INC @Rl

d. WAIT: TSTB @Rl

e. BPL WAIT

f. MOVB 2(Rl), LOAD(R2)

'-__________________________________44 ________________________________--'
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~--------test-i/o programming----------

g. INC LOOP+2

h. BRNCH: BR LOOP

10. One of the instructions in the bootstrap program moves an "address

displacement" into general-purpose register R2. How is this address
displacement used?

11. As the absolute loader program is stored in memory, part of it overlays

the original bootstrap program. What is the purpose of this overlay?

' -____________________________________ 45 __________________________________--'

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~--------test-i/o prOgrammin g- - - - - - - - - ,

12. The following steps occur when the absolute loader is deposited in
memory. Place these steps in the correct order.
I
( ) The CPU stops executing the bootstrap loader and starts
executing the absolute loader.

( ) The absolute loader program jumps to a halt instruction.

( ) The absolute loader program is read from the tape and is

deposited in successive memory locations.

( ) The absolute loader paper tape is placed in the paper tape

reader and the start switch is pressed.

( ) The absolute loader program is executed and the bootstrap

program is restored to its original condition.

( ) A portion of the absolute loader is overlayed onto the bootstrap

loader program, thus modifying the bootstrap program.

( ) The absolute loader program can now be used to bring in other

programs stored on paper tape.

( ) The bootstrap program is toggled in through the console switch

register.

( ) The leader code is read from the absolute loader tape and the
CPU continues looping through the bootstrap program.

' -__________________________________ 46 ___________________________________

~------------------------notes------------------------~
~-----------------------notes------------------------~