The salient features of 8051Microcontroller are:
❖ 4 KB on chip program memory (ROM or EPROM).
❖ 128 bytes on chip data memory (RAM).
❖ 8-bit data bus
❖ 16-bit address bus
❖ 32 general purpose registers each of 8 bits
❖ Two -16 bit timers T0 and T1
❖ Five Interrupts (3 internal and 2 external).
❖ Four Parallel ports each of 8-bits (PORT0, PORT1, PORT2, PORT3) with a total of 32
I/O lines.
❖ One 16-bit program counter and One 16-bit DPTR (data pointer)
❖ One 8-bit stack pointer
❖ One Microsecond instruction cycle with 12 MHz Crystal.
❖ One full duplex serial communication port.
PIN DIAGRAM OF 8051:
❖ The 8051 microcontroller is available as a 40 pin DIP chip and it works at +5 volts DC.
❖ VCC → 5V supply
❖ VSS → GND
❖ XTAL2/XTALI are for oscillator input
❖ Port 0 – 32 to 39 – AD0/AD7 and P0.0 to P0.7
❖ Port 1 – 1 to 8 – P1.0 to P1.7
❖ Port 2 – 21 to 28 – P2.0 to P2.7 and A 8 to A15
❖ Port 3 – 10 to 17 – P3.0 to P3.7
❖ P 3.0 – RXD – Serial data input – SBUF
❖ P 3.1 – TXD – Serial data output – SBUF
❖ P 3.2 – INT0 – External interrupt 0 – TCON 0.1
❖ P 3.3 – INT1 – External interrupt 1 – TCON 0.3
❖ P 3.4 – T0 – External timer 0 input – TMOD
Fig 4.3 Pin Diagram of 8051
❖ XTAL1, XTAL2:
o These two pins are connected to Quartz crystal oscillator which runs the on-chip
oscillator.
o The quartz crystal oscillator is connected to the two pins along with a capacitor of
30pF as shown in the figure 4.4.
o If we use a source other than the crystal oscillator, it will be connected to XTAL1
and XTAL2 is left unconnected as shown in figure 4.5.
Fig 4.4 Crystal Oscillator as Source Fig 4.5 External Clock Source
❖ P0.0- P0.7(AD0-AD7) :
o The port 0 pins multiplexed with Address/data pins.
o If the microcontroller is accessing external memory these pins will act as
address/data pins otherwise they are used for Port 0 pins.
❖ P2.0- P2.7(A8-A15) :
o The port2 pins are multiplexed with the higher order address pins.
o When the microcontroller is accessing external memory these pins provide the
higher order address byte otherwise they act as Port 2 pins.
❖ P1.0- P1.7:
o These 8-pins are dedicated for Port1 to perform input or output port operations.
❖ P3.0- P3.7:
o These 8-pins are meant for Port3 operations and also for some control
operations like Read, Write, Timer0, Timer1, INT0, INT1, RxD and TxD
❖ RST:
o The RESET pin is an input pin and it is an active high pin.
o When a high pulse is applied to this pin the microcontroller will reset and
terminate all activities.
o Upon reset all the registers except PC will reset to 0000 Value and PC register
will reset to 0007 value.
❖ 𝑬̅̅𝑨̅̅ (External Access): Active Low Pin
o This pin is connected to ground when microcontroller is accessing the program
code stored in the external memory and connected to Vcc when it is accessing
the program code in the on chip memory.
o This pin should not be left unconnected.
❖ 𝑷̅̅𝑺̅̅𝑬̅̅𝑵̅̅(Program Store Enable): Active Low Pin
o When the microcontroller is accessing the program code stored in the external
ROM, this pin is connected to the OE (Output Enable) pin of the ROM.
❖ ALE (Address latch enable): Active High Pin
o When connected to external memory, port 0 provides both address and data i.e
address and data are multiplexed through port 0.
o This ALE pin will demultiplex the address and data bus.
o When the pin is High, the AD bus will act as address bus otherwise the AD bus
will act as Data bus.
8051 ARCHITECTURE
Fig 4.6 Block Diagram of 8051
Fig 4.7 Architectural block diagram of microcontroller 8051
❖ Mostly used blocks in the architecture of 8051 are as follows:
❖ ALU
o Arithmetic Logical Unit
o This unit is used for the arithmetic calculations.
❖ A-Accumulator
o This register is used for arithmetic operations.
o This is also bit addressable and 8 bit register.
❖ B-Register
o This register is used in only two instructions MUL AB and DIV AB.
o This is also bit addressable and 8 bit register
❖ PC-Program Counter
o Points to the address of next instruction to be executed from ROM
o It is 16 bit register means the 8051 can access program address from 0000H to
FFFFH. A total of 64KB of code.
o Initially PC has 0000H
o ORG instruction is used to initialize the PC
▪ ORG 0000H means PC initialize by 0000H
o PC is incremented after each instruction. ROM
❖ PSW Register (8051 Flags)
o Used to indicate the Arithmetic condition of Accumulator.
o Flag register in 8051 is called as program status word (PSW).
o This special function register PSW is also bit addressable and 8 bit wide means
each bit can be set or reset independently.
o The meaning of various bits of PSW register is shown below.
Table 4.2: PSW Register Description
CY PSW0.7 Carry Flag
AC PSW0.6 Auxiliary Carry Flag
F0 PSW0.5 Flag 0 available for general purpose.
RS1 PSW0.4 Register Bank select bit 1
RS0 PSW0.3 Register bank select bit 0
OV PSW0.2 Overflow flag
--- PSW0.1 User definable flag
P PSW0.0 Parity flag .set/cleared by hardware.
o The bits PSW3 and PSW4 are denoted as RS0 and RS1 and these bits are used
to select the bank registers of the RAM location.
o P (Parity flag) → PSW 0.0
▪ 1 – odd number of 1 in ACC
▪ 0 – even number of 1 in ACC
o OV (overflow flag) → PSW 0.2
▪ This is used to detect error in signed arithmetic operation.
▪ This is similar to carry flag but difference is only that carry flag is used for
unsigned operation.
o The selection of the register Banks and their addresses are given below.
Table 4.3: Register Bank Selection
RS1 RS0 Register Bank Address
0 0 0 00H-07H
0 1 1 08H-0FH
1 0 2 10H-17H
1 1 3 18H-1FH
▪ Initially by default always Bank 0 is selected.
o F0 → user definable bit
o AC (Auxiliary carry flag) → PSW0.6
▪ When carry is generated from D3 to D4, it is set to 1, it is used in BCD
arithmetic.
o CY (carry flag) → PSW0.7
▪ Affected after 8 bit addition and subtraction.
▪ It is used to detect error in unsigned arithmetic operation.
▪ It can be used as single bit storage.
• SETB C → for cy = 1
• CLR C → for cy = 0
❖ Stack in 8051
o RAM locations from 08H to 1FH can be used as stack. Stack is used to store the
data temporarily.
o Stack is last in first out (LIFO)
o Stack pointer (SP)
▪ 8bit register
▪ It indicates current RAM address available for stack or it points the top of
stack.
▪ Initially by default at 07H because first location of stack is 08H.
▪ After each PUSH instruction the SP is incremented by one while in MC
after PUSH instruction SP is decremented.
▪ After each POP instruction the SP is decremented.
❖ DPTR (Data Pointer) in 8051
o This is a 16 bit register which is used to furnish address information for internal
and external program memory and for external data memory.
o It is divided into two parts DPH and DPL
▪ DPH for Higher order 8 bits, DPL for lower order
❖ Input Output Ports
o There are four input output ports available P0, P1, P2, P3.
o Each port is 8 bit wide and has special function register P0, P1, P2, P3 which are
bit addressable means each bit can be set or reset by the Bit instructions (SETB
for high, CLR for low) independently.
o The data at any port which is transmitting or receiving is in these registers.
o The port 0 can perform dual works. It is also used as Lower order address bus
(A0 to A7) multiplexed with 8 bit data bus P0.0 to P0.7 is AD0 to AD7
respectively the address bus and data bus is demultiplexed by the ALE signal
and latch which is further discussed in details.
o Port 2 can be used as I/O port as well as higher order address bus A8 to A15.
o Port 3 also have dual functions it can be worked as I/O as well as each pin of P3
has specific function.
o P3.0 – RXD – {Serial I / P for Asynchronous communication Serial O / P for
synchronous communication}.
o P3.1 – TXD – Serial data transmit.
o P3.2 – INT0 – External Interrupt 0.
o P3.3 – INT1 – External Interrupt 1.
o P3.4 – T0 – Clock input for counter 0.
o P3.5 – T1 – Clock input for counter 1.
o P3.6 – WR – Signal for writing to external memory.
o P3.7 – RD – Signal for reading from external memory.
o When external memory is interfaced with 8051 then P0 and P2 can’t be worked
as I/O port they works as address bus and data bus, otherwise they can be
accessed as I/O ports.
❖ Oscillator
o It is used for providing the clock to MC8051 which decides the speed or baud
rate of MC.
o We use crystal which frequency varies from 4MHz to 30 MHz, normally we use
11.0592 MHz frequency.
❖ Interrupts
o Interrupts are defined as requests because they can be refused (masked) if they
are not used, that is when an interrupt is acknowledged.
o A special set of events or routines are followed to handle the interrupts.
o These special routines are known as interrupt handler or interrupt service
routines (ISR).
o These are located at a special location in memory.
o INT0 and INT1 are the pins for external interrupts.
❖ Timers and Counters
o Timer means which can give the delay of particular time between some events.
For example on or off the lights after every 2 sec.
o This delay can be provided through some assembly program but in
microcontroller two hardware pins are available for delay generation.
o These hardware pins can be also used for counting some external events.
o How much time a number is repeated in the given table is calculated by the
counter?
▪ In MC8051, two timer pins are available T0 and T1, by these timers we
can give the delay of particular time if we use these in timer mode.
▪ We can count external pulses at these pins if we use these pins in
counter mode.
▪ 16 bits timers are available. Means we can generate delay between
0000H to FFFFH.
▪ Two special function registers are available.
o If we want to load T0 with 16 bit data then we can load separate lower 8 bitin TL0
and higher 8 bit in TH0.
o In the same way for T1.
o TMOD, TCON registers are used for controlling timer operation.
❖ Serial Port
o There are two pins available for serial communication TXD and RXD
o Normally TXD is used for transmitting serial data which is in SBUF register, RXD
is used for receiving the serial data.
o SCON register is used for controlling the operation.
❖ Memory organization:
o The 8051 microcontroller has 128 bytes of Internal RAM and 4kB of on chip
ROM.
o The RAM is also known as Data memory and the ROM is known as program
memory.
o The program memory is also known as Code memory.
o This Code memory holds the actual 8051 program that is to be executed.
o In 8051 this memory is limited to 64K.
o Code memory may be found on-chip, as ROM or EPROM. It may also be stored
completely off-chip in an external ROM or, more commonly, an external EPROM.
o The 8051 has only 128 bytes of Internal RAM but it supports 64kB of external
RAM. As the name suggests, external RAM is any random access memory which
is off-chip.
o Since the memory is off-chip it is not as flexible interms of accessing, and is also
slower.
o For example, to increment an Internal RAM location by 1, it requires only 1
instruction and 1 instruction cycle but to increment a 1-byte value stored in
External RAM requires 4 instructions and 7 instruction cycles.
o So, here the external memory is 7 times slower
❖ Internal RAM OF 8051:
o This Internal RAM is found on-chip on the 8051.
o So it is the fastest RAM available, and it is also the most flexible in terms of
reading, writing, and modifying it’s contents.
o Internal RAM is volatile, so when the 8051 is reset this memory is cleared.
o The 128 bytes of internal
▪ Four register banks (Bank0, Bank1, Bank2 and Bank3) each of 8-bits
(total 32 bytes). The default bank register is Bank0. The remaining Banks
are selected with the help of RS0 and RS1 bits of PSW Register.
▪ 16 bytes of bit addressable area and
▪ 80 bytes of general purpose area (Scratch pad memory) as shown in the
figure 4.8. This area is also utilized by the microcontroller as a storage
area for the operating stack.
o The 32 bytes of RAM from address 00 H to 1FH are used as working registers
organized as four banks of eight registers each.
o The registers are named as R0-R7 .Each register can be addressed by its name
or by its RAM address.
Fig 4.8 Structure of RAM
❖ On chip ROM
o In 8051, 4KB read only memory (ROM) is available for program storage.
o This is used for permanent data storage. Or the data which is not changed during
the processing like the program or algorithm for specific applications.
▪ This is volatile memory; the data saved in this memory does not
disappear after power failure.
▪ We can interface up to 64KB ROM memory externally if the application is
large.
o These sizes are specified different by their companies.
o Address Range of PC: Address range of PC means program counter (which
points the next instruction to be executing) can be moved between these
locations or we can save the program from this location to this location. The
address range can be calculated in the same way just like the RAM which is
discussed in previous section
o Address range of PC is 0000H to 0FFFH means total 4KB locations are available
from 0000H to 0FFFH.
❖ SPECIAL FUNCTION REGISTERS (SFRs):
o In 8051 microcontroller there certain registers which uses the RAM addresses
from 80h to FFh and they are meant for certain specific operations.
o These registers are called Special function registers (SFRs).
o Some of these registers are bit addressable also.
o The list of SFRs and their functional names are given below.
o In these SFRs some of them are related to I/O ports (P0, P1, P2 and P3) and
some of them are meant for control operations (TCON,SCON, PCON..) and
remaining are the auxiliary SFRs, in the sense that they don't directly configure
the 8051.
Table 4.4: SFRs of 8051 Microcontroller
[Link] Symbol Name of SFR Address (Hex)
1 ACC* Accumulator E0
2 B* B-Register F0
3 PSW* Program Status word register DO
4 SP Stack Pointer Register 81
DPL Data pointer low byte 82
5 DPTR
DPH Data pointer high byte 83
6 P0* Port 0 80
7 P1* Port 1 90
8 P2* Port 2 0A
9 P3* Port 3 0B
10 IP* Interrupt Priority control B8
11 IE* Interrupt Enable control A8
12 TMOD Timer mode register 89
13 TCON* Timer control register 88
14 TH0 Timer 0 Higher byte 8C
15 TL0 Timer 0 Lower byte 8A
16 TH1 Timer 1Higher byte 8D
17 TL1 Timer 1 lower byte 8B
18 SCON* Serial control register 98
19 SBUF Serial buffer register 99
20 PCON Power control register 87
The * indicates the bit addressable SFRs