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Unit I Computer Evolution and Performance

The document provides an overview of computer evolution, detailing its functionalities, advantages, and disadvantages, as well as a brief history and the five generations of computers. It explains the Von Neumann architecture, which is a foundational model for computer design, emphasizing the stored-program concept and its components. Key features and limitations of each computer generation are discussed, highlighting advancements in technology and the impact on computing capabilities.

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0% found this document useful (0 votes)
13 views46 pages

Unit I Computer Evolution and Performance

The document provides an overview of computer evolution, detailing its functionalities, advantages, and disadvantages, as well as a brief history and the five generations of computers. It explains the Von Neumann architecture, which is a foundational model for computer design, emphasizing the stored-program concept and its components. Key features and limitations of each computer generation are discussed, highlighting advancements in technology and the impact on computing capabilities.

Uploaded by

karad1234567
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Unit I - Computer Evolution and Performance

➢ What is a computer?
Computer is an advanced electronic device that takes raw data as an input from the user and
processes it under the control of a set of instructions (called program), produces a result(output),
and saves it for future use. This tutorial explains the foundational concepts of computer hardware,
software, operating systems, peripherals, etc. along with how to get the most value and impact
from computer technology.

Functionalities of a Computer

There are three basic functionalities of a Computer System and they are

1. Input

2. Process
3. Output

But if we look at it in a very broad sense, any digital computer carries out the following five
functions:

Step 1 - Takes data as input.

Step 2 - Stores the data/instructions in its memory and uses them as required.

Step 3 - Processes the data and converts it into useful information.

Step 4 - Generates the output.

Step 5 - Controls all the above four steps.


Advantages of Computers
• Speed − Computers can execute programmes quickly. Thousands of instructions can
execute in milliseconds or seconds.

• Accuracy − Computers can perform very complex computations accurately in a very short
period of time. If a user inputs the correct input to the computer, it gives accurate results
that can be used in decision-making.

• Storage − Computers can store large amounts of data permanently. The data is saved in
files, which can be accessed at any time; these files are saved for a long time period until a
user deletes them.

• Power of Remembering − A computer stores data permanently. It forgets or loses certain


information only when asked to do so.

• Versatility − A computer is a versatile device. It can run different programmes


simultaneously.

• Diligently − A computer can do the assigned task diligently. A computer can work for hours
without getting tired. Hence, it can do thousands of complex computations with the same
accuracy.

• Automation − A computer is an automated device. It works without human intervention.

• No I.Q. − A computer does not have its own I.Q.; it carries out the predetermined tasks and
does not take its own decisions.

• No Feelings − A computer does not have emotions. It works as per the given instructions
by users.

Disadvantages of Computers
• Health Issues − Working long hours on computers leads to health issues. Student's playing
games and accessing related applications for long periods of time cause serious health
problems.

• Spread of Pornography − The growing trend of the internet has spread pornography. In
today's time, pornography is a big threat to society and the youth.

• Virus and hacking attacks − Viruses are unwanted programmes that enter computers
through networks or the internet. These programmes may steal information or damage
computers. Sometimes these lock the application programmes of the computer to affect its
working.
• No IQ − Computers cannot make their own decisions. Its functioning depends on human
interventions.
• Negative effect on the environment − The increasing use of computers and automated
devices has posed a major threat to the environment.

• Crashed Networks − Hackers may destroy the network, which affects the overall working
of the existing system. In todays time, most of the data is on servers, so destroying the
network may be a serious threat to communication.

• Online cybercrimes − the practise of using a computer to facilitate unlawful activities


including fraud, the trafficking of child pornography and other items of intellectual
property, identity theft, and privacy violations The relevance of cybercrime, particularly
over the Internet, has increased as the computer is most widely used in business,
entertainment, and government.

• Data and information violation − A breach of confidentiality occurs when information is


given to a third party without the data owner's authorization. The owner of the data has the
right to file for legal action to recover the potential losses.

➢ A Brief History of Computers :-


The history of computers spans thousands of years, from early counting devices to the powerful
systems we use today.

Time Devices invented Description

3000 This is the earliest computing device. This was used to do basic arithmetic calculations. In
Abacus
BCE this computer, beads were moved along rods to represent numbers.

Mechanical Mechanical methods were introduced to perform arithmetic calculations. Mechanical


Calculators (Pas calculators are devices that perform mathematical calculations using mechanical
17th ce
caline and mechanisms rather than electronic components. These calculators were widely used before
ntury
Stepped the advent of electronic calculators and computers. The popular devices of this century
Reckoner)
were Pascaline and Stepped Reckoner.

Mechanical
computer (Step Mechanical devices and ideas that were important precursors to the development of
Reckoner, Turk's computers and automation were introduced. It uses mechanical components, such as gears,
18th ce
Head, Difference levers, and switches, to perform calculations and process information. The popular
ntury
Engine, mechanical devices developed during 18th century were Step Reckoner, Turk's Head,
Analytical
Difference Engine, Analytical Engine.
Engine).
Electromechanic
al
Computers Devi
ces like the Z3,
Mark I

ENIAC (1945)

Stored-Program
Computers
(1940s-1950s) Computers developed during 19th century were crucial in shaping the
concepts and ideas that eventually led to the creation of the computers we use
Transistors and today. Most of the devices were based on the combination of mechanical and
Integrated
Circuits (1950s- electrical switches to perform computation. The 19th century was the time
19th ce 1960s) where invention of computing devices was more and more. The size of
ntury computer was reduced and the devices with large storage and high
Minicomputers
computations were introduced. Interconnectivity with multiple devices and
(1960s-1970s)
data sharing, remote accessing were recorded as the features of the computers
Microprocessors which makes it popular in the world and make the computer as most
and Personal demandable computing device in the world.
Computers
(1970s-1980s)

Graphical User
Interfaces (1980s-
1990s)

Internet and
World Wide Web
(1990s)

Laptops, 20th century is the time where computer technology is the next level. Portable and light
Smartphones, weighted high computing devices are introduced and in trend. Cloud Computing
and Tablets technology makes the internet as a more useful platform to keep the data centralise in
20th ce (2000s- terms of accessing and its computation on server. Hence, cloud computing involves
ntury Present) delivering various services over the internet, such as computing power, storage, and
applications. The 20th century saw significant developments in the field of artificial
Cloud intelligence (AI) also. AI technologies began to be integrated into various applications,
Computing such as speech recognition, image processing, natural language processing, and robotics.
and AI (Most These developments set the stage for the further evolution of AI in the 21st century, where
demandable in the focus shifted toward more data-driven approaches.
cutting edge
technology)

The history of computers is marked by a continuous cycle of innovation, with each generation
building upon the achievements of the previous one. This overview provides just a glimpse into
the rich and complex evolution of computing technology.

➢ Generations of Computers
Generation in computer terminology is a change in technology a computer is/was being used.

Initially, the generation term was used to distinguish between varying hardware technologies.

Nowadays, generation includes both hardware and software, which together make up an entire

computer system.

There are five computer generations known till date. Each generation has been discussed in

detail along with their time period and characteristics. In the following table, approximate dates
against each generation has been mentioned, which are normally accepted.

Following are the main five generations of computers.


1. First Generation Computers
The period of first generation was from 1946-1959. The computers of first generation used
vacuum tubes as the basic components for memory and circuitry for CPU (Central Processing
Unit). These tubes, like electric bulbs, produced a lot of heat and the installations used to fuse
frequently. Therefore, they were very expensive and only large organizations were able to
afford it.
In this generation, mainly batch processing operating system was used. Punch cards, paper
tape, and magnetic tape was used as input and output devices. The computers in this generation
used machine code as the programming language.
The main features of the first generation are:

• Vacuum tube technology


• Unreliable

• Supported machine language only

• Very costly

• Generates lot of heat

• Slow input and output devices

• Huge size

• Need of AC
• Non-portable

• Consumes lot of electricity

Some computers of this generation were:


• ENIAC

• EDVAC

• UNIVAC

• IBM-701
• IBM-750
2. Second Generation Computers
The period of second generation was from 1959-1965. In this generation, transistors were used
that were cheaper, consumed less power, more compact in size, more reliable and faster than the
first-generation machines made of vacuum tubes. In this generation, magnetic cores were used as
the primary memory and magnetic tape and magnetic disks as secondary storage devices.

In this generation, assembly language and high-level programming languages like FORTRAN,
COBOL were used. The computers used batch processing and multiprogramming operating
system.

The main features of second generation are:

• Use of transistors

• Reliable in comparison to first generation computers


• Smaller size as compared to first generation computers

• Generates less heat as compared to first generation computers

• Consumed less electricity as compared to first generation computers

• Faster than first generation computers

• Still very costly

• AC required

• Supported machine and assembly languages


Some computers of this generation were:

• IBM 1620
• IBM 7094

• CDC 1604

• CDC 3600

• UNIVAC 1108
3. Third Generation Computers
The period of third generation was from 1965-1971. The computers of third generation used
Integrated Circuits (ICs) in place of transistors. A single IC has many transistors, resistors, and
capacitors along with the associated circuitry.

The IC was invented by Jack Kilby. This development made computers smaller in size, reliable,
and efficient. In this generation remote processing, time-sharing, multi-programming operating
system were used. High-level languages (FORTRAN-II TO IV, COBOL, PASCAL PL/1,BASIC,
ALGOL-68 etc.) were used during this generation.

The main features of third generation are:

• IC used

• More reliable in comparison to previous two generations


• Smaller size

• Generated less heat

• Faster

• Lesser maintenance

• Costly

• AC required

• Consumed lesser electricity


• Supported high-level language

Some computers of this generation were:


• IBM-360 series

• Honeywell-6000 series

• PDP (Personal Data Processor)

• IBM-370/168

• TDC-316
4. Fourth Generation Computers
The period of fourth generation was from 1971-1980. Computers of fourth generation used
Very Large Scale Integrated (VLSI) circuits. VLSI circuits having about 5000 transistors and
other circuit elements with their associated circuits on a single chip made it possible to have
microcomputers of fourth generation. Fourth generation computers became more powerful,
compact, reliable, and affordable. As a result, it gave rise to Personal Computer (PC) revolution.
In this generation, time sharing, real time networks, distributed operating system were used. All
the high-level languages like C,C++, DBASE etc., were used in this generation.
The main features of fourth generation are:

• VLSI technology used

• Very cheap
• Portable and reliable

• Use of PCs

• Very small size

• Pipeline processing
• No AC required

• Concept of internet was introduced

• Great developments in the fields of networks

• Computers became easily available

Some computers of this generation were:

• DEC 10

• STAR 1000

• PDP 11
• CRAY-1(Super Computer)

• CRAY-X-MP(Super Computer
5. Fifth Generation Computers
The period of fifth generation is 1980-till date. In the fifth generation, VLSI technology became

ULSI (Ultra Large Scale Integration) technology, resulting in the production of microprocessor

chips having ten million electronic components.

This generation is based on parallel processing hardware and AI (Artificial Intelligence) software.
AI is an emerging branch in computer science, which interprets the means and method of making
computers think like human beings. All the high-level languages like C and C++, Java, .Net etc.,
are used in this generation.

The main features of fifth generation are:

• ULSI technology

• Development of true artificial intelligence

• Development of Natural language processing

• Advancement in Parallel Processing


• Advancement in Superconductor technology

• More user-friendly interfaces with multimedia features

• Availability of very powerful and compact computers at cheaper rates

Some computer types of this generation are:

• Desktop

• Laptop

• Notebook
• Ultrabook

• Chromebook
➢ Von Neumann Architecture
Von Neumann architecture is a computer design model proposed by John von
Neumann in 1945. It is based on the stored-program concept, where both
program instructions and data are stored in the same memory. The architecture
consists of a Central Processing Unit (CPU), main memory, input unit,
and output unit. Instructions are executed sequentially using the fetch-
decode-execute cycle. A major limitation of this architecture is the Von
Neumann bottleneck, caused by the use of a single bus for both data and
instructions.
Core Principle: Stored-Program Concept
The key idea of Von Neumann architecture is that:
• Instructions and data are represented in binary form
• Both are stored in a single shared memory
• Instructions can be modified like data during execution
This enables flexibility, conditional branching, and complex program control.

Fig. Block Diagram of Von Neumann Architecture


Main Components:-
Von Neumann architecture consists of four main components: the Central
Processing Unit (CPU), Main Memory, Input Unit, and Output Unit. The
CPU is the core of the system and includes the Arithmetic Logic Unit (ALU),
which performs arithmetic and logical operations, the Control Unit (CU),
which controls the execution of instructions, and registers that provide fast
temporary storage for data and instructions. The Main Memory stores both
program instructions and data in the same memory space, following the
stored-program concept. The Input Unit is responsible for accepting data and
instructions from external devices and converting them into binary form,
while the Output Unit displays or produces the processed results in a human-
readable form. All components communicate with each other through a
common bus system during program execution.
1. Central Processing Unit (CPU)
The CPU is responsible for processing instructions and consists of:
• Arithmetic Logic Unit (ALU): Performs arithmetic and logical operations
• Control Unit (CU): Controls instruction execution and data flow
• Registers: High-speed storage (Program Counter, Instruction Register,
Accumulator, etc.)

2. Main Memory
• Stores both program instructions and data
• Memory locations are identified using unique addresses
• Accessed sequentially during program execution

3. Input Unit
• Accepts data and instructions from external devices
• Converts input into machine-readable binary form

4. Output Unit
• Produces results in human-readable form
• Converts binary data into output signals

Instruction Execution Cycle


Von Neumann architecture follows the Fetch–Decode–Execute Cycle:
1. The Program Counter (PC) holds the address of the next instruction
2. Instruction is fetched from memory into the Instruction Register (IR)
3. Control Unit decodes the instruction
4. ALU executes the operation
5. Result is stored in memory or registers
6. PC is updated to the next instruction
This cycle continues until program completion.

Von Neumann Bottleneck


A major limitation of this architecture is the Von Neumann bottleneck, which
occurs because:
• A single bus is used for both data and instructions
• CPU cannot fetch data and instructions simultaneously
• Memory access speed limits overall performance
The Von Neumann bottleneck is a fundamental limitation of the Von Neumann
architecture, where both program instructions and data share the same memory
and bus. This creates a performance bottleneck because the CPU cannot access
instructions and data simultaneously.
Causes:
1. Single Bus for Data and Instructions:
o In Von Neumann architecture, a single memory bus is used for
transferring both instructions and data.
o The CPU has to fetch instructions and then fetch data sequentially,
which slows down processing.
2. CPU Cannot Fetch Data and Instructions Simultaneously:
o Modern CPUs are fast, but memory access is slower.
o When the CPU waits for memory to provide instructions or data, it
remains idle, reducing overall efficiency.
3. Memory Access Speed Limits Performance:
o CPU speed is often much higher than memory speed.
o The CPU frequently stalls waiting for memory, meaning increasing
CPU speed alone does not improve system performance.
Effect:
• CPU utilization is low because of frequent idle cycles.
• Memory-intensive programs (e.g., graphics, databases) are most affected.
• Overall system performance is constrained by memory access, not CPU
speed.

Solutions:
• Cache Memory: Small, fast memory close to CPU to store frequently used
data and instructions.
• Pipelining & Prefetching: Fetch instructions ahead of execution to hide
memory latency.
• Harvard Architecture: Separate memory and buses for instructions and data
to allow simultaneous access.
• Wider or Multiple Memory Channels: Increase data transfer per cycle.
Conclusion:
The Von Neumann bottleneck occurs because the CPU and memory cannot
communicate simultaneously for instructions and data, making memory
access the limiting factor in system performance. Modern computers reduce
this bottleneck using cache, pipelining, and hybrid architectures.

Characteristics
• Single memory for instructions and data
• Sequential instruction execution
• Simple and cost-effective design
• Flexible program storage

Advantages
• Simple hardware implementation
• Lower cost
• Easy program modification
• Suitable for general-purpose computing

Disadvantages
• Limited performance due to memory bottleneck
• Slower execution compared to Harvard architecture
• Inefficient for high-speed parallel processing

➢ Harvard Architecture
Harvard architecture is a computer design model where program
instructions and data are stored in separate memory units that are accessed
through independent buses. This separation allows the processor to fetch
instructions and access data simultaneously, which helps avoid the bottleneck
present in traditional Von Neumann systems.
• Eliminates the Von Neumann bottleneck.
• Faster and predictable performance (suitable for real-time systems).
• Parallel access to both instructions and data.

Working Principle
In Harvard Architecture, fetching an instruction from instruction memory and
reading/writing data from/to data memory happen at the same time without
waiting for one to finish. Separate buses prevent the bottleneck that occurs
when data and instructions share a path. For example, while an instruction is
being executed, the next instruction can be fetched simultaneously, speeding
up processing.

Fig .Structure of Harvard Architecture


Components of Harvard Architecture
Harvard architecture is designed with specific components that handle
instruction execution, control, and data communication.
• Arithmetic and Logic Unit: The arithmetic logic unit is part of the
CPU that operates all the calculations needed. It performs addition,
subtraction, comparison, logical Operations, bit Shifting Operations,
and various arithmetic operations.
• Control Unit: The Control Unit is the part of the CPU that operates all
processor control signals. It controls the input and output devices and
also controls the movement of instructions and data within the system.
• Input/Output System: Input devices are used to read data into main
memory with the help of CPU input instruction. The information from
a computer as output is given through Output devices. The computer
gives the results of computation with the help of output devices.
Application of Harvard Architecture
Harvard architecture is a type of computer design where the memory
for instructions and data are kept separate. Here are the some
applications:
Digital Signal Processors (DSPs):
• Audio and video processing, telecommunications, radar systems, and
image processing.
• Texas Instruments TMS320 for hearing aids.
Microcontrollers (MCUs):
• Embedded systems in consumer electronics, automotive systems, IoT
devices, and industrial automation.
• PIC in automotive ABS
Network Processors:
• Routers, switches, and network security appliances.
• Broadcom StrataXGS
Automotive Systems:
• Engine control units (ECUs), advanced driver-assistance systems
(ADAS), and infotainment systems.
• NXP S32K for engine control
Difference between Von Neumann and Harvard Architecture
VON NEUMANN
HARVARD ARCHITECTURE
ARCHITECTURE

It is ancient computer architecture It is modern computer architecture


based on stored program computer based on Harvard Mark I relay based
concept. model.

Same physical memory address is Separate physical memory address is


used for instructions and data. used for instructions and data.

There is common bus for data and Separate buses are used for
instruction transfer. transferring data and instruction.

Two clock cycles are required to An instruction is executed in a single


execute single instruction. cycle.

It is costly than Von Neumann


It is cheaper in cost. Architecture.

CPU can not access instructions CPU can access instructions and
and read/write at the same time. read/write at the same time.

It is used in personal computers It is used in micro controllers and


and small computers. signal processing.
Difference between Von Neumann and Harvard Architecture

Feature Von Neumann Harvard Architecture


Architecture
Memory Single memory for Separate memory for
instructions and data instructions and data
Bus System Single bus used for both Separate buses for data
data and instructions and instructions
Access Instruction fetch and data Instruction fetch and data
Method access cannot occur access can occur
simultaneously simultaneously
Performance Lower due to Von Higher due to parallel
Neumann bottleneck access
Hardware Simple design More complex design
Complexity
Cost Lower Higher
Flexibility High (code and data share Lower (separate memory
memory) spaces)
Use Cases General-purpose computers Embedded systems, DSPs
Example Early computers, simple Microcontrollers, DSP
Systems CPUs processors

➢ Designing for Performance:-


In computer organization, performance refers to the speed and efficiency at which a
computer system can execute tasks and process data. A high-performing computer
system is one that can perform tasks quickly and efficiently while minimizing the
amount of time and resources required to complete these tasks.

Here are several factors that can impact the performance of a computer system,
including:
• Processor speed: The speed of the processor, measured in GHz (gigahertz), determines
how quickly the computer can execute instructions and process data.

• Memory: The amount and speed of the memory, including RAM (random access memory)
and cache memory, can impact how quickly data can be accessed and processed by the
computer.

• Storage: The speed and capacity of the storage devices, including hard drives and solid-
state drives (SSDs), can impact the speed at which data can be stored and retrieved.
• I/O devices: The speed and efficiency of input/output devices, such as keyboards , mice,
and displays, can impact the overall performance of the system.
• Software optimization: The efficiency of the software running on the system, including
operating systems and applications, can impact how quickly tasks can be completed.

Improving the performance of a computer system typically involves optimizing one or


more of these factors to reduce the time and resources required to complete tasks. This
can involve upgrading hardware components, optimizing software, and using
specialized performance-tuning tools to identify and address bottlenecks in the system.

Computer performance is the amount of work accomplished by a computer system.


The word performance in computer performance means "How well is the computer
doing the work it is supposed to do?". It basically depends on the response time,
throughput, and execution time of a computer system. Response time is the time from
the start to completion of a task. This also includes:
• Operating system overhead.

• Waiting for I/O and other processes


• Accessing disk and memory

• Time spent executing on the CPU or execution time.

• Designing for performance focuses on reducing execution time and increasing system
efficiency
• Achieved by optimizing processor speed, memory system, and architecture
• Requires a balanced design approach.
• It Depends on Microprocessor Speed, Performance Balance, Improvements in Chip
Organization and Architecture
1. Microprocessor Speed
Definition
• Microprocessor speed indicates how fast a processor executes instructions.
Key Points
• Depends on:
o Clock frequency
o Instruction execution efficiency
• Higher clock speed allows more operations per second
• Performance is also affected by Cycles Per Instruction (CPI)
• Clock speed alone does not guarantee high performance
Performance Formula
CPU Execution Time = Instruction Count × CPI × Clock Cycle Time

OR
Instruction Count × CPI
CPU Time =
Clock Rate

Ways to Improve Microprocessor Speed


• Pipelining – overlapping instruction execution
• Parallel execution units – multiple operations at once
• Efficient instruction scheduling
• Reduced CPI
• Optimized instruction set (RISC)
Advantages
• Faster execution of programs
• Higher system throughput
• Better response time
Applications
• High-performance computers
• Servers and cloud systems
• Gaming systems
• Scientific and engineering applications

2. Performance Balance
Definition
• Performance balance ensures that CPU, memory, and I/O operate efficiently
together without creating bottlenecks.
Key Points
• Avoids bottlenecks in the system
• Fast CPU with slow memory leads to poor performance
• All components must be upgraded proportionally
Techniques to Achieve Performance Balance
• Memory hierarchy
o Registers
o Cache
o Main memory
• High-speed buses
• Parallel data transfer
• Efficient I/O handling
Advantages
• Efficient utilization of hardware resources
• Reduced idle time of CPU
• Improved overall system performance
Applications
• Embedded systems
• Real-time systems
• Database servers
• Network servers

3. Improvements in Chip Organization and Architecture


Definition
• Focus on improving internal processor structure to enhance performance.
Key Points
• Enhances instruction throughput
• Improves resource utilization
• Reduces execution delays
Major Architectural Improvements
• Pipelining – overlapping instruction stages
• Cache memory – faster access to frequently used data
• RISC architecture – simple and fast instructions
• Superscalar execution – multiple instructions per cycle
• Multicore processors – parallel processing
• Branch prediction – reduces pipeline stalls
Performance Improvement Concept
• Uses parallelism instead of only increasing clock speed
• Improves efficiency with lower power consumption
Advantages
• Higher performance without excessive clock increase
• Better energy efficiency
• Improved multitasking capability
Applications
• Mobile processors
• AI and machine learning systems
• Multimedia processing
• Signal processing and DSP systems

➢ Evolution of Intel Processor Architecture (4-bit to


64-bit)
Introduction
The evolution of Intel processor architecture shows the gradual improvement in word size,
processing power, memory addressing, and architectural features. Starting from simple
4-bit processors, Intel processors evolved into powerful 64-bit multicore architectures used
in modern computing systems.

1. 4-bit Processor – Intel 4004


• First commercially available microprocessor
• Operated on 4-bit data
• Designed mainly for calculators
• Limited instruction set and memory capacity
• Very low processing speed
Importance:
Marked the beginning of microprocessor-based computing.

2. 8-bit Processors – Intel 8008 and 8080


• Operated on 8-bit data
• Supported more instructions and memory than 4-bit processors
• Used in early computers and control systems
• Intel 8080 became popular in early personal computers
Improvement over 4-bit:
• Increased data handling capacity
• Better instruction execution

3. 16-bit Processors – Intel 8086 and 8088


• Introduced 16-bit architecture
• Laid the foundation of the x86 architecture
• Supported segmented memory addressing
• Enabled execution of more complex programs
• Used in IBM personal computers
Significance:
Established compatibility standards still used in modern processors.

4. 32-bit Processors – Intel 80386 and 80486


• First Intel processors with 32-bit architecture
• Supported multitasking and virtual memory
• Intel 80486 integrated:
o Floating Point Unit (FPU)
o On-chip cache
o Instruction pipelining
Advantages:
• Higher performance
• Better memory management
• Support for advanced operating systems

5. Pentium Family (32-bit)


• Introduced superscalar architecture
• Allowed execution of multiple instructions per clock cycle
• Separate instruction and data caches
• Improved branch prediction
• Significant performance improvement over 486 processors

6. 64-bit Architecture – Intel 64


• Extended x86 architecture to 64-bit
• Supported very large memory addressing
• Improved performance and multitasking
• Used in modern processors such as Core i3, i5, i7, i9
• Supports multicore processing and advanced power management
Advantages:
• Access to more than 4 GB RAM
• Better performance for modern applications
• Enhanced security and virtualization support

Evolution Summary
• Increase in word size from 4-bit to 64-bit
• Growth in processing speed and efficiency
• Improved memory addressing capabilities
➢ Performance Assessment

Performance assessment is a systematic evaluation of how effectively a computer


system executes programs and performs tasks. It is a critical process in computer
organization and architecture, used to identify bottlenecks, optimize design, and
improve system efficiency.
The goal is to determine execution speed, throughput, and resource utilization,
ensuring that both hardware and software work efficiently together.

Performance is measured using several key metrics:


1. Execution Time (CPU Time)
o Total time taken by the CPU to execute a program.
o Depends on instruction count, CPI (cycles per instruction), and clock cycle
time.
2. CPI (Cycles Per Instruction)
o Average number of clock cycles the CPU needs to execute one instruction.
o Lower CPI indicates higher efficiency.
3. Clock Rate / Clock Frequency
o Number of clock cycles per second, typically in MHz or GHz.
o Higher clock rate allows faster instruction execution, but alone does not guarantee
higher performance.
4. Throughput
o Number of tasks or instructions completed in a given time interval.
o Important for batch processing and multi-user systems.
5. MIPS (Million Instructions Per Second)
o Measures instruction execution rate.
o Often used to compare processor speeds.
6. FLOPS (Floating Point Operations Per Second)
o Measures performance of floating-point calculations.
o Commonly used in scientific computing, simulations, and AI workloads.
7. Memory Access Time
o Time taken to read/write data from/to memory.
o Affects overall CPU performance due to dependency on data.
Performance Formulas
1. CPU Execution Time
CPU Time = Instruction Count × CPI × Clock Cycle Time
Or equivalently:
Instruction Count × CPI
CPU Time =
Clock Rate

2. CPI
Total Clock Cycles
CPI =
Total Instructions

3. Speedup (Performance Improvement)


Execution Time (old system)
Speedup =
Execution Time (new system)

4. Overall Performance
1
Performance =
Execution Time

Factors Affecting Performance


Performance is influenced by several factors:
1. Processor Architecture
o CPU word size, number of registers, pipelining, superscalar execution, branch
prediction.
2. Instruction Set
o Simple instructions (RISC) often execute faster than complex instructions (CISC).
3. Clock Rate and CPI
o Higher clock rate reduces execution time if CPI is optimized.
4. Memory System
o Memory hierarchy (registers → cache → main memory → secondary storage)
improves access times.
o Cache and virtual memory reduce CPU idle time.
5. I/O Subsystems
o Speed of I/O devices, bus bandwidth, and DMA support affect overall system
efficiency.
6. Parallelism
o Instruction-level parallelism (pipelining, superscalar)
o Thread-level and process-level parallelism (multi-core, multi-threading)
7. Software
o Efficient code and optimized compilers improve instruction execution and reduce
CPU cycles.
Methods of Performance Assessment
1. Benchmarking
o Standardized tests to evaluate CPU, memory, and system performance.
o Examples: SPEC CPU, LINPACK, Dhrystone.
2. Profiling
o Identifies program sections that consume maximum time or resources.
o Helps in software optimization.
3. Simulation
o Uses software models to predict performance of a proposed architecture.
4. Monitoring and Real-Time Measurement
o Tools like performance counters measure actual system behavior under load.

Advantages of Performance Assessment


• Identifies system bottlenecks in CPU, memory, or I/O.
• Guides hardware upgrades and architectural improvements.
• Improves resource utilization and throughput.
• Ensures efficient execution of programs and applications.
• Helps in cost-performance optimization.

Applications
• High-Performance Computing (HPC)
o Scientific simulations, weather modeling, AI/ML workloads.
• Embedded and Real-Time Systems
o Automotive, medical devices, robotics.
• Servers and Cloud Computing
o Database servers, web servers, virtualization platforms.
• Software Optimization
o Compiler and algorithm performance evaluation.
• System Design
o Helps architects design efficient pipelines, caches, and memory hierarchies.

A top level view of Computer function and interconnection


Computer Components:-
Functional Unit A computer in its simplest form comprises five functional units namely input unit,
output unit memory unit, arithmetic & logic unit and control unit. Figure 2 depicts the functional
units of a computer system.
Fig. Basic functional units of a computer

Let us discuss about each of them in brief:


1. Input Unit: Computer accepts encoded information through input unit. The standard input
device is a keyboard. Whenever a key is pressed, keyboard controller sends the code to
CPU/Memory. Examples include Mouse, Joystick, Tracker ball, Light pen, Digitizer, Scanner etc.
2. Memory Unit: Memory unit stores the program instructions (Code), data and results of
computations etc. Memory unit is classified as:
• Primary /Main Memory
• Secondary /Auxiliary Memory
Primary memory is a semiconductor memory that provides access at high speed. Run time
program instructions and operands are stored in the main memory. Main memory is classified again
as ROM and RAM. ROM holds system programs and firmware routines such as BIOS, POST, I/O
Drivers that are essential to manage the hardware of a computer. RAM is termed as Read/Write
memory or user memory that holds run time program instruction and data. While primary storage
is essential, it is volatile in nature and expensive. Additional requirement of memory could be
supplied as auxiliary memory at cheaper cost. Secondary memories are non volatile in nature.
3. Arithmetic and logic unit: ALU consist of necessary logic circuits like adder, comparator etc.,
to perform operations of addition, multiplication, comparison of two numbers etc.
4. Output Unit: Computer after computation returns the computed results, error messages, etc.
via output unit. The standard output device is a video monitor, LCD/TFT monitor. Other output
devices are printers, plotters etc.
5. Control Unit: Control unit co-ordinates activities of all units by issuing control signals. Control
signals issued by control unit govern the data transfers and then appropriate operations take place.
Control unit interprets or decides the operation/action to be performed.
The operations of a computer can be summarized as follows:
1. A set of instructions called a program reside in the main memory of computer.
2. The CPU fetches those instructions sequentially one-by-one from the main memory, decodes
them and performs the specified operation on associated data operands in ALU.
3. Processed data and results will be displayed on an output unit.
4. All activities pertaining to processing and data movement inside the computer machine are
governed by control unit.

Top-Level Functions of a Computer (Data-Oriented View)


A computer’s operation can be understood in four main functional categories:
1. Data Storage – Storing instructions and data temporarily or permanently.
o Primary Storage (RAM, Cache) – Fast, volatile memory for immediate
processing.
o Secondary Storage (HDD, SSD, Optical Disks) – Permanent storage for files and
programs.
2. Data Processing – Manipulation of data according to instructions.
o Performed by CPU, which has:
▪ ALU (Arithmetic Logic Unit): Arithmetic and logical operations.
▪ Control Unit (CU): Directs data flow and interprets instructions.
3. Data Movement (Input/Output & Buses) – Transfer of data between storage, CPU, and
external devices.
o Input Unit: Keyboard, mouse, scanner.
o Output Unit: Monitor, printer, speakers.
o Buses (Interconnections):
▪ Data bus: Transfers data.
▪ Address bus: Specifies memory/device location.
▪ Control bus: Sends read/write/control signals.
4. Control – Coordinating all operations to ensure correct execution.
o The Control Unit generates control signals to:
▪ Direct ALU operations.
▪ Manage memory read/write.
▪ Control data flow on buses.
Figure 3.2 illustrates these top-level components and suggests the interaction, among them. The
CPU exchanges data with memory. For this purpose, it typical'' makes use of two internal (to the
CPU) registers: a memory address register (MAR), which specifies the address in memory for the
next read or write, and memory buffer register (MBR), which contains the data to be written into
memory receives the data read from memory. Similarly, an I/0 address register (I/OAR specifies a
particular 1/0 device. An I/0 buffer (I/OBR) register is used for the exchange of data between an
I/0 module and the CPU. A memory module consists of a set of locations, defined by sequentially
nun bered addresses. Each location contains a binary number that can be interpreted either an
instruction or data. An 1/0 module transfers data from external devices CPU and memory, and vice
versa. It contains internal buffers for temporarily holing these data until they can be sent on. Having
looked briefly at these major components, we now turn to an over view of how these components
function together to execute programs.
The key elements of program execution. In its simplest form, instruction processing consists of
two steps: The processor reads (fetches) instructions from memory one at a time and executes each
instruction. Program execution consists of repeating the process of instruction fetch and instruction
execution. The instruction execution may involve several operations and depends on the nature of
the instruction

The processing required for a single instruction is called an instruction cycle. The two steps are
referred to as the fetch cycle and the execute cycle. Program execution halts only if the machine is
turned off, some sort of unrecoverable error occurs, or a program instruction that halts the
computer is encountered.

INSTRUCTION FETCH AND EXECUTE

At the beginning of each instruction cycle, the processor fetches an instruction from memory. In a
typical processor, a register called the program counter (PC) holds the address of the instruction to
be fetched next. The instruction fetch and execute cycle (or fetch-decode-execute) is the core
operational process of a CPU, which continuously fetches machine-level instructions from
memory, decodes them into control signals, and executes the operations to run programs. This
cycle repeats billions of times per second until the system shuts down.
The instruction cycle (or fetch-decode-execute cycle) is the fundamental process a CPU uses to
run programs, involving fetching an instruction from memory, decoding it to understand the
operation, and then executing it, repeating until halted. Key stages are Fetch (get instruction using
Program Counter (PC) into Instruction Register (IR)), Decode (interpret opcode and
operands), Execute (perform operation), and sometimes Write-back/Store (save result)
. A diagram shows these steps as a flowchart, moving from fetching to decoding, then executing,
with the cycle looping back to fetch the next instruction
.
Stages of the Instruction Cycle
1. Fetch Cycle:
• The address in the Program Counter (PC) is sent to the Memory Address
Register (MAR).
• A read signal is sent to memory.
• The instruction at that address is read into the Memory Data Register (MDR).
• The instruction from MDR moves to the Instruction Register (IR).
• The PC is incremented to point to the next instruction.
2. Decode Cycle:
• The control unit decodes the opcode (the operation part) in the IR.
• It identifies the instruction type (memory, register, I/O) and operands
(data/address).
• If it's a memory reference with indirect addressing, the effective address is fetched
from memory.
3. Execute Cycle:
• The control unit generates signals to perform the operation (e.g., addition in
the Arithmetic Logic Unit (ALU)).
• Operands are fetched if needed.
4. Write-back/Store Cycle (Optional):
• The result of the execution is written back to a register or memory.
Key Components Involved:
• Program Counter (PC): Holds the address of the next instruction.
• Memory Address Register (MAR): Stores the address in memory that the CPU wants to
access.
• Memory Data Register (MDR): Stores the data being transferred to or from memory.
• Instruction Register (IR): Holds the current instruction being decoded and executed.
• Control Unit (CU): Generates signals to manage the flow of data and control the
processor.
• Arithmetic Logic Unit (ALU): Performs calculation and logical operations.
This process is synchronized by the system clock, where faster clock speeds allow for more cycles
per second, enhancing performance.
Interconnection structure
A computer system consists of three main modules:
• CPU (Central Processing Unit)
• Main Memory
• Input / Output (I/O) Modules
These components must communicate continuously to execute programs. The collection of
communication paths that connect CPU, memory, and I/O modules is known as the
interconnection structure. The design of this structure determines how efficiently information is
exchanged within the computer system.

Definition
Interconnection Structure is the arrangement of communication pathways that allow data,
instructions, and control signals to flow between CPU, memory, and I/O devices.

Types of Data Transfers Supported


The interconnection structure supports the following transfers:
1. Memory → CPU
CPU reads instructions or data from memory.
2. CPU → Memory
CPU writes processed data or results back to memory.
3. I/O → CPU
CPU receives input data from I/O devices via I/O modules.
4. CPU → I/O
CPU sends data or control signals to output devices.
5. I/O ↔ Memory (DMA)
Using Direct Memory Access (DMA), I/O modules transfer data directly to or from
memory without CPU involvement, improving performance.

Bus interconnection :- What is a Computer Bus?


A computer bus is a communication system used to transfer data between components within a
computer or between different computers. It plays an important role in minimizing the number
of connections needed by centralizing communication over shared pathways.
• It consists of physical connections like wires, circuits, or cables.
• Components like the CPU, memory, and input/output (I/O) devices are connected through
a bus.
• It simplifies data transfer and improves efficiency.
Types Of Buses
There are three main types of buses in a computer system, which are discussed below:

1. Address Bus
A collection of wires used to identify particular location in main memory is called Address Bus. Or
in other words, the information used to describe the memory locations travels along the address
bus.
• The address bus transports memory addresses which the processor wants to access in
order to read or write data..
• The address bus is unidirectional.
• The size of address bus determines how many unique memory locations can be
addressed.
Example:
• A system with 4-bit address bus can address 24 = 16 Bytes of memory.
• A system with 16-bit address bus can address 216 = 64 KB of memory
• A system with 20-bit address bus can address 220 = 1 MB of memory.
2. Data Bus
A collection of wires through which data is transmitted from one part of a computer to another
is called Data Bus. It can be thought of as a highway on which data travels within a computer.
• The main objective of data bus is transfer of the data between microprocessor to input/
output devices or memory.
• The data bus transfers instructions coming from or going to the processor.
• The data bus is bidirectional because the data can flow in either direction from CPU to
memory(or input/output device) or from memory to the CPU.
• The size (width) of bus determines how much data can be transmitted at one time.
Example:
• A 16-bit bus can transmit 16 bits of data at a time.
• 32-bit bus can transmit 32 bits at a time.
3. Control Bus
The connections that carry control information between the CPU and other devices within the
computer is called Control Bus. The control bus transports orders and synchronization signal
coming from the control unit and travelling to all other hardware components
• The main objective of control bus is all signals controller carried from processor to other
hardware device.
• The Control bus is bidirectional because the data can flow in either direction from CPU to
memory(or input/output device) or from memory to the CPU.
• It also transmits response signals from the hardware.
Comparison Between System Buses
The below table shows the comparison between the three buses as below :

Buses Purpose & Key Role

Address Bus
Carries memory addresses; Identifies where data should go
(Unidirectional)

Data Bus (Bidirectional) Carries actual data, moves data between components

Carries control and sync signals, coordinates CPU and device


Control Bus(Bidirectional)
actions

Computer Arithmetic- The Arithmetic and Logic Unit


The Arithmetic Logic Unit (ALU) and the Data Path are core components that enable the CPU to
execute instructions and manage data efficiently. These components work together with registers
and buses to perform operations and move data across the system.
Arithmetic Logic Unit (ALU)
The ALU is a digital circuit within the CPU that performs all arithmetic and logical operations. It
takes input from registers, processes the operation, and sends the result back to a destination
register or memory.
• Performs operations like addition, subtraction, AND, OR, NOT, etc.
• Controlled by the control unit based on the instruction type

Functions and Operations of ALU

• 1. Arithmetic Operations
• ALU performs arithmetic operations to carry out basic mathematical calculations on binary
numbers.

• Operations include addition, subtraction, increment, and decrement.


• Used during instruction execution for tasks like ADD, SUB, INC, and DEC.
2. Logical Operations
• These operations manipulate data at the bit level using logic gates.
• Includes bitwise operations like AND, OR, XOR, and NOT.
• Essential for masking, setting, clearing, or toggling specific bits.

3. Shift Operations
• ALU can shift bits left or right to aid in fast arithmetic and bit manipulation.
• Types include logical shift, arithmetic shift, and rotate operations.
• Often used for multiplication/division by powers of two and bit-level data formatting.

4. Comparison Operations
• ALU supports comparison by evaluating two operands and setting appropriate flags.
• It checks for conditions like equality, greater than, or less than.
• Useful in branching and conditional instructions based on flag values.

5. Status Flag Generation


• The ALU sets flags based on the result of operations to influence program control.
• Common flags: Zero (Z), Carry (C), Sign (S), Overflow (V).
• Flags are used in conditional execution and exception handling.

ALU Inputs and Outputs


Inputs:
• Operand A (from register)
• Operand B (from register)
• Control signals (from control unit)
Outputs:
• Result
• Status flags
addition and subtraction of signed numbers
design of adder and fast adder
1. Design of Adder
An adder is a combinational digital circuit used to perform binary addition.
It is a basic component in ALU (Arithmetic Logic Unit) of processors.
There are mainly two types:
1. Half Adder
2. Full Adder

Binary arithmetic is the core operational element in every digital device, ranging from microcontrollers in
household appliances to multi-core processors in data centres. A full adder circuit lies at the heart of binary
arithmetic. It’s a combinational logic network that adds three input bits and produces a two-bit result—sum
and carry. Full adders are very simple in concept. The design of a full adder and its integration into larger
arithmetic units involves important trade-offs in terms of:
• speed
• Power
• Area
• Scalability
Therefore, engineers working with digital logic must understand how a full adder works, how it differs from
a half adder, how to build it using basic gates or hardware description languages, and how modern research
pushes its performance limits.
This article discusses a holistic view of the full adder circuit. We will discuss the theory of binary addition
and the differences between half- and full-adders. Later, we will cover several implementation strategies—
from gate-level schematics and transistor-level realisations to high-level hardware design flows for FPGAs
and ASICs. The discussion extends to multi-bit architectures, such as ripple-carry and carry-look-ahead
adders, and highlights commercial ICs as well as low-power innovations.
Binary Addition - Why Do We Need a Full Adder?
Digital systems represent numbers in base-2, where each bit can be 0 or 1. It means that a carry may be
generated during bit-by-bit addition.
The simplest adder is a half adder, which adds two single-bit inputs but cannot handle a carry-in from a
previous addition. Its output comprises a sum and a carry bit. A full adder was developed to tackle the carry
problem in multi-bit addition.
Half adder vs full adder
The main differences between a half adder and a full adder are summarised in the table below. Each keyword
entry is kept short to fit within narrow columns. In a half adder, the sum is the XOR of A and B and the
carry is the AND of A and B.
Fig 1: Comparison of a half adder and full adder circuit
However, if a carry arrives from a previous stage, the half adder cannot process it.
A full adder solves this problem by accepting an additional carry-in bit. This allows it to add three bits—
two operands and a carry—and produce a sum and carry-out, making it suitable for cascading in multi-bit
adders.
Feature Half adder Full adder
Inputs A, B A, B, Carry-in
Carry handling None Adds incoming carry
Outputs Sum and carry Sum and carry-out
Complexity Simple More complex due to extra input
Typical use Building block of full adders Multi-bit addition, digital processors
Logic description of a full adder
A full adder is a combinational circuit that adds two binary digits and a carry bit and generates a sum bit
and a carry bit. Internally, one XOR gate, three AND gates, and one OR gate connect to realise the circuit.
The operation is straightforward:
• Inputs: A, B and Cin
• Sum output (S): A ⊕ B ⊕ Cin
• Carry output (Cout): A·B + A·Cin + B·Cin
The truth table for the full adder, reproduced below, shows all eight input combinations and their
corresponding outputs:
A B C_in Sum C_out
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
We can summarize the truth table with the following Boolean expressions:
• S=A⊕B⊕Cin
• Cout=AB+ACin+BCin
Using these expressions, designers can derive logic gate implementations or optimise the circuit using
Karnaugh maps and Boolean algebra.
Implementing a Full Adder
Using half adders and basic gates
One intuitive way to build a full adder is to combine two half adders with an OR gate. When two half adder
circuits are connected, the first adds inputs A and B, and its sum is fed into a second half adder along with
the carry-in.
The two carry outputs from these half adders are ORed to produce the final carry. This modular approach
explains the relationship between half and full adders but also simplifies testing and debugging when
designing in hardware description languages (HDLs).
When implementing this structure with logic gates, each half adder uses an XOR gate for the sum and an
AND gate for the carry. The resulting full adder consists of two XOR gates, two AND gates and one OR
gate.
Universal gate implementations
Many teaching labs require building circuits from universal gates to demonstrate gate equivalence. A full
adder can be implemented using only NAND gates or only NOR gates.
A NAND-only design utilises nine NAND gates. It features two half adder equivalents and an extra NAND
to combine carries.
Fig 2: A Full Adder using NAND Gates only
A NOR-only design is the same as the NAND implementation, but designed with NOR gates.

Fig 3: A Full Adder using NOR Gates only


Ripple Carry Adder
Connecting ‘n’ full adders in series yields an n-bit ripple carry adder. The cascaded design creates a ripple
carry adder where the carry-out of each stage becomes the carry-in of the next. The carry signal “ripples”
through all stages from the least significant bit (LSB) to the most significant bit (MSB), giving the
architecture its name.
Because each stage must wait for the previous stage to compute its carry, the total propagation delay grows
linearly with the number of bits.
Fig 4: A 4-bit ripple carry adder
For example, if each full adder has a 20 ns delay, the most significant sum bit in a 4-bit ripple carry adder
becomes valid after about 60 ns because the carry must traverse three stages.
Ripple carry adders are suitable for low-cost microcontrollers, small ALUs, or teaching purposes where
speed is less critical. However, high-performance processors require faster adder architectures.
Carry Look-ahead Adder
A carry look-ahead adder (CLA) improves speed by computing carry bits in parallel rather than waiting for
them to propagate. It generates propagate (P) and generate (G) signals for each bit: a generate signal means
the bit will create a carry regardless of the incoming carry, whereas a propagate signal indicates that a carry
will be passed through.
Using these signals, the circuit derives carry bits for all stages concurrently. The resulting sum bits are then
computed using the previously calculated carries.

Fig 5: A 4-bit Carry-look ahead adder


Parallel computation dramatically reduces the overall delay. However, CLAs require extra logic to compute
P and G signals and combine them, increasing gate count, power consumption and silicon area.
multiplication of positive numbers
Booth’s Algorithm for Multiplying Binary Integers
Booth’s Algorithm is a method used in computer arithmetic to multiply signed binary numbers (positive or
negative) efficiently. It works well with numbers represented in 2’s complement form and reduces the
number of additions when the multiplier has consecutive 1s.

Basic Idea
Booth’s algorithm examines two bits at a time:
• Current least significant bit of multiplier (Q₀)
• An extra bit Q₋₁ (previous bit)
Based on these bits, the algorithm decides whether to add, subtract, or do nothing.

Registers Used
Register Purpose
A Accumulator
Q Multiplier
M Multiplicand
Q₋₁ Extra bit
Count Number of bits

Booth’s Algorithm Rules


Q₀ Q₋₁ Operation
0 0 No operation
1 1 No operation
0 1 A=A+M
1 0 A=A−M
After the operation, perform an Arithmetic Right Shift of (A, Q, Q₋₁).
Repeat the process n times (number of bits).

Algorithm Steps
1. Initialize registers
o A=0
o Q = Multiplier
o M = Multiplicand
o Q₋₁ = 0
o Count = number of bits
2. Check Q₀ and Q₋₁.
3. Perform operation according to Booth rule.
4. Perform Arithmetic Right Shift (A, Q, Q₋₁).
5. Decrease count.
6. Repeat until count = 0.
7. Final result stored in (A, Q).
Example: Multiply 7 × 3 using Booth Algorithm
Binary values:
M = 0111 (7)
Q = 0011 (3)
A = 0000
Q₋₁ = 0
Count = 4
Step Table
Step A Q Q₋₁ Operation
Initial 0000 0011 0 Start
1 1001 0011 0 A=A−M
Shift 1100 1001 1 Shift
2 1100 1001 1 No operation
Shift 1110 0100 1 Shift
3 0101 0100 1 A=A+M
Shift 0010 1010 0 Shift
4 0010 1010 0 No operation
Shift 0001 0101 0 Final
Final Result:
AQ = 00010101
Decimal value:
21
So,
7 × 3 = 21

Booth’s Algorithm for Multiplying Binary Integers (with Example and


Comments)
Booth’s Algorithm is used to multiply signed binary numbers (positive or negative) represented in 2’s
complement form.
It reduces the number of addition operations when the multiplier contains consecutive 1s.

Registers Used
Register Meaning
A Accumulator
M Multiplicand
Q Multiplier
Q₋₁ Extra bit (initially 0)
Count Number of bits
Booth’s Decision Rules
Q₀ Q₋₁ Operation
0 0 No operation
1 1 No operation
0 1 A=A+ M
1 0 A=A− M
After the operation → perform Arithmetic Right Shift (A, Q, Q₋₁).

Example: Multiply 5 × 3 using Booth’s Algorithm


Step 1: Binary Values
M = 0101 (5)
Q = 0011 (3)
A = 0000
Q₋₁ = 0
Count = 4

Step-by-Step Table
Step A Q Q₋₁ Operation Comment
Initial 0000 0011 0 — Registers initialized
1 1011 0011 0 A=A− M Q₀=1, Q₋₁=0 → subtract M
Shift 1101 1001 1 Arithmetic shift Shift A,Q,Q₋₁ right
2 1101 1001 1 No operation Q₀=1, Q₋₁=1
Shift 1110 1100 1 Shift Arithmetic shift
3 0011 1100 1 A=A+ M Q₀=0, Q₋₁=1 → add M
Shift 0001 1110 0 Shift Arithmetic shift
4 0001 1110 0 No operation Q₀=0, Q₋₁=0
Shift 0000 1111 0 Final shift End of iterations

Final Result
AQ = 00001111
Decimal value:
1111₂ = 15₁₀
So,
5 × 3 = 15

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