Assignment 1

Q1. Explain salient features of 8086 microprocessor

The 8086 micr opr ocessor is a 16-bit microprocessor developed by Intel. It has several important
features which make it powerful and efficient.
Salient Featur es:
1. 16-bit Micr opr ocessor
It can process 16-bit data at a time, which increases speed and efficiency compared to 8-bit
processors.
2. 20-bit Addr ess Bus
It has a 20-bit addr ess bus, so it can access up to 1 MB (2²⁰ bytes) of memor y.
3. Segmented Memor y Ar chitectur e
Memory is divided into segments such as:
Code Segment (CS)
Data Segment (DS)
Stack Segment (SS)
Extra Segment (ES)
This helps in efficient memory management.
4. Pipelining (Instr uction Queue)
It uses a 6-byte instr uction queue for fetching instructions in advance, which increases
execution speed. This is called pipelining.
5. Two Units (BIU & EU)
Bus Inter face Unit (BIU): Handles memory and I/O operations
Execution Unit (EU): Executes instructions
This division improves performance.
6. Suppor ts Multipr ocessing
It supports minimum and maximum modes, allowing connection with other processors.
7. Lar ge Instr uction Set
It provides a r ich set of instr uctions for arithmetic, logical, control, and string operations.

Q2. Draw and explain the functional block diagram of 8086 microprocessor
The 8086 micr opr ocessor (developed by Intel) is divided into two main functional units:
Bus Inter face Unit (BIU)
Execution Unit (EU)
Explanation of Blocks:
1. Bus Inter face Unit (BIU)
Responsible for communication with memor y and I/O devices
Generates 20-bit physical addr ess
Contains:
i. Segment Register s (CS, DS, SS, ES) → store segment addresses
ii. Instr uction Pointer (IP) → holds next instruction address
iii. Instr uction Queue (6-byte) → stores instructions for faster execution
Performs instr uction fetching
2. Execution Unit (EU)
Responsible for execution of instr uctions
Contains:
i. ALU (Ar ithmetic Logic Unit) → performs arithmetic & logical operations
ii. Gener al Pur pose Register s (AX, BX, CX, DX)
iii. Pointer & Index Register s (SP, BP, SI, DI)
iv. Flag Register → stores status flags
v. Instr uction Decoder → decodes instructions
Wor king:
BIU fetches instr uctions and stores them in queue
EU takes instr uctions fr om queue, decodes, and executes
This parallel operation is called pipelining, improving speed

Q3. Describe 8086 architecture with EU and BIU

The 8086 micr opr ocessor (developed by Intel) has an advanced architecture divided into two main
parts:
Execution Unit (EU)
Bus Inter face Unit (BIU)
This division improves speed by allowing par allel pr ocessing.
1. Bus Inter face Unit (BIU)
The BIU is responsible for all exter nal oper ations such as memory and I/O access.
Components of BIU:
i. Segment Register s: CS, DS, SS, ES
ii. Instr uction Pointer (IP): Holds address of next instruction
iii. 6-byte Instr uction Queue: Stores fetched instructions
iv. Addr ess Gener ation Unit: Forms 20-bit physical address
Functions:
i. Fetches instructions from memory
ii. Calculates physical address using segmentation
iii. Transfers data between memory and EU
2. Execution Unit (EU)
The EU is responsible for executing instr uctions.
Components of EU:
i. ALU (Ar ithmetic Logic Unit)
ii. Gener al Pur pose Register s: AX, BX, CX, DX
iii. Pointer & Index Register s: SP, BP, SI, DI
iv. Flag Register : Stores status flags
v. Instr uction Decoder & Contr ol Unit
Functions:
i. Decodes and executes instructions
ii. Performs arithmetic and logical operations
iii. Updates flag register based on results
Wor king of Ar chitectur e:
i. BIU fetches instr uctions and stores them in queue
ii. EU executes instr uctions from the queue
iii. Both units work simultaneously (pipelining) to increase speed
 Q4. Explain the concept of pipelining in 8086 microprocessor
The 8086 micr opr ocessor (developed by Intel) uses a technique called pipelining to improve
execution speed.
Concept of Pipelining:
Pipelining is a process in which instr uction fetching and instr uction execution ar e
done simultaneously.
While one instruction is being executed, the next instruction is fetched from memory
at the same time.
This overlapping of operations increases the overall speed of the processor.
How it wor ks in 8086:
The 8086 is divided into:
Bus Inter face Unit (BIU) → Fetches instructions
Execution Unit (EU) → Executes instructions
The BIU stores fetched instructions in a 6-byte instr uction queue
The EU takes instructions from this queue and executes them

Q5. Describe register organization of 8086 microprocessor

The 8086 micr opr ocessor (by Intel) has a set of 14 r egister s, each of 16-bit, used for data storage,
addressing, and control operations.

Types of Register s:
1. Gener al Pur pose Register s
AX (Accumulator ) → arithmetic operations
BX (Base Register ) → base addressing
CX (Count Register ) → loop and counter operations
DX (Data Register ) → I/O operations
�� Each can be divided into AH (high) and AL (low)

2. Segment Register s
CS (Code Segment) → stores code address
DS (Data Segment) → stores data
SS (Stack Segment) → stack operations
ES (Extr a Segment) → extra data storage

3. Pointer and Index Register s

SP (Stack Pointer ) → points to top of stack
BP (Base Pointer ) → used in stack access
SI (Sour ce Index) → source data
DI (Destination Index) → destination data

4. Special Register s
IP (Instr uction Pointer ) → next instruction address
Flag Register → stores status flags (carry, zero, sign, etc.)

Q6. Explain memory segmentation in 8086 microprocessor

The 8086 micr opr ocessor (developed by Intel) uses memor y segmentation to organize and access
its 1 MB memor y efficiently.

Concept of Memor y Segmentation:

The total memory (1 MB) is divided into smaller par ts called segments
Each segment is of maximum 64 KB size
Segmentation helps in efficient memor y management and pr ogr am execution
Types of Memor y Segments:
Code Segment (CS)
Stores program instructions
Used with Instr uction Pointer (IP)
Data Segment (DS)
Stores data variables
Stack Segment (SS)
Used for stack operations (push/pop)
Works with SP (Stack Pointer )
Extr a Segment (ES)
Used for additional data storage

Addr ess Calculation:

�� Physical Addr ess = Segment Addr ess × 10H + Offset
Segment register gives base addr ess
Offset gives location inside segment
This forms a 20-bit physical addr ess

Advantages of Memor y Segmentation:

i. Allows access to lar ge memor y (1 MB)
ii. Improves pr ogr am or ganization
iii. Supports modular pr ogr amming
iv. Enables efficient memor y utilization

Q7. Explain the pin diagram of 8086 microprocessor

The 8086 micr opr ocessor (by Intel) is a 40-pin IC. These pins are used for data tr ansfer , addr ess,
contr ol, and power supply.

Classification of Pins (Shor t Explanation):

1. Addr ess/Data Pins
AD0–AD15 → Multiplexed lines (carry both address & data)
A16–A19 → Higher address lines
BHE → Enables higher byte of data
2. Contr ol Pins
RD (Read) → Reads data from memory
WR (Wr ite) → Writes data to memory
M/IO → Selects memory or I/O operation
ALE → Separates address from data
DT/R & DEN → Control data direction and enable

3. Inter r upt Pins

INTR → General interrupt request
INTA → Interrupt acknowledgment
NMI → High-priority interrupt

4. Timing & Contr ol Pins

READY → Indicates device is ready
TEST → Used with WAIT instruction
CLK → Provides clock signal
RESET → Restarts the processor

5. Power Supply Pins

VCC → +5V power supply
GND → Ground

Assignment 2
Q1. Explain the steps involved in program development using assembly language
The development of an assembly language program involves the following steps:

1. Pr oblem Definition
Clearly understand the problem
Identify inputs, outputs, and objectives

2. Pr oblem Analysis
Analyze the requirements and constraints
Decide how the solution can be implemented

3. Algor ithm
Prepare a step-by-step pr ocedur e to solve the problem

4. Logic Design
Develop the logic using flowchar t or str uctur ed steps
Helps in better understanding of program flow

5. Initialization Checklist
Initialize segment r egister s (DS, SS, etc.)
Set stack and required registers
Prepare system before execution

6. Choosing Instr uctions

Select appropriate 8086 instr uctions (data transfer, arithmetic, control)
Ensure efficient and correct instruction selection

7. Conver ting Algor ithm to ALP

Write the final Assembly Language Pr ogr am (ALP)
Use proper syntax, mnemonics, and directives
 Q2. Describe the role of editor, assembler, linker, debugger in assembly
language programming
In assembly language pr ogr amming, different tools are used to develop and execute a program
efficiently.

1. Editor
Used to wr ite and edit the assembly language program
The program is written using mnemonics and syntax
Example: Notepad, Notepad++

2. Assembler
Converts assembly language pr ogr am (ALP) into machine code (object file)
Checks for syntax er r or s and displays them

3. Linker
Combines multiple object files into a single executable file
Resolves addresses of variables and functions

4. Debugger
Used to test and debug the pr ogr am
Helps to find and correct errors
Allows step-by-step execution and checking register values

Q3. Explain the role of initialization checklist in 8086 assembly language

programming
The initialization checklist in 8086 assembly language pr ogr amming refers to the important
steps performed befor e execution of a pr ogr am to ensure correct operation.

Role of Initialization Checklist:

i. Segment Initialization
a) Load proper values into segment r egister s (CS, DS, SS, ES)
b) Ensures correct memory access
ii. Register Initialization
a) Initialize general-purpose registers (AX, BX, etc.) if required
iii. Stack Initialization
a) Set Stack Segment (SS) and Stack Pointer (SP)
b) Required for proper stack operations
iv. Data Setup
a) Load initial data values into memory or registers
v. Flag Setup (if needed)
a) Ensure flags are in proper state for execution

Q4. Describe converting algorithm into assembly language programming.

Converting an algor ithm into an Assembly Language Pr ogr am (ALP) is the process of
translating step-by-step logic into 8086 instr uctions.

Steps Involved:
i. Under stand the Algor ithm
Study each step carefully
Identify operations like input, processing, and output
 ii. Select Suitable Instr uctions
Choose appropriate 8086 instr uctions (MOV, ADD, SUB, etc.)
Map each algorithm step to an instruction

iii. Assign Register s/Memor y

Decide which r egister s (AX, BX, etc.) or memory locations to use
Store data properly

iv. Wr ite Instr uctions Sequentially

Convert each step of algorithm into assembly statements
Maintain correct order of execution

v. Use Labels and Contr ol Statements

Use labels for loops and branching
Apply instructions like J MP, LOOP, J Z

vi. Add Comments and Dir ectives

Use comments for clarity
Include assembler directives if needed

Q5. Explain assembler directives with suitable example

Assembler dir ectives are instructions given to the assembler to contr ol the assembly pr ocess.
They do not generate machine code but help in organizing the program.

Types of Assembler Dir ectives:

1. Defining Data
Used to define and initialize data in memory
Example:
NUM DB 25H
VALUE DW 1234H
Here, DB (Define Byte) and DW (Define Wor d) are used

2. Allocating Memor y
Used to reserve memory space for variables
Example:
ARR DB 10 DUP(?)
This allocates 10 bytes of memor y

3. Contr olling Assembly Flow

Used to control program structure and segments
Examples:
.DATA
.CODE
END
ASSUME CS:CODE, DS:DATA
Q6. Explain any two assembler directives used in 8086
1. DB (Define Byte)
Used to define 8-bit data
Example:
NUM DB 20H

2. .DATA Dir ective

Used to define the data segment
Example:
.DATA
NUM DB 10H

Assignment 3

Q1. Identify addressing modes

i) MOV AL, 46H
�� Immediate Addr essing Mode
(Data is directly given in instruction)

ii) MOV BX, [1234H]

�� Dir ect Addr essing Mode
(Effective address is directly specified)

iii) ADD AX, BX

�� Register Addr essing Mode
(Both operands are registers)

iv) MOV AL, [SI]

�� Register Indir ect Addr essing Mode
(Address is stored in SI register)

v) ADD AL, [BX][SI]

�� Indexed Based Addr essing Mode
(Address = BX + SI)

vi) MOV AX, 60H [BX][SI]

�� Based Indexed with Displacement Addr essing Mode
(Address = BX + SI + 60H)

Q2. Explain DAA and CMP instruction

1. DAA (Decimal Adjust Accumulator )
Used after BCD addition
Adjusts result in AL to valid BCD number
Example:
ADD AL, BL
DAA
2. CMP (Compar e)
Compares two operands
Performs subtraction but does not stor e r esult
Only updates flag r egister
Example:
CMP AX, BX
Q3. Calculate Physical Address
�� Formula:
Physical Addr ess = Segment × 10H + Offset

i) CS = 4200H, IP = CE00H
= 4200H × 10H = 42000H
= 42000H + CE00H
�� Physical Addr ess = 4EE00H

ii) SS = FE00H, SP = 0456H

= FE00H × 10H = FE000H
= FE000H + 0456H
�� Physical Addr ess = FE456H

iii) DS = 2F00H, BX = 1A00H

= 2F00H × 10H = 2F000H
= 2F000H + 1A00H
�� Physical Addr ess = 30A00H

Q4. Explain instructions

1. DAS (Decimal Adjust after Subtr action)
Adjusts AL after BCD subtraction
Converts result into valid BCD

2. XLAT
Used for table lookup
Replaces AL with value from memory
Uses BX as base address

3. XCHG
Exchanges contents of two registers
Example:
XCHG AX, BX

Assignment 4

Q1. ALP to find sum of series of 6 numbers

DATA SEGMENT
ARR DB 10H, 20H, 30H, 40H, 50H, 60H
SUM DB ?
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

MOV CX, 06H ; counter = 6

 LEA SI, ARR
MOV AL, 00H ; sum = 0

NEXT:
ADD AL, [SI]
INC SI
LOOP NEXT

MOV SUM, AL

MOV AH, 4CH

INT 21H
CODE ENDS
END START

Q2. ALP to find smallest number in array

DATA SEGMENT
ARR DB 25H, 10H, 40H, 05H, 30H
N DB 05H
SMALL DB ?
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

LEA SI, ARR

MOV CL, N
MOV AL, [SI] ; assume first is smallest

DEC CL
INC SI

NEXT:
CMP AL, [SI]
JC SKIP
MOV AL, [SI]

SKIP:
INC SI
DEC CL
JNZ NEXT

MOV SMALL, AL

MOV AH, 4CH

INT 21H
CODE ENDS
END START
Q3. ALP to arrange array in ascending order (Bubble Sort)
DATA SEGMENT
ARR DB 05H, 02H, 09H, 01H, 07H, 03H, 08H, 06H, 04H, 00H
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

MOV CX, 09H

OUTER:
LEA SI, ARR
MOV DX, CX

INNER:
MOV AL, [SI]
CMP AL, [SI+1]
JBE SKIP

XCHG AL, [SI+1]

MOV [SI], AL

SKIP:
INC SI
DEC DX
JNZ INNER

DEC CX
JNZ OUTER

MOV AH, 4CH

INT 21H
CODE ENDS
END START
Flowchar t (Sor ting)

Q4. ALP for multiplication of two 8-bit signed numbers

DATA SEGMENT
NUM1 DB -05H
NUM2 DB 03H
RES DW ?
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

MOV AL, NUM1

MOV BL, NUM2

IMUL BL ; signed multiplication

MOV RES, AX
 MOV AH, 4CH
INT 21H
CODE ENDS
END START

Q5. ALP for block transfer of 10 numbers

DATA SEGMENT
SRC DB 10 DUP(01H)
DEST DB 10 DUP(?)
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

LEA SI, SRC

LEA DI, DEST
MOV CX, 0AH

NEXT:
MOV AL, [SI]
MOV [DI], AL
INC SI
INC DI
LOOP NEXT

MOV AH, 4CH

INT 21H
CODE ENDS
END START

Q6. ALP to add two 8-bit BCD numbers

DATA SEGMENT
NUM1 DB 25H
NUM2 DB 37H
RES DB ?
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

MOV AL, NUM1

ADD AL, NUM2
DAA ; BCD adjust
 MOV RES, AL

MOV AH, 4CH

INT 21H
CODE ENDS
END START

Q7. ALP for concatenation of two strings

DATA SEGMENT
STR1 DB 'HELLO','$'
STR2 DB 'WORLD','$'
RES DB 20 DUP('$')
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

LEA SI, STR1

LEA DI, RES

COPY1:
MOV AL, [SI]
CMP AL, '$'
JE NEXT
MOV [DI], AL
INC SI
INC DI
JMP COPY1

NEXT:
LEA SI, STR2

COPY2:
MOV AL, [SI]
CMP AL, '$'
JE ENDPROG
MOV [DI], AL
INC SI
INC DI
JMP COPY2

ENDPROG:
MOV AH, 4CH
INT 21H
CODE ENDS
END START
 Assignment 5

Q1. Explain Macro with suitable example

A macr o is a group of instructions defined once and can be used multiple times in a program.
Defined using MACRO and ENDM
It is expanded inline during assembly (no call/return)
Example:
ADD2 MACRO A, B
MOV AL, A
ADD AL, B
ENDM

START:
ADD2 10H, 20H

Q2. Re-entrant and Recursive Procedure

1. Re-entr ant Pr ocedur e
Can be used by multiple pr ogr ams at same time
Does not modify shared data
Example: Interrupt service routine

2. Recur sive Pr ocedur e

A procedure that calls itself
Requires stack to store return addresses
Example:
FACT PROC
CALL FACT
RET
FACT ENDP

Q3. List directives used for MACRO

MACRO → to define macro
ENDM → end of macro
LOCAL → defines local labels
EXITM → exit from macro

Q4. ALP using procedure: Z = (A+B)*(C+D)

DATA SEGMENT
A DB 02H
B DB 03H
C DB 04H
D DB 05H
Z DW ?
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
 MOV DS, AX

CALL CALC

MOV AH, 4CH

INT 21H

CALC PROC
MOV AL, A
ADD AL, B

MOV BL, C
ADD BL, D

MUL BL
MOV Z, AX
RET
CALC ENDP

CODE ENDS
END START

Q5. ALP using macro: Z = (A+B)*(C+D)

DATA SEGMENT
A DB 02H
B DB 03H
C DB 04H
D DB 05H
Z DW ?
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

CALC MACRO
MOV AL, A
ADD AL, B

MOV BL, C
ADD BL, D

MUL BL
MOV Z, AX
ENDM

START:
MOV AX, DATA
MOV DS, AX

CALC

MOV AH, 4CH

INT 21H
CODE ENDS
END START
Q6. ALP using macro for arithmetic operations
ADDN MACRO A, B
MOV AL, A
ADD AL, B
ENDM

SUBN MACRO A, B
MOV AL, A
SUB AL, B
ENDM

MULN MACRO A, B
MOV AL, A
MOV BL, B
MUL BL
ENDM

DIVN MACRO A, B
MOV AL, A
MOV BL, B
DIV BL
ENDM

START:
ADDN 10H, 05H
SUBN 10H, 05H
MULN 10H, 05H
DIVN 10H, 05H

Q7. Difference between Macro and Procedure

Macr o Pr ocedur e
Expanded inline Called using CALL
Faster execution Slower (CALL/RET)
No stack required Uses stack
Code size increases Code size smaller
Defined using MACRO Defined using PROC