Microprocessor
Microprocessor
1. Arithmetic Operations
Examples:
2. Logical Operations
Examples:
3. Data Handling
Data handling involves moving, storing, and retrieving data within the
computer system. The microprocessor transfers data between memory,
registers, and input/output devices to ensure proper functioning of the system.
Examples:
● Fetching data or webpages from a server
4. Control Operations
Examples:
5. Instruction Execution
Examples:
6. Interrupt Handling
Examples:
7. Power Management
Examples:
· Clock speed
· Instruction set
· Word size
a) Clock Speed:
Every microprocessor has an internal clock that regulates the speed at which it
executes instructions. The speed at which the microprocessor executes instructions
is called the clock speed. Clock speed is measured in MHz (Mega Hertz) or in GHz
(Giga Hertz).
b) Instruction Set:
A command which is given to a computer to perform an operation on data is called
an instruction. Basic set of machine level instructions that a microprocessor is
designed
to execute is called as an instruction set. This instruction set carries out the following
types of operations:
• Data transfer
• Arithmetic operations
• Logical operations
• Control flow
• Input/output
c) Word Size:
The number of bits that can be processed by a processor in a single instruction is
called its word size. Word size determines the amount of RAM that can be accessed
by a
microprocessor at one time and the total number of pins on the microprocessor. Total
number of input and output pins in turn determines the architecture of the
microprocessor.
Structure It is a single chip that includes It is the central part of the computer
ALU, control unit, and that may consist of multiple
registers. components including the
microprocessor.
Relationship A microprocessor acts as the CPU is the functional unit, while the
CPU of a computer when microprocessor is the hardware
implemented on a single chip. implementation of it.
Instruction Uses a small and simple set of Uses a large and complex set of
Set instructions instructions
It tells the processor what task to perform and how to perform it. Instructions are
stored in the computer's memory and are executed by the processor one by one.
In this operation, data is transferred from one register to another register inside the
processor.
Example:
MOV A, B → Data from register B is moved to register A.
Example:
MOV M, A → Data from register A is stored in a memory location.
Example:
MOV A, M → Data from memory location M is moved to register A.
Example:
MVI A, 25H → The value 25H is loaded directly into register A.
Example:
IN and OUT instructions used for communication with peripherals.
The BIU is responsible for all communication between the microprocessor and
memory or I/O devices.
Functions of BIU:
Components of BIU:
Functions of EU:
● Decodes instructions.
Components of EU:
● General Purpose Registers: AX, BX, CX, DX used for data operations.
● Pointer and Index Registers: SP, BP, SI, DI used for memory addressing.
9. Explain why 8086 architecture is divided into BIU and EU.
Ans:The architecture of 8086 is divided into two functional parts i.e.
(i) Execution unit (EU)
(ii) Bus interface unit (BIU)
These two units work asynchronously.
Functional division of architecture speeds up the processing, since BIU and EU
operate parallel and independently i.e., EU executes the instructions and BIU fetches
another instruction from the memory simultaneously. As the whole architecture is
divided into two independent functional parts and both the subsystem’s operations
can be overlapped, hence the architecture is PIPELINING type of architecture.
The execution unit informs the BIU of the processor regarding from where to fetch
the instructions from and then executes these instructions. The BIU handles transfer
of data and address between the processor and memory /I /O devices by computing
address (Physical/ Effective address) and send the computed address to memory / I/
0 and fetches instruction codes then stores them in FIFO register set called Queue
register. The BIU also relocates the addresses of the un relocated operands and
reads/writes data from/to memory / I/ O devices.
10. Describe the general purpose registers of 8086.
Ans: There are 8 general-purpose registers in the 8086 microprocessor.
1. AX:This is the accumulator. It is of 16 bits and is divided into two 8-bit registers AH
and AL to also perform 8-bit instructions. It is generally used for arithmetical and
logical instructions but in 8086 microprocessor it is not mandatory to have an
accumulator as the destination operand.
● Type: 16-bit
● Divided into: AH (high byte) and AL (low byte)
● Primary Use: Arithmetic, logic operations, and I/O operations.
● Example:
2. BX: This is the base register. It is of 16 bits and is divided into two 8-bit registers
BH and BL to also perform 8-bit instructions. It is used to store the value of the
offset.
● Type: 16-bit
● Divided into: BH (high) and BL (low)
● Primary Use: Stores offsets for memory addressing.
● Example:
Explanation: BX can point to memory locations, making it useful for accessing data
arrays and tables.
3. CX: This is the counter register. It is of 16 bits and is divided into two 8-bit
registers CH and CL to also perform 8-bit instructions. It is used in looping and
rotation.
● Type: 16-bit
● Divided into: CH (high) and CL (low)
● Primary Use: Loop counters, string operations, and rotations.
● Example:
MOV CX, 5
LOOP_START:
; Some operation
LOOP LOOP_START ; Decrements CX and jumps if CX ≠ 0
4. DX: This is the data register. It is of 16 bits and is divided into two 8-bit registers
DH and DL to also perform 8-bit instructions. It is used in the multiplication and
input/output port addressing.
● Type: 16-bit
● Divided into: DH (high) and DL (low)
● Primary Use: Multiplication/division, I/O port addressing, extended
arithmetic.
● Example:
● Type: 16-bit
● Primary Use: Points to the top of the stack in memory.
● Example:
● Type: 16-bit
● Primary Use: Access parameters passed through the stack (especially in
function calls).
● Example:
● Type: 16-bit
● Primary Use: Pointer to source data in memory for string and array
operations.
● Example:
● Type: 16-bit
● Primary Use: Pointer to destination memory for string and array
operations.
● Example:
(i) Zero Flag (Z): After any arithmetical or logical operation if the result is 0 (00) H, the zero
flag becomes set i.e. 1, otherwise it becomes reset i.e. 0. 00H zero flag is 1.
from 01 H to FFH zero flag is 0.
1 zero result
0 non-zero result
(ii) Auxiliary Cary Flag (AC): This flag is used in BCD number system (0-9). If after any
arithmetic or logical operation D(3) generates any carry and passes on to B(4) this flag
becomes set i.e. 1, otherwise it becomes reset i.e. 0. This is the only flag register which is not
accessible by the programmer 1-carry out from bit 3 on addition or borrow into bit 3 on
subtraction 0 otherwise.
(iii) Parity Flag (P): If after any arithmetic or logical operation the result has even parity, an
even number of 1 bits the parity register becomes set i.e.1, otherwise it becomes reset i.e. 0, 1
accumulator has even number of 1 bits 0-accumulatorhas odd parity.
(iv) Carry Flag (CY): Carry is generated when performing n bit operations and the result is
more than n bits, then this flag becomes set i.e. 1, otherwise it becomes reset i.e. 0.
During subtraction (A-B), if A > B it becomes reset and if (A < B) it becomes set.
Carry flag is also called borrow flag. 1-carry out from MSB bit, on addition or borrow into
MSB bit on subtraction.
0 - no carry out or borrow into MSB bit.
(v) Overflow Flag (O): This flag will be set (1) if the result of a signed operation is too large
min in the number of bits available to represent it, otherwise reset (0). After any operation, if
D [6] generates any carry and passes to D [7] OR if D [6] does not generates carry but D [7]
generates, overflow flag becomes set, i.e., 1. If D [6] and D [7] both generate carry or both do
not generate any carry, then overflow flag becomes reset, i.e., 0.
Control Flags: The control flags enable or disable certain operations of the microprocessor.
There are 3 control flags in 8086 microprocessor and these are:
(i) Directional Flag (D): This flag is specifically used in string instructions. If directional
flag is set (1), then access the string data from higher memory location towards lower
memory location. If directional flag is reset (0), their access the string data from lower
memory location towards higher memory location.
(ii) Interrupt Flag (I): This flag is for interrupts.
If interrupt flag is set (1), the microprocessor will recognize interrupt requests from the
peripherals if interrupt flag is reset (0), the microprocessor will not recognize any interrupt
requests and will ignore them.
(iii) Trap Flag (T): This flag is used for on-chip debugging. Setting trap flag puts the
microprocessor into single step mode for debugging. In single stepping the microprocessor
executes a instruction and enters into single step ISR. If trap flag is set (1), the CPU
automatically generates an internal interrupt after each instruction, allowing a program to be
inspected as it executes instruction by instruction.
The Code Segment register holds the base address of the code segment, where the
program instructions are stored, while the Instruction Pointer contains the offset
address of the next instruction within that segment. By combining the values of CS
and IP, the processor can determine the exact physical address of the instruction in
memory.
For example, if CS = 4321H and IP = 1000H, then the physical address is calculated
as:
CS × 10H = 43210H
Physical Address = 43210H + 1000H = 44210H
Thus, the Instruction Pointer plays an important role in controlling the sequence of
instruction execution in the 8086 microprocessor.
13. Describe the status register of 8086.
Ans: The Status Register in the 8086 microprocessor is a part of the 16-bit Flag
Register. It contains flags that indicate the status of the result after arithmetic and
logical operations performed by the processor. These flags help the processor make
decisions during program execution.
The Carry Flag indicates whether a carry or borrow occurs during arithmetic
operations. It is set to 1 when a carry is generated from the most significant bit,
otherwise it is reset to 0.
The Parity Flag indicates whether the number of 1s in the result is even or odd. The
flag is set when the result contains even parity.
The Auxiliary Carry Flag indicates a carry from bit 3 to bit 4 during arithmetic
operations. It is mainly used in BCD (Binary Coded Decimal) arithmetic operations.
The Zero Flag is set when the result of an operation becomes zero. If the result is
not zero, the flag is cleared.
The Sign Flag indicates the sign of the result. It is set when the result is negative and
cleared when the result is positive.
The Overflow Flag indicates that the result of a signed arithmetic operation exceeds
the capacity of the register.
Conclusion
Thus, the status register helps the microprocessor identify the result of arithmetic
and logical operations and control program execution based on these conditions.
14. Discuss A-bus, B-bus and C-bus in 8086.
Ans:
In the 8086 microprocessor, internal data transfer between registers and the
Arithmetic Logic Unit (ALU) is carried out through three internal buses called A-Bus,
B-Bus, and C-Bus. These buses help in performing arithmetic and logical operations
efficiently.
i. A-Bus
The A-Bus is used to transfer data from one of the registers to the first input of the
ALU. It carries one operand required for arithmetic or logical operations.
Function:
ii. B-Bus
The B-Bus transfers data from another register to the second input of the ALU. It
provides the second operand needed for the operation.
Function:
iii. C-Bus
The C-Bus is used to transfer the result produced by the ALU back to the registers.
Function:
● Transfers the result of arithmetic or logical operations from the ALU to the
destination register.
Conclusion
Thus, the A-Bus and B-Bus supply input data to the ALU, while the C-Bus transfers
the result from the ALU back to the registers, enabling efficient data processing
inside the 8086 microprocessor.
B bus: B-bus has no true name but the function of the adder ALU is to
add the shifted 16-bits (Starting Address of 64 Kbyte segment) CS
(Code Segment) to the 16-bits IP(Instruction Pointer Offset into CS for
next instruction) to get the 20-bit Physical Address. The right side of
both diagrams allows the segment registers to be accessed B-bus’s
name would be offset bus.
C bus: C-Bus is the internal 20-bit address bus, 16-bit data bus, and
possibly control
lines of the BIU [Link] bus is bidirectional, because same bus is
used for data transmission from microprocessor to memory location or
input/output device and vice-versa.
It uses 5V DC supply at VCC pin 40, and uses ground at VSS pin 1 and 20
for its operation.
Clock signal
Address/data bus
Address/status bus
S7/BHE
BHE stands for Bus High Enable. It is available at pin 34 and used to
indicate the transfer of data using data bus D8-D15. This signal is low
during the first clock cycle, thereafter it is active.
Read(RD):
Ready:
RESET:
INTR:
TEST:
This signal is like wait state and is available at pin 23. When this signal is
high, then the processor has to wait for IDLE state, else the execution
continues.
MN/MX:
INTA:
ALE:
It stands for address enable latch and is available at pin 25. A positive
pulse is generated each time the processor begins any operation. This
signal indicates the availability of a valid address on the address/data
lines.
DEN:
It stands for Data Enable and is available at pin 26. It is used to enable
Transreceiver 8286. The transreceiver is a device used to separate data
from the address/data bus.
DT/R:
M/IO:
This signal is used to distinguish between memory and I/O operations.
When it is high, it indicates I/O operation and when it is low indicates the
memory operation. It is available at pin 28.
WR:
It stands for write signal and is available at pin 29. It is used to write the
data into the memory or the output device depending on the status of
M/IO signal.
HLDA:
It stands for Hold Acknowledgement signal and is available at pin 30. This
signal acknowledges the HOLD signal.
HOLD:
This signal indicates to the processor that external devices are requesting
to access the address/data buses. It is available at pin 31.
These are queue status signals and are available at pin 24 and 25. These
signals provide the status of instruction queue. Their conditions are shown
in the following table −
0 0 No operation
These are the status signals that provide the status of operation, which is
used by the Bus Controller 8288 to generate memory & I/O control
signals. These are available at pin 26, 27, and 28. Following is the table
showing their status −
S2 S1 S0 Status
0 0 0 Interrupt acknowledgement
0 0 1 I/O Read
0 1 0 I/O Write
0 1 1 Halt
1 0 0 Opcode fetch
1 0 1 Memory read
1 1 0 Memory write
1 1 1 Passive
LOCK:
When this signal is active, it indicates to the other processors not to ask
the CPU to leave the system bus. It is activated using the LOCK prefix on
any instruction and is available at pin 29.
The segmented memory system was used to expand the 64KB limit on
first-generation flat address space. Computers made prior to segmented memory
used a flat addressing system based on a four-digit hexadecimal code. With
hexadecimal, the highest 4-digit number you can create
is FFFF (or 65535), which equals 64KB.
Logical Address: A logical address is generated by the CPU while a program runs.
It represents the address from the process’s perspective and does not exist
physically, hence it is also called a virtual address.
Physical Address: A physical address is the real location in main memory (RAM)
where data or instructions are stored. The physical address space consists of all
physical addresses corresponding to logical addresses.
Example
MOV CX, 4929 H, ADD AX, 2387 H, MOV AL, FFH
Register addressing mode:
It means that the register is the source of an operand for an instruction.
Example:
MOV CX, AX ;
copies the contents of the 16-bit AX register into;
the 16-bit CX register),
ADD BX, AX
Example
MOV AX, [BX]; suppose the register BX contains 4895H, then the contents; 4895H
are moved to AX
ADD CX, {BX}
Example
MOV DX, [BX+04], ADD CL, [BX+08]
Example
MOV BX, [SI+16], ADD AL, [DI+16]