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Week 6

The document outlines an assignment for a Digital Electronics course at IIT Kharagpur, consisting of multiple-choice questions (MCQs) covering topics such as XS-3 subtraction, Gray code conversion, odd-parity error detection, Hamming code encoding, binary multiplication, and comparator configurations. Each question includes a correct answer and a detailed solution explaining the reasoning behind it. The assignment aims to assess students' understanding of digital electronics concepts and their application.

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0% found this document useful (0 votes)
3 views10 pages

Week 6

The document outlines an assignment for a Digital Electronics course at IIT Kharagpur, consisting of multiple-choice questions (MCQs) covering topics such as XS-3 subtraction, Gray code conversion, odd-parity error detection, Hamming code encoding, binary multiplication, and comparator configurations. Each question includes a correct answer and a detailed solution explaining the reasoning behind it. The assignment aims to assess students' understanding of digital electronics concepts and their application.

Uploaded by

priyanshukr1528
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

NPTEL Online Certification Courses

Indian Institute of Technology Kharagpur

Digital Electronics
Assignment- Week 6
TYPE OF QUESTION: MCQ/MSQ
Number of questions: 10 Total mark: 10 X 1 = 10
____________________________________________________________________________
QUESTION 1:
Perform the following substractions in XS-3, (i) 267 – 175 (ii) 57.6 – 27.8
a) 0011 1100 0101, 1100 0001 .0100
b) 0011 1100 0101, 0101 1110 .1011
c) 0101 1110 1011, 0101 1110 .1011
d) 1100 0101 1010, 0101 1010 .0011
Correct Answer: b

Detailed Solution:

(i) 267 0101 1001 1010 (267 in XS-3)


-175 -0100 1010 1000 (175 in XS-3)
092 0000 1111 0010 (Correct 0010 and 0000 by adding 0011)
+0011 -0011 +0011 (Correct 0010 and 0000 by adding 0011)
0011 1100 0101
(ii) 57.6 1000 1010 .1001 (57.6 in XS-3)
-27.8 -0101 1010 .1011 (27.8 in XS-3)
29.8 0010 1111 .1110
+0011 -0011 .0011
0101 1110 .1011 (Corrected difference in XS-3)

______________________________________________________________________

QUESTION 2:
Convert the Gray code 1101 to binary.
a) 1111
b) 1100
c) 1011
d) 1001
Correct Answer: d
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

Detailed Solution:

𝐵𝐵3 = 𝐺𝐺3 =1

𝐵𝐵2 = 𝐵𝐵3 ⊕ 𝐺𝐺2 =0

𝐵𝐵1 = 𝐵𝐵2 ⊕ 𝐺𝐺1 =0

𝐵𝐵0 = 𝐵𝐵1 ⊕ 𝐺𝐺0 =1. So, the equivalent binary is 1001.

_____________________________________________________________________

QUESTION 3:
In an odd-parity scheme, which of the following words contain an error?
I. 10110111
II. 10011010
III. 11101010
a. I, II only
b. II and III only
c. I, III only
d. All of the above

Correct answer: a

Detailed solution:

I. The number of 1s in the word is even (6). So, this word has an error.
II. The number of 1s in the word is even (4). So, this word has an error.
III. The number of 1s in the word is odd (5). Therefore, there is no error.

_____________________________________________________________________

QUESTION 4:
Encode data bits (MSB to LSB) 0011 into the 7-bit even-parity Hamming code (MSB to LSB).

Correct Answer: 0011110

Detailed Solution:

The bit pattern is


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Indian Institute of Technology Kharagpur

𝑫𝑫𝟕𝟕 𝑫𝑫𝟔𝟔 𝑫𝑫𝟓𝟓 𝑷𝑷𝟒𝟒 𝑫𝑫𝟑𝟑 𝑷𝑷𝟐𝟐 𝑷𝑷𝟏𝟏


0 0 1 1
Bits 1, 3, 5, 7 must have even parity. So, 𝑷𝑷𝟏𝟏 must be a 0.
Bits 2, 3, 6, 7 must have even parity. So, 𝑷𝑷𝟐𝟐 must be a 1.
Bits 4, 5, 6, 7 must have even parity. So, 𝑷𝑷𝟒𝟒 must be a 1.
Therefore, the final code is 0011110.

_____________________________________________________________________

QUESTION 5:
Multiplication of 2 binary numbers A and B yields 10101; if A is 111, then B is
a. 011
b. 110
c. 101
d. None of these

Correct Answer: a

Detailed Solution:

Let X= (A) (B)

Given that, A = 111 and X = 10101.

By using decimal conversion of A and X, we get

(𝐴𝐴)10 = 7 and (𝑋𝑋)10 = 21

So, (𝐵𝐵)10 = 21/7 = 3. (𝐵𝐵)2 = 011.

QUESTION 6:
A = A7 ... A2A1A0 and B = B7 … B2B1B0 are 8-bit binary numbers fed into a comparator. The output
Y of the comparator is logic 1 whenever input A is lesser than input B. The number of
combinations for which Y will be at logic 1 is ___________.

Correct Answer: 32640

Detailed Solution:

For n-bit comparator,

Total combination = 22n


NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

Equal combination (A = B) = 2n, Unequal Combination=22n - 2n

Greater (A > B) = Less (A < B) combination = (22n - 2n)/2 = (216 – 28)/2 = 32640.
_____________________________________________________________________________

QUESTION 7:
Given the statements,

Statement I: ASCII and the Gray code are non-weighted and self-complementary codes.

Statement II: (CDB)16 is the hexadecimal equivalent of binary code of given Gray code in
hexadecimal form: (ABC)16.

Choose the correct answer from the options given below

a. Both Statement I and Statement II are false

b. Statement I is true but Statement II is false

c. Statement I is false but Statement II is true

d. Both Statement I and statement II are true

Correct Answer: a

Detailed Solution:

Statement I:

ASCII and Gray codes are non-weighted code. However, they are not self-complementary
codes.
Therefore, statement I is false.

Statement II:
(ABC)16 = (1010 1011 1100)2
The binary code of the Gray code (1010 1011 1100)2 = (1100 1101 0111)2
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

Now, decimal equivalent of (1100 1101 0111)2 = (CD7)16


Therefore, statement II is false.
______________________________________________________

QUESTION 8:
Find the number of 7485 ICs required to build a 19-bit comparator. Also, find the cascaded
input configuration of the particular IC 7485 having MSB. Use the configuration that consumes
minimum delay in generating outputs. Assume A = A18...A1 A0 and B = B18…B1 B0 are 19-bit
inputs.

a. 6; [𝐴𝐴 < 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐵𝐵14 , [𝐴𝐴 > 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐴𝐴14 , [𝐴𝐴 = 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐿𝐿𝐿𝐿𝐿𝐿
b. 5; [𝐴𝐴 < 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐿𝐿𝐿𝐿𝐿𝐿, [𝐴𝐴 > 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐿𝐿𝐿𝐿𝐿𝐿, [𝐴𝐴 = 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐻𝐻𝐻𝐻𝐻𝐻ℎ
c. 5; [𝐴𝐴 < 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐵𝐵14 , [𝐴𝐴 > 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐴𝐴14 , [𝐴𝐴 = 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐿𝐿𝐿𝐿𝐿𝐿
d. 6; [𝐴𝐴 < 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐿𝐿𝐿𝐿𝐿𝐿, [𝐴𝐴 > 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐿𝐿𝐿𝐿𝐿𝐿, [𝐴𝐴 = 𝐵𝐵 𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖𝑖] → 𝐻𝐻𝐻𝐻𝐻𝐻ℎ

Correct Answer: c

Detailed Solution:

The parallel configuration of multi-level comparator permits less delay compared to cascaded
comparator. Therefore, the minimum number of IC 7485 required is 5.

Input configuration will be [𝐴𝐴 < 𝐵𝐵] → 𝐵𝐵14 , [𝐴𝐴 > 𝐵𝐵] → 𝐴𝐴14 , [𝐴𝐴 = 𝐵𝐵] → 𝐿𝐿𝐿𝐿𝐿𝐿
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

(Refers to Magnitude Comparator, lecture 26, NPTEL online certification courses)

_____________________________________________________________________
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

QUESTION 9:
Consider the ALU unit and its functions as shown in Figure 1.

Figure: 1 Figure: 2
Suppose two such ALU units are connected to each other as shown in Figure 2. When S1= 0, the
outputs Z0 and Z1 are given as,

a. Z0 = A OR B; Z1 = 0
b. Z0 = A AND B; Z1 = 1
c. Z0 = A OR B; Z1 = 1
d. Z0 = A AND B; Z1 = 0

Correct Answer: a

Detailed Solution:

In the given ALU unit we have,


𝑌𝑌0 = 𝑆𝑆’. (𝐴𝐴. 𝐵𝐵)’ + 𝑆𝑆(𝐴𝐴’. 𝐵𝐵 + 𝐴𝐴𝐴𝐴’)
𝑌𝑌1 = 𝑆𝑆 ′ . (𝐴𝐴 + 𝐵𝐵)′ + 𝑆𝑆. 𝐴𝐴. 𝐵𝐵

As per the equivalent circuit of the demultiplexer, 𝐹𝐹0 = 𝑆𝑆1 ’𝐴𝐴 𝑎𝑎𝑎𝑎𝑎𝑎 𝐹𝐹1 = 𝑆𝑆1 𝐴𝐴
Therefore, in the given cascade connection of first ALU units, 𝑆𝑆1𝑠𝑠𝑠𝑠 = 𝑆𝑆1 ’. 𝐴𝐴 = 𝐴𝐴 (𝑤𝑤ℎ𝑒𝑒𝑒𝑒 𝑆𝑆1 = 0)
Furthermore, the outputs of first ALU unit are given as,
𝑌𝑌0 = 𝐴𝐴′ . (𝐴𝐴. 𝐵𝐵)’ + A(𝐴𝐴’. 𝐵𝐵 + 𝐴𝐴𝐴𝐴’) = 𝐴𝐴′ (𝐴𝐴′ + 𝐵𝐵 ′ ) + 𝐴𝐴𝐵𝐵 ′ = 𝐴𝐴′ + 𝐴𝐴′ 𝐵𝐵 ′ + 𝐴𝐴𝐵𝐵 ′ = 𝐴𝐴′ + 𝐴𝐴𝐵𝐵 ′
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

= 𝐴𝐴′ + 𝐵𝐵 ′ = (𝐴𝐴. 𝐵𝐵)′


𝑌𝑌1 = 𝐴𝐴′ . 𝐴𝐴′ 𝐵𝐵 ′ + A. 𝐴𝐴. 𝐵𝐵 = 𝐴𝐴′ 𝐵𝐵 ′ + 𝐴𝐴𝐴𝐴

Similarly, at the second ALU with Y0 and Y1 as inputs, we have, 𝑆𝑆2𝑛𝑛𝑛𝑛 = 𝑆𝑆1 𝐴𝐴 = 0 (𝑤𝑤ℎ𝑒𝑒𝑒𝑒 𝑆𝑆1 = 0)

𝑍𝑍0 = 𝑆𝑆2𝑛𝑛𝑛𝑛 . (𝑌𝑌0 . 𝑌𝑌1 )’ + 𝑆𝑆2𝑛𝑛𝑛𝑛 (𝑌𝑌0 ’. 𝑌𝑌1 + 𝑌𝑌0 𝑌𝑌1 ’) = (𝑌𝑌0 . 𝑌𝑌1 )’ = ((𝐴𝐴′ + 𝐵𝐵′). (𝐴𝐴′ 𝐵𝐵 ′ + 𝐴𝐴𝐴𝐴))′
= (𝐴𝐴′𝐵𝐵′)′ = 𝐴𝐴 + 𝐵𝐵

𝑍𝑍1 = 𝑆𝑆2𝑛𝑛𝑛𝑛 . (𝑌𝑌0 + 𝑌𝑌1 )′ + 𝑆𝑆2𝑛𝑛𝑛𝑛 . 𝑌𝑌0 . 𝑌𝑌1 = (𝑌𝑌0 + 𝑌𝑌1 )′ = ((𝐴𝐴. 𝐵𝐵)′ + 𝐴𝐴′ 𝐵𝐵 ′ + 𝐴𝐴𝐴𝐴)′
= (1 + 𝐴𝐴′𝐵𝐵′)′ = (1)′ = 0
______________________________________________________________________

QUESTION 10:
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

Consider an ALU unit with its function table as shown below,

The ALU circuit is modified as follows

If the operands are in 2’s complement representation, which of the following operations can be
performed by suitably setting the control lines K and Cin only.

a) A PLUS B, and A MINUS B, but not A PLUS 1


b) A PLUS B, and A PLUS 1 but not A MINUS B
c) A PLUS B, but not A MINUS B or A PLUS 1
d) A PLUS B, and A MINUS B, and A PLUS 1

Correct Answer: a

Detailed Solution:
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur

While, S1S0 = 11, the ALU performs two operations depending on Cin as indicated in the function
table. Furthermore, when K = 1, the input A0B0 will be complemented. At, K = 0, there will be no
change in the input.

Therefore, below are the possible cases if we consider variable K and Cin,

K Cin Output
0 0 A PLUS B
0 1 A PLUS B PLUS 1
1 0 A PLUS B’
1 1 A PLUS B’ PLUS 1

Therefore, K = 1, Cin = 1 represents a 2’s complement subtraction and K = 1, Cin = 0 represents


1’s complement subtraction. But without manipulating B we cannot get A PLUS 1.
Therefore, we can perform A PLUS B and A MINUS B but not A PLUS 1.
______________________________________________________________________________

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