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Examples 5

The document contains multiple examples of minimizing Boolean functions using Karnaugh maps (K-maps) and implementing them with various logic gates. It includes tasks for both 3-variable and 4-variable functions, as well as a 5-variable odd function, and emphasizes the use of minimum literals and gates. Additionally, it discusses the design of logic blocks using multiplexers and other components.

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0% found this document useful (0 votes)
5 views4 pages

Examples 5

The document contains multiple examples of minimizing Boolean functions using Karnaugh maps (K-maps) and implementing them with various logic gates. It includes tasks for both 3-variable and 4-variable functions, as well as a 5-variable odd function, and emphasizes the use of minimum literals and gates. Additionally, it discusses the design of logic blocks using multiplexers and other components.

Uploaded by

gulcinergezer
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Examples 5

1. Minimize the following 3-variable Boolean function F, together with the don’t
care conditions d.

F(a,b,c) = ∑ (1 , 5 , 6 )

d(a,b,c) = ∑ (2 ,3 ,7)

a. Fill the K-map below and using this K-map, express the minimized
function in sum of products form (Be careful about the order of the variables
in the map).

b. Using the K-map above, express the minimized function in product


of sums form.

2. Drawing the K-map for the following 4-variable function, list all the prime
implicants, and indicate the essential ones. Write all the minimum sum-of-
products forms of the function.

F(a,b,c,d) = ∑ (5 , 6 ,7 ,8 ,9 , 10 , 13 ,14 ,15)

3. Minimize the following four-variable function by using K-map, and implement


it with two-level NAND gate circuits. Assume that both normal and
complement inputs are available.

F(a,b,c,d) = a'c' + a'cd' + abc'd + c'd + ac'd'

4. Implement the following four-variable Boolean function F, using the two-


level form of NAND-AND gates. Assume that both normal and
complement inputs are available. Use minimum number of literals and gates.

(Hint: Express the function in AND-OR-INVERT form.)

F(a,b,c,d) = ∑ (1 , 9 , 11, 13 , 15 )

1
5. Let F(A,B,C,D,E) is a five variable odd function. Write the binary values of F
in the table in the F column. Draw the logic diagram of F by using minimum
number of two input proper gates and minimum number of implementation
levels.

A B C D E F
0 0 0 0 0
0 0 0 0 1
0 0 0 1 0
0 0 0 1 1
0 0 1 0 0
0 0 1 0 1
0 0 1 1 0
0 0 1 1 1
0 1 0 0 0
0 1 0 0 1
0 1 0 1 0
0 1 0 1 1
0 1 1 0 0
0 1 1 0 1
0 1 1 1 0
0 1 1 1 1
1 0 0 0 0
1 0 0 0 1
1 0 0 1 0
1 0 0 1 1
1 0 1 0 0
1 0 1 0 1
1 0 1 1 0
1 0 1 1 1
1 1 0 0 0
1 1 0 0 1
1 1 0 1 0
1 1 0 1 1
1 1 1 0 0
1 1 1 0 1
1 1 1 1 0
1 1 1 1 1

2
6. Consider the following circuit. Implement f(x,y,z,w) using only one 8x1 MUX (like
the one shown below) . Select inputs of the 8x1 MUX are already connected and you
are not allowed to change them. Complements of the variables and logic levels 1
and 0 are available.

3
7. An X logic block has three inputs and three outputs and MT2 logic block has
three inputs and two outputs as described in the truth tables.

Design an MT2 logic block using only minimum number of X blocks and 2x1
Multiplexers. No other components are available. Logic 0 and 1 are available. The
complements of the input variables are not available.

X Block MT2 Block


Inputs Outputs Inputs Outputs
a b c D E F a b c P Q
0 0 0 0 1 1 0 0 0 1 1
0 0 1 1 0 0 0 0 1 1 0
0 1 0 1 0 1 0 1 0 1 0
0 1 1 1 1 0 0 1 1 1 1
1 0 0 1 1 1 1 0 0 1 1
1 0 1 0 1 0 1 0 1 0 0
1 1 0 1 0 0 1 1 0 1 0
1 1 1 1 0 1 1 1 1 1 1

a D a P
b X Block E b MT2 Block
c F c Q

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