Unit 1: Number System

Introduction to Number System

A number system represents numbers using symbols (digits) and a base (radix).

• Base or radix = number of symbols used to represent numbers.

Examples:

• Binary (base 2): 0, 1

• Octal (base 8): 0–7

• Decimal (base 10): 0–9

• Hexadecimal (base 16): 0–9, A–F

Each digit has a place value = digit × (base)ᵖ (where p = position).

BCD (Binary Coded Decimal)

• Each decimal digit (0–9) is represented by its 4-bit binary equivalent.

Example:
59₁₀ → 0101 1001 (BCD).

• Useful in calculators and digital displays, because it keeps decimal digits separate (easier for human-readable
output).

• Not efficient for arithmetic — needs special handling.

ASCII (American Standard Code for Information Interchange)

• A 7-bit code (extended to 8-bit) that represents characters (letters, numbers, symbols, control codes).

o Example:

▪ ‘A’ = 65 (01000001₂)

▪ ‘a’ = 97 (01100001₂)

▪ ‘0’ = 48 (00110000₂)

• Used for text storage and communication between systems.

Conversion between Number Systems

1. Binary ↔ Decimal

o Binary → Decimal: multiply each bit by 2ⁿ and sum.

o Decimal → Binary: repeatedly divide by 2 and record remainders.

2. Binary ↔ Octal/Hexadecimal

o Group bits: 3 for octal, 4 for hex, and substitute.

o Example: 101101₂ → 55₈ → B₁₆.

3. Octal ↔ Decimal, Hex ↔ Decimal done similarly using base powers.

Binary Arithmetic

Operations use Boolean logic:

• Addition
0+0=0, 0+1=1, 1+0=1, 1+1=10 (carry 1).

• Subtraction uses complements (see below).

• Multiplication and division mimic decimal arithmetic using shifts and adds/subtracts.

Signed Numbers

Computers represent both positive and negative integers in binary.

Common systems:

1. Sign-magnitude: MSB = sign bit (0=+, 1=–); magnitude stored normally. Simple but two zeros (+0, –0).

2. 1’s complement: negative = invert (all bits flipped) of positive value. Also has two zeros.

3. 2’s complement: negative = invert all bits + 1. Unique zero, easy arithmetic; most common in computers.

1’s and 2’s Complement Method

• 1’s complement:
Example: for 8-bit +5 (00000101), –5 = 11111010.

• 2’s complement:
Invert bits → add 1 → 11111011 (–5).

• Subtraction using complements:

A – B = A + (2’s complement of B); ignore overflow bit.

⚙️ Unit 2: Digital Gates

Logic Gates

Basic hardware building blocks implementing Boolean functions.

Gate Symbol Function Expression

AND · Output 1 only if both inputs 1 X·Y

OR + Output 1 if any input 1 X+Y

NOT ¬ Inverts input ¬X

NAND AND + NOT (X·Y)’

NOR OR + NOT (X+Y)’

XOR Exclusive-OR 1 if inputs differ X⊕Y

XNOR Exclusive-NOR 1 if inputs same (X⊕Y)’

Basic Theorems and Properties of Boolean Algebra

• Commutative: A+B = B+A; A·B = B·A

• Associative: (A+B)+C = A+(B+C); (A·B)·C = A·(B·C)

• Distributive: A·(B+C)=A·B+A·C

• Identity: A+0=A; A·1=A

• Complement: A+A’=1; A·A’=0

• Idempotent: A+A=A; A·A=A

• Double Negation: (A’)’=A

• DeMorgan’s: (A·B)’=A’+B’; (A+B)’=A’·B’

NAND, NOR Implementations

• NAND and NOR are universal gates — any logic circuit can be implemented using only one of them.

• NAND Implementation: use DeMorgan’s laws to replace AND/OR/NOT combinations with NAND.

• NOR Implementation: similarly, replace operations with NOR equivalents.

Sum of Products (SOP) & Product of Sums (POS)

• SOP: logical OR of multiple AND terms (e.g., AB + A’B’C).

Derived from minterms (1’s in truth table).

• POS: logical AND of multiple OR terms (e.g., (A+B)(A’+C)).

Derived from maxterms (0’s in truth table).
Both are canonical Boolean forms.

Karnaugh Map (K-map)

A graphical method for simplifying Boolean functions.

• Each cell represents a minterm.

• Adjacent 1’s are grouped in sizes 1, 2, 4, 8… (powers of 2).

• Each group gives a simplified product term.

• Simplification reduces gates and cost.

Don’t Care Conditions

When some input combinations never occur or output doesn’t matter, mark them X in K-map.
They can be grouped as 1 or 0 to further simplify the logic.
 Unit 3: Basic Organization – 1
Processor Organization

Defines how data paths, registers, ALU, and control unit interact to execute instructions.

General Register Organization

• CPU has a set of registers for high-speed data storage and manipulation.

• Registers connected via a common bus system.

• Control lines select which registers read/write.

• Example: MAR (memory address register), MDR (memory data register), PC, IR, Accumulator.

Stack Organization

• Stack: LIFO structure within CPU.

• Operations: PUSH (store value), POP (retrieve value).

• Used for function calls, expression evaluation, interrupts.

• Implemented using stack pointer register.

Addressing Modes

Define how the effective address of an operand is obtained. Common modes:

• Immediate: operand = constant inside instruction.

• Direct: address field gives operand’s memory address.

• Indirect: address field contains pointer to operand address.

• Register: operand in register.

• Indexed/Relative: base + index offset.

Used to improve flexibility and code compactness.

Instruction Codes

Each machine instruction encoded in binary.

• Typical fields: Opcode (operation), Operand address(es).

• Example: ADD R1,R2 means R1 ← R1 + R2.

• Opcode defines ALU function; addressing fields define data sources/destinations.

Instruction Formats

Different ways of arranging opcode + operands in binary word:

• Zero-address (stack machines)

 • One-address (accumulator)

• Two-address

• Three-address
Trade-off between instruction size and flexibility.

🧮 Unit 4: Basic Organization – 2

Control Unit

Coordinates all activities in CPU — fetch, decode, execute cycle.

Register Transfer and Micro-operations

• Register transfer: moving data between registers. Example: R1 ← R2.

• Micro-operations: elementary operations on data in registers:

o Arithmetic (add, sub)

o Logic (AND, OR)

o Shift (left, right)

o Control (load, clear)

Each clock pulse can trigger one or more micro-operations.

Timing and Control

• Ensures correct sequence of operations synchronized by clock.

• Timing signals control when each micro-operation occurs.

• Control signals originate from control unit — decide which path active, which operation enabled.

Control Memory & Microprogramming

• Microprogrammed control unit: control signals stored as microinstructions in control memory (ROM).

o Each microinstruction defines signals for one step (micro-operation).

o Easy to modify (change microprogram = new instruction set).

• Hardwired control: uses fixed logic circuits — faster but inflexible.

Hardwired Control

• Implemented by combinational logic using gates, flip-flops, and decoders.

• Directly generates control signals based on opcode bits and timing.

• Faster execution; changes require redesign.

 Unit 5: Microprocessor Architecture
Introduction to Microprocessor

A microprocessor is a CPU on a single IC (chip) that executes instructions stored in memory.

Internal Architecture

Contains:

1. Arithmetic Logic Unit (ALU) – performs arithmetic/logic operations.

2. Registers – hold operands, intermediate results, and addresses.

3. Control Unit – fetch-decode-execute control logic.

4. Instruction Register / Decoder – decodes current instruction.

5. Program Counter (PC) – holds address of next instruction.

6. Clock and Control Signals – synchronization.

7. Buses –

o Data bus (transfer data)

o Address bus (carry memory addresses)

o Control bus (read/write signals)

Example: Intel 8085/8086 microprocessors.

Instruction Set

• The complete collection of machine instructions a processor understands.

• Each instruction specifies:

o Operation code (opcode)

o Operand(s)

o Addressing mode

• Types:

o Data transfer (MOV, LDA)

o Arithmetic/Logic (ADD, SUB, AND, OR)

o Control (JMP, CALL, RET)

o Input/Output

o Stack operations

• Simpler sets (RISC) = fewer, faster instructions; Complex sets (CISC) = many specialized instructions.
 Unit 6: Peripherals
Input–Output Organization

Refers to how CPU communicates with external devices.

Peripheral Devices

External hardware connected to computer: keyboard, mouse, printer, monitor, hard disk, etc.
They are slower than CPU → need control interfaces for synchronization.

Input/Output Interface

Hardware between CPU and peripherals; converts signals and manages data transfer.

• Examples: device controllers, ports, adapters.

• Provides status registers, data registers, and control lines.

Asynchronous Data Transfer

Because devices operate at different speeds, asynchronous transfer avoids strict timing.
Two common methods:

1. Strobe Method:

o One side (sender) activates strobe signal when data ready.

o Receiver reads data when strobe received.

o Simple but unidirectional and less reliable.

2. Handshaking Method:

o Both sender and receiver exchange ready/acknowledge signals.

o Ensures both are synchronized for each data item.

o Used in modern I/O buses.

Modes of Transfer

1. Programmed I/O: CPU actively waits and transfers data by instructions. Simple but wastes CPU time.

2. Interrupt-Driven I/O: device signals CPU when ready; CPU executes ISR (Interrupt Service Routine). Efficient.

3. DMA (Direct Memory Access): device transfers data directly to/from memory without CPU involvement. Best
for bulk transfers.